Prosecution Insights
Last updated: October 27, 2026
Application No. 18/754,916

PRINTED CIRCUIT BOARD STRUCTURE CONTAINING THERMAL INTERFACE MATERIAL AND ELECTRONIC DEVICE INCLUDING THE SAME

Non-Final OA §103
Filed
Jun 26, 2024
Priority
Jun 26, 2023 — RE 10-2023-0081724 +2 more
Examiner
SAWYER, STEVEN T
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
765 granted / 1054 resolved
+4.6% vs TC avg
Strong +30% interview lift
Without
With
+30.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
29 currently pending
Career history
1091
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
64.1%
+24.1% vs TC avg
§102
24.2%
-15.8% vs TC avg
§112
9.7%
-30.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1054 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant's election with traverse of Species I (figs. 4-7) directed to claims 1-7, 15-18 and 20 in the reply filed on 8/10/2026 is acknowledged. The traversal is on the ground(s) that “Applicant submits that Species II (figs. 8A and 8B) should also be examined together with the elected species. Specifically, Figs. 8A and 8B (Species II) do not introduce a separate or distinct structural modification from Species I” [REMARKS page 1]. The Examiner agrees, therefore elected Species I shall encompass figs. 4-8B directed to claims 1-7, 15-18 and 20. The requirement is still deemed proper and is therefore made FINAL. Claims 8-14 & 19 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected subject matter. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kawakami et al. (US PG. Pub. 2006/0033199) in view of Coffy et al. (US PG. Pub. 2013/0079068). Regarding claim 1 – Kawakami teaches an electronic device (fig. 6 [title] Kawakami states, “electronic circuit device”) comprising: a printed circuit board (PCB) structure (131) containing a thermal interface material (TIM) (66 [paragraph 0078] Kawakami states, “heat-dissipation resin 66”), wherein the PCB structure (131) comprises: a first PCB (62 [paragraph 0085] Kawakami states, “circuit substrate 62”); an interposer (63-1 & 63-2 [paragraph 0099] Kawakami states, “spacer substrate 63-1 and 63-2”) connected to the first PCB (62); a second PCB (61 [paragraph 0027] Kawakami states, “circuit substrate 61”) connected to the interposer (63-1 & 93-2), wherein a nozzle hole (65 [paragraph 0054] Kawakami states, “a through-hole 65 passing through from the uppermost surface 61a to the lowermost surface 61b of the circuit substrate 61 is formed”) and a monitoring hole (element 65 performs this function as consistent with the instant application) are formed through the second PCB (61); and a cover structure (141a) comprising: a support layer (141a [paragraph 0078] Kawakami states, “metal thin film 141a”) on the second PCB (61); wherein a hole (see the hole formed in 141a that aligns with nozzle hole 65) overlapping the monitoring hole (65) is formed through the support layer (141a). Kawakami fails to teach a visible layer that is connected to the support layer, covers the monitoring hole, and comprises a material having transparency. Coffy teaches an electronic device (fig. 11, 56) comprising: a visible layer (59b [paragraph 0063] Coffy states, “drops 59a and 59b of transparent material, which can be replaced by a transparent plate”) that is connected to the support layer (21), covers the monitoring hole (58b [paragraph 0063] Coffy states, “openings 58a and 58b”), and comprises a material having transparency (transparency of layer 59a/59b as quoted above). It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the electronic device with a first and second PCB separated by an interposer with a nozzle/monitoring hole aligned with a cover structure including a support layer on the second PCB for applying a thermal interface material between the PCBs as taught by Kawakami with the cover structure including a transparent visible layer connected to the support layer covering the nozzle/monitoring hole as taught by Coffy because Coffy states, “For a protection against moisture and dust, the openings 58a and 58b can be covered with drops 59a and 59b of transparent material, which can be replaced by a transparent plate” [paragraph 0063]. This transparent visible layer covering the hole will protect the internal area having the thermal interface material form the external environment. Regarding claim 2 – Kawakami in view of Coffy teach the electronic device of claim 1, wherein the visible layer (Coffy; fig. 11, 59a/59b) blocks the TIM (Kawakami; fig. 6, 66) from being discharged to the outside through the monitoring hole (65; claimed structure as discussed in the 103 rejection above). Regarding claim 3 – Kawakami in view of Coffy teach the electronic device of claim 1, but fail to teach wherein, in a state in which an inside of the support layer is filled with the TIM, a color of the inside of the support layer, that is visible through the visible layer, changes. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a color of the thermal interface material inside the support layer, that is visible through the visible layer changes, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Color changes of the thermal interface material would act as an alert/notice to the user in addition to desired aesthetics. Allowable Subject Matter Claims 16-18 and 20 are allowed. Claims 4-7 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lewison et al. (US PG. Pub. 2021/0249333) discloses a conformal integrated circuit device package lid. Sasaki (US PG. Pub. 2015/0338067) discloses an electronic circuit device. Jeong et al. (US PG. Pub. 2009/0059498) discloses an electronic appliance. Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN T SAWYER whose telephone number is (571)270-5469. The examiner can normally be reached M-F 8:30 am - 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at 5712722342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STEVEN T SAWYER/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Jun 26, 2024
Application Filed
Oct 15, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
99%
With Interview (+30.4%)
2y 5m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1054 resolved cases by this examiner. Grant probability derived from career allowance rate.

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