DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office Action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5, 7, 9, 11-14 and 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Leinenbach et al. (WO2011082857).
Regarding claim 1, Leinenbach discloses a method (abstract), comprising: performing an ion beam implant in a semiconductor substrate to form an ion-induced damage layer at an implant depth in the semiconductor substrate, wherein a portion of the substrate above the ion-induced damage layer defines a substrate film region, and a portion of the substrate below the ion-induced damage layer defines a bulk substrate region, and the ion-induced damage layer has a damaged structure relative to the substrate film region and the bulk substrate region (step 201 is an ion beam implant step, paragraph 0059; sacrificial layer 112 reads on an ion damaged layer, region 113 reads on a substrate film region, region 111 reads on a bulk substrate region, paragraph 0065 and Fig. 10); and forming semiconductor device components on the substrate film region, wherein the substrate film region and the semiconductor device components formed thereon define a substrate film-based semiconductor device structure (component layer 123 reads on a substrate film-based semiconductor device structure, paragraph 0065 and Fig. 10); forming a plurality of vertical openings through the substrate film-based semiconductor device structure and extending to the ion-induced damage layer (trenches 125 read on a plurality of vertical openings, paragraph 0069 and Fig. 11); performing an under-etch through the vertical openings to partially remove the ion-induced damage layer (paragraph 0072); separating the substrate film-based semiconductor device structure from the bulk substrate region, wherein the separation occurs at the partially removed ion-induced damage layer (paragraph 0072); and mounting the separated substrate film-based semiconductor device structure on a carrier (substrate 180 reads on a carrier, paragraph 0074).
Regarding claim 2, Leinenbach discloses securing a transfer device to the top side of the semiconductor device structure prior to separating the substrate film-based semiconductor device structure from the bulk substrate region (transfer substrate 151 reads on a transfer device, paragraph 0070 and Fig. 11); and removing the transfer device after mounting the separated substrate film-based semiconductor device structure on the carrier (paragraph 0074).
Regarding claim 3, Leinenbach discloses wherein the under-etch to partially remove the ion-induced damage layer comprises a plasma etch (paragraph 0073).
Regarding claim 5, Leinenbach discloses wherein the semiconductor substrate comprises silicon carbide, gallium nitride, or diamond (paragraph 0034).
Regarding claim 7, Leinenbach discloses after mounting the separated substrate film-based semiconductor device structure on the carrier, dicing the semiconductor device structure to define a plurality of discrete devices (a singulation process reads on dicing, paragraph 0053).
Regarding claim 9, Leinenbach discloses wherein the plurality of vertical openings extend at least partially through a vertical thickness of the ion-induced damage layer (Fig. 11).
Regarding claim 11, Leinenbach discloses a method (abstract), comprising: forming semiconductor device components on a semiconductor substrate to define a semiconductor device structure (component layer 123 reads on a semiconductor device structure, paragraph 0065 and Fig. 10); forming at least one vertical opening extending though a partial vertical thickness of the semiconductor substrate (trenches 125 read on a vertical opening, paragraph 0069 and Fig. 11); performing an under-etch through the at least one vertical opening, wherein the under-etch forms a horizontally extending weakened layer within the semiconductor substrate (paragraph 0072 and Fig. 11); using the horizontally extending weakened layer to separate the semiconductor substrate into (a) a substrate film region above the horizontally extending weakened layer and (b) an underlying bulk substrate region below the horizontally extending weakened layer, the separated substrate film region carrying the semiconductor device components to collectively define a substrate film-based semiconductor device structure (region 113 reads on a substrate film region, region 111 reads on a bulk substrate region, paragraphs 0065 and 0072, and Fig. 11); and mounting the separated substrate film-based semiconductor device structure on a carrier (substrate 180 reads on a carrier, paragraph 0074).
Regarding claim 12, Leinenbach discloses performing an ion beam implant in the semiconductor substrate to form an ion-induced damage layer at an implant depth in the semiconductor substrate, wherein a portion of the substrate above the ion-induced damage layer defines the substrate film region, and a portion of the substrate below the ion-induced damage layer defines the bulk substrate region (step 201 is an ion beam implant step, paragraph 0059; sacrificial layer 112 reads on an ion damaged layer, region 113 reads on the substrate film region, region 111 reads on the bulk substrate region, paragraph 0065 and Fig. 10); wherein the at least one vertical opening extends at least partially through a vertical thickness of the ion-induced damage layer (paragraph 0069 and Fig. 11); and the under-etch removes a portion of the ion-induced damage layer (paragraph 0072).
Regarding claim 13, Leinenbach discloses securing a transfer device to the top side of the semiconductor device structure prior to separating the substrate film-based semiconductor device structure from the bulk substrate region (transfer substrate 151 reads on a transfer device, paragraph 0070 and Fig. 11); and removing the transfer device after mounting the separated substrate film-based semiconductor device structure on the carrier (paragraph 0074).
Regarding claim 14, Leinenbach discloses wherein the under-etch comprises a plasma etch (paragraph 0073).
Regarding claim 16, Leinenbach discloses wherein the semiconductor substrate comprises silicon carbide, gallium nitride, or diamond (paragraph 0034).
Regarding claim 17, Leinenbach discloses after mounting the separated substrate film-based semiconductor device structure on the carrier, dicing the semiconductor device structure to define a plurality of discrete devices (a singulation process reads on dicing, paragraph 0053).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office Action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 and 6 are rejected under 35 U.S.C. 103 as being obvious over Leinenbach et al. (WO2011082857) as applied to claim 1 above.
Regarding claim 4, Leinenbach is silent about wherein the under-etch to partially remove the ion-induced damage layer comprises a wet etch. However, Leinenbach discloses the under-etch is performed using an etching medium to remove the sacrificial layer (paragraph 0072). An etching liquid is a common etching medium, and using wet etch is a well-known practice for removing a sacrificial layer.
Regarding claim 6, Leinenbach discloses wherein the implant depth of the ion-induced damage layer is at a predetermined depth below an upper surface of the semiconductor substrate (paragraph 0065 and Fig. 10). Leinenhach is silent about the range of the depth as recited in the instant claim. However, the predetermined depth is a matter of design choice obvious to one of ordinary skill in the art.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Leinenbach et al. (WO2011082857) as applied to claim 1 above, in view of Millan et al. (“A Survey of Wide Bandgap Power Semiconductor Devices”, IEEE Transaction on Power Electronics, vol. 29, year 2014, pages 2155-2163).
Regarding claim 8, Leinenbach discloses wherein: forming semiconductor devices on the substrate film region comprises: growing an epitaxial region over the substrate film region (paragraph 0042); and the plurality of vertical openings extend vertically through the epitaxial region and the substrate film region (paragraph 0072 and Fig. 11). Leinenbach is silent about forming metal structures over the epitaxial region. However, Leinenbach discloses that devices on the substrate film region comprises power semiconductor devices made of gallium nitride (paragraphs 0045 and 0060). In addition, Millan teaches that metal structures are formed in a power semiconductor device made of gallium nitride (GaN, abstract and Fig. 8). Therefore, it would have been obvious to one of ordinary skill, in the art before the effective filing date of the claimed invention, to form metal structures over the epitaxial region as taught by Millan, in the method of Leinenbach to form the power semiconductor device, with a reasonable expectation of success. It has been held that combining prior art elements according to known methods to yield predictable results is obvious. See MPEP 2143 I.(A).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Leinenbach et al. (WO2011082857) as applied to claim 1 above, in view of Romano et al. (US20120309172).
Regarding claim 10, Leinenbach is silent about after separating the substrate film-based semiconductor device structure from the bulk substrate region, using the separated bulk substrate region to form additional devices. However, Leinenbach discloses that the substrate below the sacrificial layer is separated from the structure over the sacrificial layer (paragraph 0072 and Fig. 11). In addition, Romano teaches a method for reusing substrate that has been separated from a structure over a sacrificial layer for any suitable growth substrate (abstract and paragraph 0014). In particular, Romano teaches repairing damaged area after removing the sacrificial layer and reuse the substrate (paragraph 0032). Therefore, it would have been obvious to one of ordinary skill, in the art before the effective filing date of the claimed invention, to apply the teaching of Romano, in the method of Leinenbach to reuse the substrate, with a reasonable expectation of success. It has been held that combining prior art elements according to known methods to yield predictable results is obvious. See MPEP 2143 I.(A).
Claim 15 is rejected under 35 U.S.C. 103 as being obvious over Leinenbach et al. (WO2011082857) as applied to claim 11 above.
Regarding claim 15, Leinenbach is silent about wherein the under-etch comprises a wet etch. However, Leinenbach discloses the under-etch is performed using an etching medium to remove the sacrificial layer (paragraph 0072). An etching liquid (wet) is a common etching medium, and using wet etch is a well-known practice for removing a sacrificial layer.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Leinenbach et al. (WO2011082857) as applied to claim 11 above, in view of Millan et al. (“A Survey of Wide Bandgap Power Semiconductor Devices”, IEEE Transaction on Power Electronics, vol. 29, year 2014, pages 2155-2163).
Regarding claim 18, Leinenbach discloses wherein: forming semiconductor devices on the substrate film region comprises: growing an epitaxial region over the substrate film region (paragraph 0042); and the plurality of vertical openings extend vertically through the epitaxial region and the substrate film region (paragraph 0072 and Fig. 11). Leinenbach is silent about forming metal structures over the epitaxial region. However, Leinenbach discloses that devices on the substrate film region comprises power semiconductor devices made of gallium nitride (paragraphs 0045 and 0060). In addition, Millan teaches that metal structures are formed in a power semiconductor device made of gallium nitride (GaN, abstract and Fig. 8). Therefore, it would have been obvious to one of ordinary skill, in the art before the effective filing date of the claimed invention, to form metal structures over the epitaxial region as taught by Millan, in the method of Leinenbach to form the power semiconductor device, with a reasonable expectation of success. It has been held that combining prior art elements according to known methods to yield predictable results is obvious. See MPEP 2143 I.(A).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Leinenbach et al. (WO2011082857) as applied to claim 11 above, in view of Romano et al. (US20120309172).
Regarding claim 19, Leinenbach is silent about after separating the substrate film-based semiconductor device structure from the bulk substrate region, using the separated bulk substrate region to form additional devices. However, Leinenbach discloses that the substrate below the sacrificial layer is separated from the structure over the sacrificial layer (paragraph 0072 and Fig. 11). In addition, Romano teaches a method for reusing substrate that has been separated from a structure over a sacrificial layer for any suitable growth substrate (abstract and paragraph 0014). In particular, Romano teaches repairing damaged area after removing the sacrificial layer and reuse the substrate (paragraph 0032). Therefore, it would have been obvious to one of ordinary skill, in the art before the effective filing date of the claimed invention, to apply the teaching of Romano, in the method of Leinenbach to reuse the substrate, with a reasonable expectation of success. It has been held that combining prior art elements according to known methods to yield predictable results is obvious. See MPEP 2143 I.(A).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIONG-PING LU whose telephone number is (571) 270-1135. The examiner can normally be reached on M-F: 9:00am – 5:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua L Allen, can be reached at telephone number (571)270-3176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JIONG-PING LU/
Primary Examiner, Art Unit 1713
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