DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species A (claims 1-3, 5-6, 12, 14, 38-39, 41 and 52-58) in the reply filed on 7-31-2026 is acknowledged. The traversal is on the ground(s) that the restriction has not been shown to be both independent and distinct or that there is a serious burden to search. This is not found persuasive because no invention can be both independent (unrelated) and distinct (related). Moreover the restriction cites to differing text searches in order to find the various species as the serious burden to search (e.g. the high resistance portion of the gate structure having sections of a first and second material that are different vs. the high resistance portion of the gate structure having two sections both of a first semiconductor material of different dopant levels requires different search strategies and queries that constitute a serious burden to search).
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, 5-6, 12, 14, 38-39, 52-53, and 56-57 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kiep (US 2015/0364468).
[claim 1] A semiconductor device (100, fig. 1, 5, 6, 7), comprising: a semiconductor layer structure (120, fig. 5, [0057]); and a gate structure that comprises a high resistance portion (the resistor 105 and gate terminal 132, fig. 5,6 [0038]) and a low-resistance portion (gate electrode terminal 111 which may be made of doped polysilicon [0038] see also [0037]) on the semiconductor layer structure, wherein the high resistance portion of the gate structure comprises a first section that has a first resistance temperature coefficient (131 of 105, fig. 6, which may be made of doped polysilicon [0063]) and a second section that has a second resistance temperature coefficient (contact 132, fig. 6 [0063] which may be made of a metal silicide [0035] and optionally 130) that differs from the first resistance temperature coefficient (metal silicide vs doped polysilicon).
[claim 3] The semiconductor device of Claim 1, wherein the first section of the high resistance portion of the gate structure comprises a plurality of gate electrodes (see fig. 7 which shows a plurality of gate electrodes 1130, 1131, and 1132 using a lumped resistor 1150 [0064]) that are on an active region of the semiconductor layer structure and the second section of the high resistance portion of the gate structure comprises a lumped gate resistor [0064].
[claim 5] The semiconductor device of Claim 1, wherein the first section of the high resistance portion of the gate structure comprises a first material (doped polysilicon [0063]) and the second section of the high resistance portion of the gate structure comprises a second material (metal silicide [0035]) that is different from the first material.
[claim 6] The semiconductor device of Claim 5, wherein the first material is doped polysilicon [0063] and the second material comprises a metal-silicon alloy [0035].
[claim 12] The semiconductor device of Claim 1, wherein the first section of the high resistance portion of the gate structure has a positive resistance temperature coefficient at the gate electrode near the and the second section of the high resistance portion of the gate structure has a negative resistance temperature coefficient [0054].
[claim 14] The semiconductor device of Claim 1, wherein the first section of the high resistance portion of the gate structure comprises a plurality of gate electrodes (see fig. 7 which shows a plurality of gate electrodes 1130, 1131, and 1132 using a lumped resistor 1150 [0064]) that are on an active region (in 120, fig. 5) of the semiconductor layer structure and the second section of the high resistance portion of the gate structure comprises a lumped gate resistor (lumped gate resistor 1150 [0064]) that is on an inactive region (e.g. the insulating layer 124, fig. 5) of the semiconductor layer structure, and wherein the gate structure further comprises a metal portion that comprises a metal gate pad and a metal gate bus (metal gate pad and bus configurations may be used in the gate configuration [0035]) .
[claim 38] A semiconductor device (100, fig. 1, 5, 6, 7), comprising: a semiconductor layer structure (120, fig. 5, [0057]); and a gate structure on the semiconductor layer structure, wherein the gate structure comprises a first section that has a positive resistance temperature coefficient (131 of 105, fig. 6, which may be made of doped polysilicon and optionally a metal [0063] ) and a second section that has a negative resistance temperature coefficient (contact 132, fig. 6 [0063] which may be made of a metal silicide [0035] and optionally 130).
[claim 39] The semiconductor device of Claim 38, wherein the first section of the gate structure comprises a plurality of gate electrodes (see fig. 7 which shows a plurality of gate electrodes 1130, 1131, and 1132 using a lumped resistor 1150 [0064]) that are on an active region of the semiconductor layer structure and the second section of the gate structure comprises a lumped gate resistor (1150, fig. 7, [0064]).
[claim 52] A semiconductor device (100, fig. 1, 5, 6, 7), comprising: a semiconductor layer structure (120, fig. 5, [0057]); and a gate structure on the semiconductor layer structure, the gate structure comprising a plurality of gate electrodes (see fig. 7 which shows a plurality of gate electrodes 1130, 1131, and 1132 using a lumped resistor 1150 [0064]) and at least one lumped gate resistor (1150, fig. 7, [0064]), wherein the gate electrodes comprise a first material (the gate electrodes may be made of doped polysilicon [0038] and also optionally a metal [0035], fig. 5) and the at least one lumped gate resistor comprises a second material that is different from the first material. (131 of 105, fig. 6, which may be made of metal silicide [0063] and optionally 130)
[claim 53] The semiconductor device of Claim 52, wherein the gate structure further comprises a metal portion that comprises a gate pad (e.g. 132, fig. 5 may be a metal pad [0038] [0032]), and the lumped gate resistor is interposed on an electrical path between the gate pad and at least some of the gate electrodes (gate terminal pad 132 is on side and 111 gate electrode terminals on the other side of the resistor 105, fig. 5).
[claim 56] The semiconductor device of Claim 52, wherein the first material has a positive resistance temperature coefficient and the second material has a negative resistance temperature coefficient ([0054] the first material is doped polysilicon and also a metal [0038][0035] and the second material is metal silicide and optionally doped polysilicon, [0063]).
[claim 57] The semiconductor device of Claim 52, wherein the first material has a first positive resistance temperature coefficient and the second material has a second positive resistance temperature coefficient that is less than half the first positive resistance temperature coefficient (the first material is doped polysilicon and also a metal [0038][0035] and the second material is metal silicide and optionally doped polysilicon, [0063]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 55, and 58 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kiep (US 2015/0364468).
Kiep discloses the semiconductor device of claims 1, 53, and 52 but does not expressly disclose that the second resistance temperature coefficient may be at least 25% less than the first resistance temperature coefficient, the first material is doped polysilicon and the second material has a resistance temperature coefficient that is at least 25% less than a resistance temperature coefficient of the doped polysilicon, or that the gate structure has a gate resistance that varies by less than 6% per 1000C over an operating temperature range of the semiconductor device.
Nevertheless it would have been obvious to one of ordinary skill before the time of filing to have used the claimed ranges, since it has been held that where the general conditions of a claim are disclosed in prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It also been held that the normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages. In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). The claimed range is a result-effective variable since the resistance temperature coefficient affects the resistance value change per degree Celsius and the gate resistance affects the speed of the device.
Claim(s) 41 and 54 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kiep (US 2015/0364468) in view of Lee (US 2002/0130102).
Kiep discloses the semiconductor device of claims 38 and 53 and that the first section of the gate structure comprises doped polysilicon [0063][0035] but does not expressly disclose that that the second section of the gate structure (including 130, fig. 6, which is a resistor material) is silicon-chromium.
Lee discloses a semiconductor device wherein the resistor material of the resistor is SiCr [0018].
It would have been obvious to one of ordinary skill in the art before the time of filing to have used SiCr as the resistor material in order to use a material for Kiep’s resistor to work. Moreover, the selection of a known material (SiCr) based on its suitability for its intended use (resistor material) is obvious. Ryco, Inc. v. Ag-Bag Corp., 857 F.2d 1418, 8 USPQ2d 1323 (Fed. Cir. 1988); In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960); Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945).
Conclusion
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/AMAR MOVVA/Primary Examiner, Art Unit 2898
