Prosecution Insights
Last updated: August 14, 2026
Application No. 18/756,691

Silicon carbide semiconductor device

Non-Final OA §102§103
Filed
Jun 27, 2024
Examiner
KIM, TONG-HO
Art Unit
Tech Center
Assignee
Fast Sic Semiconductor Incorporated
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
1034 granted / 1086 resolved
+35.2% vs TC avg
Minimal +1% lift
Without
With
+0.7%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 8m
Avg Prosecution
38 currently pending
Career history
1100
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
46.3%
+6.3% vs TC avg
§102
31.2%
-8.8% vs TC avg
§112
9.0%
-31.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1086 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 6/27/2024 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 7-9 and 19-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yen (US 2021/0043736). Regarding claim 1, Yen discloses, in at least figures 1-6B and related text, a silicon carbide semiconductor device, comprising: a silicon carbide substrate (11, [46], [64]); a drift layer (12, [46], [64]) of a first conductivity type having a first doping concentration disposed on the silicon carbide substrate (11, [46], [64]), wherein the drift layer (12, [46], [64]) has a main surface (upper surface of 12, figures) and comprises an active region (region of 12, figures); a plurality of first doped regions (13/23, [46], [55]) of a second conductivity type opposite to the first conductivity type disposed in the active region (region of 12, figures), the first doped regions (13/23, [46], [55]) comprising a plurality of first extending portions (23 extending in x direction, figures) extended laterally along a first direction (x direction, figures) and a plurality of first connecting portions (23 extending in y direction, figures) extended laterally along a second direction (y direction, figures) different from the first direction (x direction, figures), wherein each of the first connecting portions (23 extending in y direction, figures) laterally connects a pair of the first extending portions (23 extending in x direction, figures) in the second direction (y direction, figures), and the first doped regions (13/23, [46], [55]) form a plurality of first p-n junctions (interfaces between 13/23 and 12, figures) and a plurality of JFET regions (portion of 12 between 13/23s, figures) with the drift layer (12, [46], [64]); a plurality of second doped regions (14/24, [46], [55]) of the first conductivity type disposed within the first doped regions (13/23, [46], [55]), the second doped regions (14/24, [46], [55]) comprising a plurality of second extending portions (24 extending in x direction, figures) extended laterally along the first direction (x direction, figures) and a plurality of second connecting portions (24 extending in y direction, figures) extended laterally along the second direction (y direction, figures), wherein each of the second connecting portions (24 extending in y direction, figures) laterally connects a pair of the second extending portions (24 extending in x direction, figures) in the second direction (y direction, figures), and the second doped regions (14/24, [46], [55]) form a plurality of second p-n junctions (interfaces between 13/23 and 14/24, figures) with the first doped regions (13/23, [46], [55]), and a plurality of channel regions (16, [46]) being provided between the first p-n junctions (interfaces between 13/23 and 12, figures) and the second p-n junctions (interfaces between 13/23 and 14/24, figures) along the main surface (upper surface of 12, figures); a plurality of third doped regions (15/25, [46], [55]) of the second conductivity type disposed in the first extending portions (23 extending in x direction, figures) of the first doped regions (13/23, [46], [55]) and adjacent to the second extending portions (24 extending in x direction, figures) of the second doped regions (14/24, [46], [55]), wherein the third doped regions (15/25, [46], [55]) is at least partially extended with the first (23 extending in x direction, figures) and second (24 extending in x direction, figures) extending portions along the first direction (x direction, figures); a gate insulator (17, [46]) disposed on the main surface (upper surface of 12, figures), wherein the gate insulator (17, [46]) extends over the JFET regions (portion of 12 between 13/23s, figures), the channel regions (16, [46]), and a part of the second doped regions (14/24, [46], [55]); a gate electrode (115, [46]) contacting the gate insulator (17, [46]); and a source electrode (111, [46]) contacting at least a portion of the second extending portions (24 extending in x direction, figures) of second doped regions (14/24, [46], [55]) and the third doped regions (15/25, [46], [55]) through a plurality of contact openings (figures). Regarding claim 2, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen further discloses, in at least figures 1-6B and related text, the first direction (x direction, figures) and the second direction (y direction, figures) are orthogonal. Regarding claim 3, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen further discloses, in at least figures 1-6B and related text, the first extending portions (23 extending in x direction, figures) have a same width and are substantially equally spaced. Regarding claim 4, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen further discloses, in at least figures 1-6B and related text, the first connecting portions (23 extending in y direction, figures) have a same width and are substantially equally spaced. Regarding claim 7, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen further discloses, in at least figures 1-6B and related text, the first connecting portions (23 extending in y direction, figures) have a same length. Regarding claim 8, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen further discloses, in at least figures 1-6B and related text, the first connecting portions (23 extending in y direction, figures) have different lengths. Regarding claim 9, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen further discloses, in at least figures 1-6B and related text, the first extending portions (23 extending in x direction, figures), the second extending portions (24 extending in x direction, figures) and the third doped regions (15/25, [46], [55]) are configured to form a multi-stripe structure in the first direction (x direction, figures) in a plan view of the silicon carbide semiconductor device. Regarding claim 19, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen further discloses, in at least figures 1-6B and related text, the third doped region (15/25, [46], [55]) comprises a plurality of dashed or dotted regions (any regions of 15/25, figures). Regarding claim 20, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen further discloses, in at least figures 1-6B and related text, a channel width density of the active region is higher than 0.2μm-1 ([53]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yen (US 2021/0043736). Regarding claim 17, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen does not explicitly disclose a length of the first connecting portions is ranged between 3.2μm and 100μm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the length of the first connecting portions as claimed in claim 17 in order to optimize the performance of the device in .. It is noted that the selection dimension of the length of the first connecting portions as being no more than use of known technique to improve similar devices in the same way. See MPEP 2143 I. C. It is noted that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person's skill. KSR International Co. v. Teleflex Inc., 550 US 398, 82 USPQ2d 1385, 1389 (2007). In Gardnerv.TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. Furthermore, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. The specification contains no disclosure of either the critical nature of the claimed arrangement (i.e.- a length of the first connecting portions is ranged between 3.2μm and 100μm) or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen limitations or upon another variable recited in a claim, the applicant must show that the chosen limitations are critical. In re Woodruff, 919 F.2d 1575, 1578 (FED. Cir. 1990). Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yen (US 2021/0043736) in view of Rahimo (US 2022/0216331). Regarding claim 18, Yen discloses the silicon carbide semiconductor device of claim 1 as described above. Yen does not explicitly disclose the JFET regions have a second doping concentration of the first conductivity type larger than the first doping concentration. Rahimo teaches, in at least figure 1D and related text, the device comprising the JFET regions (17/4 between 9 and 9, [115], figure) have a second doping concentration of the first conductivity type larger than the first doping concentration (concentration of 4, [115]), for the purpose of enhancing the electron-hole plasma concentration at the emitter side ([115]). Yen and Ueda are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yen with the specified features of Rahimo because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Yen to have the JFET regions having a second doping concentration of the first conductivity type larger than the first doping concentration, as taught by Rahimo, for the purpose of enhancing the electron-hole plasma concentration at the emitter side ([115], Rahimo). Allowable Subject Matter Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1 and 5 that recite "the first extending portions have different widths" in combination with other elements of the base claims 1 and 5. Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1 and 6 that recite "the first connecting portions have different widths" in combination with other elements of the base claims 1 and 6. Claims 10-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 9, and 10 that recite "the multi-stripe structure comprises a plurality of segments, and wherein each of the segments is elongated and runs along an entire width of the active region" in combination with other elements of the base claims 1, 9, and 10. Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 9, and 12 that recite "the width W satisfies the following relationship: 3*W1≤W≤20000*W1 wherein W1 denotes a width of the first connecting portion" in combination with other elements of the base claims 1, 9, and 12. Claims 13-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 9, and 13 that recite "the multi-stripe structure comprises a plurality of segments, and wherein each of the segments is elongated and runs along a portion of an entire width of the active region" in combination with other elements of the base claims 1, 9, and 13. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONG-HO KIM whose telephone number is (571)270-0276. The examiner can normally be reached Monday thru Friday; 8:30 AM to 5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TONG-HO KIM/ Primary Examiner, Art Unit 2811
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Prosecution Timeline

Jun 27, 2024
Application Filed
Aug 12, 2024
Response after Non-Final Action
Jul 23, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
96%
With Interview (+0.7%)
1y 8m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1086 resolved cases by this examiner. Grant probability derived from career allowance rate.

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