DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-20 are pending.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) to TW112124219 for 06/29/2023. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/27/2024 has been considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: MULTIPLE QUANTUM WELL LIGHT EMITTING DEVICE HAVING LAYERS WITH VARIED INDIUM AND GALLIUM CONTENT
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 18 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 18 recites the limitation "first thickness" in line 2. There is insufficient antecedent basis for this limitation in the claim. For the purposes of examination, Claim 18 will be read as dependent on claim 17, and will additionally include the claim limitation ”wherein the barrier layer has a first thickness.”
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5-7, 9, 10, 12-15, and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen (US PGPub 2020/0152830; herein known as Chen).
Regarding claim 1, Chen teaches (Figs. 1A-1E, Fig. 1B), a semiconductor device, comprising: a first semiconductor structure (110, [0023]); a second semiconductor structure (120, [0023]); and an active region (130a, [0024]) between the first semiconductor structure and the second semiconductor structure; wherein the active region comprises a light-emitting region having N pair(s) (M, [0024]) of semiconductor stack(s) (Cn, [0024]), each of the semiconductor stack comprises a well layer (Wn, [0024]) and a barrier layer (Bn, [0024]), in which N is a positive integer greater than or equal to 1 ([0024]), wherein the well layer comprises a first group III-V semiconductor material comprising indium with a first percentage of indium content (>53%, [0046]), the barrier layer comprises a second group III-V semiconductor material comprising indium with a second percentage of indium content (<53%, [0046]), the first group III-V semiconductor material and the second group III-V semiconductor material further comprises phosphorus ([0024]), and the second percentage of indium content is less than the first percentage of indium content ([0046]).
Regarding claim 2, Chen teaches (Figs. 1A-1E), the semiconductor device of claim 1, wherein the first percentage of indium content is greater than or equal to 55% (58%, [Table 1]).
Regarding claim 3, Chen teaches (Figs. 1A-1E), the semiconductor device of claim 1, wherein a difference between the first percentage of indium content (58%, [Table 1]) and the second percentage of indium content (44%, [Table 1]) is greater than or equal to 10% (14%, [Table 1]).
Regarding claim 5, Chen teaches (Figs. 1A-1E), the semiconductor device of claim 1, wherein N is less than or equal to 5 ([0024]).
Regarding claim 6, Chen teaches (Figs. 1A-1E), the semiconductor device of claim 1, wherein the first group III-V semiconductor material and the second group III-V semiconductor material are the same ([0026]). For the purposes of examination, material being the “same” is interpreted to mean that it contains all of the same elements, though concentrations of each element in the compound may vary.
Regarding claim 7, Chen teaches (Figs. 1A-1E), the semiconductor device of claim 6, wherein the first group III-V semiconductor material and the second group III-V semiconductor material are quaternary group III-V semiconductor compound ([0026]).
Regarding claim 9, Chen teaches (Figs. 1A-1E) the semiconductor device of claim 1, wherein the barrier layer (Bn, [0024]) has a first thickness greater than or equal to 100A ([0024]).
Regarding claim 10, Chen teaches (Figs. 1A-1E) the semiconductor device of claim 1, wherein the well layer (Wn, [0024]) has a second thickness less than or equal to 50A ([0024]).
Regarding claim 12, Chen teaches (Figs. 1A-1E, Fig. 1B), the semiconductor device of claim 1, further comprising a base (100, [0021]) located under the first semiconductor structure (120, [0021]).
Regarding claim 13, Chen teaches (Figs. 1A-1E, Fig. 1B), the semiconductor device of claim 12, wherein the well layer (Wn, [0024]) and the base (Bn, [0024]) are lattice-mismatched ([0027]).
Regarding claim 14, Chen teaches (Figs. 1A-1E), the semiconductor device of claim 1, wherein the first percentage of indium content is in a range of 55% to 85% (58%, [Table 1]), and the second percentage of indium content is in a range of 45% to 55% (53%, [Table 1]).
Regarding claim 15, Chen teaches (Figs. 1A-1E) the semiconductor device of claim 1, wherein the first group III-V semiconductor material comprises gallium with a first percentage of gallium content, the second group III-V semiconductor material comprises gallium with a second percentage of gallium content greater than the first percentage of gallium content.
Chen teaches wherein the first group III-V material is described by the equation Alx2Gay2In1-x2-y2As and wherein the second group III-V material is described by the equation Alx1Gay1In1-x1-y1As wherein 1-x2-y2 equals 0.58, and wherein 1-x1-y1 equals 0.44. Chen additionally teaches wherein x1 equals 0.3 and x2 equals 0.18. Therefore, the gallium content of the first group-III material is 1-.18-y2 = 0.58, and the gallium percent is 24%. The gallium content of the second group III-V material is 1-.3-y1 = 0.44, therefore the gallium percent is 26%.
Regarding claim 17, Chen teaches (Figs. 1A-1E, Fig. 1C), the semiconductor device of claim 1, wherein the active region (130a, [0035]) further comprises a first confinement layer (112, [0035]) and a second confinement layer (122, [0035]), and the light-emitting region (130, [0035]) is located between the first confinement layer and the second confinement layer ([0035]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Chen as applied to claim 1 above, and further in view of Lin et al. (US PGPub 2014/0291613; herein known as Lin).
Regarding claim 4, Chen teaches (Figs. 1A-1E) the semiconductor device of claim 1, wherein the barrier layer (Bn, [0024]) has a first thickness ([Table 1]), the well layer (Wn, [0024]) has a second thickness ([Table 1]), but does not explicitly teach the first thickness is at least 2.5 times the second thickness.
In analogous art, Lin teaches (Fig. 1A) wherein the first thickness (H1, [0029]) is at least 2.5 times the second thickness (H2, [0029]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chen and of Lin to include wherein the first thickness is at least 2.5 times the second thickness in order to reduce stresses between layers due to lattice mismatch and reduce propagation of defects (Lin, [0033]).
Claims 8 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Chen as applied to claims 7 and 17 above, and further in view of Tonkikh et al. (US PGPub 2022/0384679; herein known as Tonkikh).
Chen teaches the semiconductor device of claim 7, but does not explicitly teach wherein the first group III-V semiconductor material and the second group III-V semiconductor material are AlGaInP.
In analogous art, Tonkikh teaches (Fig. 15) wherein the first group III-V semiconductor material and the second group III-V semiconductor material are AlGaInP ([0120]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chen and of Tonkikh to include wherein the first group III-V semiconductor material and the second group III-V semiconductor material are AlGaInP in order to increase carrier lifetime through reduced carrier concentration and improve efficiencies of red LEDs (Tonkikh, [0134]).
Regarding claim 19, Chen teaches the semiconductor device of claim 17, but does not explicitly teach wherein the active region further comprises an additional barrier layer located between the light-emitting region and the second confinement layer.
In analogous art, Tonkikh teaches (Fig. 15) wherein the active region further comprises an additional barrier layer (1540, [0153]) located directly on and in contact with the light-emitting region (1530, []0153).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chen and Tonkikh to include wherein the active region further comprises an additional barrier layer located between the light-emitting region and the second confinement layer in order to reduce the diffusion of carriers to the surface region (Tonkikh, [0156]).
Claims 11 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen as applied to claims 1 and 17 above, and further in view of Maros et al. (US PGPub 2021/0234063; herein Maros).
Regarding claim 11, Chen teaches (Figs. 1A-1E, 1C) the semiconductor device of claim 1, wherein the first semiconductor structure (110, [0035]) comprises a first semiconductor layer (114, [0035]) having a dopant concentration ([0037]) but does not explicitly teach less than 3x1018cm-3.
In analogous art, Maros teaches wherein the first semiconductor layer (206, [0041]) has a dopant concentration less than 3X1018cm-3 ([0041]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chen and of Maros to include wherein the first semiconductor layer has a dopant concentration less than 3X1018cm-3 in order to reduce series resistance while, at the same time, minimizing waveguide optical losses associated with the presence of the dopant material (Maros, [0041]).
Regarding claim 20, Chen teaches the semiconductor device of claim 17, but does not explicitly teach wherein the first confinement layer comprising aluminum with a first percentage of aluminum content in a range of 75% to 100%.
In analogous art, Maros teaches wherein the first confinement layer comprising aluminum with a first percentage of aluminum content in a range of 75% to 100% ([0074]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chen and of Maros to include wherein the first confinement layer comprising aluminum with a first percentage of aluminum content in a range of 75% to 100% in order to provide adequate optical and electrical confinement (Maros, [0074]).
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Chen as applied to claim 15 above.
Regarding claim 16, Chen teaches the semiconductor device of claim 15, but does not explicitly teach wherein the first percentage of gallium content is greater than or equal to 25%.
Chen does teach wherein there are many different combinations of compositions of element percentages that can form suitable AlGaInAs materials and wherein the content of each element may be adjusted as a result effective variable for different purposes, such as adjusting the energy gap, modifying peak wavelength of a light emitting device, or lattice matching ([0017]).
The instant application fails to disclose wherein the claimed percentage of gallium content is critical or produces unexpected results. Paragraph 0039 of the specification discloses wherein the first percentage of gallium content may be within a range from 0-50%, or 25-100%.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Chen to include wherein the first percentage of gallium content is greater than or equal to 25% as a result effective variable, in order to suitably match the lattice structures of the wells and barrier layers while also modifying stresses on the underlying substrate ([0027]), thus to vary through routine experimentation, the “the result effective variable of A (result effective at least insofar as B) in order to optimize the functionality of the device (In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955), see MPEP §2144.05.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Chen as applied to claim 17 above, and further in view of Gu et al. (US PGPub 2023/0051484; herein Gu).
Regarding claim 18, Chen teaches the semiconductor device of claim 17, wherein the first confinement layer has a third thickness but does not explicitly teach wherein it is at least 2 times the first thickness.
In analogous art, Gu teaches wherein the first confinement layer has a third thickness which is at least .3um and up to 1um ([0039]). The maximum quantum barrier layer thickness disclosed is 6nm.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chen and of Gu to include wherein the first confinement layer has a third thickness at least 2 times the first thickness in order to suitable trap charge carriers within the active region.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EMILY N FARMER whose telephone number is (703)756-1472. The examiner can normally be reached Monday-Friday 7:30-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EMILY FARMER/Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
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