DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claims 5 and 10 – 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3, 4, 6 – 9 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsujino (US 2014/0008780 A1).
Regarding Claim 1, Tsujino (US 2014/0008780 A1) discloses an electronic component housing package (Fig 1-6) comprising: a base (5,33) comprising a first region (region or portion or area about 3; note that the claim has not structurally limited nor defined this claimed region); a frame (7,9): positioned on the base (5,33); surrounding (see Fig 1-6) the first region; and comprising a first frame side surface (e.g. side surface of 7 extending perpendicular to the base surface on the right side of Fig 2); and a wiring conductor (at 11, at 35) positioned on a surface of the frame (7,9), wherein the frame (7,9) comprises a first projecting portion (region or portion or area about 9 on the right side of Fig 2; note that the claim has not structurally limited nor defined this claimed portion) projecting outward (extending parallel to the base surface) from the first frame side surface (side surface of 7) in a first direction (left-right direction in Fig 2), and wherein the wiring conductor (11,35) comprises: a first conductor (11); and a second conductor (35) spaced outward (see Fig 3) from the first conductor (11) in the first direction, and wherein the first conductor (11) and the second conductor (35) are positioned on the first projecting portion (region about 9) and on a same plane (see Fig 3).
Regarding Claim 3, Tsujino further disclose the electronic component housing package (Fig 1-6) according to claim 1, wherein the frame (7) comprises: a second frame side surface (e.g. side surface of 7) extending perpendicular to the base (5,33) surface on the left side of Fig 2) facing the first frame side surface in the first direction (left-right direction in Fig 2); and a second projecting portion (portion or region of 9 on the left side of Fig 2) projecting outward from the second frame side surface in the first direction, wherein the wiring conductor (11,35) comprises: a third conductor (11 on the left side of Fig 2); and a fourth conductor (21 on the left side of Fig 2) spaced from the third conductor in the first direction, and wherein the third conductor and the fourth conductor are positioned on the second projecting portion and on a same plane (e.g. see Fig 1-6).
Regarding Claim 4, Tsujino further discloses the electronic component housing package (Fig 1-6) according to claim 1, wherein the base (5,33) overlaps the first projecting portion in plan view (see Fig 4; all views would show this overlap of 5,33 and 9).
Regarding Claim 6, Tsujino further discloses the electronic component housing package (Fig 1-6) according to claim 4, wherein the base (5,33) overlaps the first conductor (11) in plan view (see Fig 4; all views would show this overlap).
Regarding Claim 7, Tsujino further discloses the electronic component housing package (Fig 1-6) according to claim 6, wherein the base (5,33) is spaced from the second conductor (35) in plan view (see Fig 4 showing 35 is spaced from 5).
Regarding Claim 8, Tsujino further discloses the electronic component housing package (Fig 1-6) according to claim 1, wherein the frame (7,9) is made of a ceramic material ([0023-0028]).
Regarding Claim 9, Tsujino further discloses the electronic component housing package (Fig 1-6) according to claim 8, wherein the base (5,33) is made of a metal material ([0023]).
Regarding Claim 15, Tsujino further discloses an electronic module (Fig 1-6) comprising: an electronic component (3) positioned on the first region; a lid body (23) positioned on the frame (7,9); and the electronic component housing package according to claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2 is rejected under 35 U.S.C. 103 as being unpatentable over Tsujino (US 2014/0008780 A1) as applied to claim 1 above and further in view of Choi (US 2016/0286649 A1).
Regarding Claim 2, Tsujino discloses the limitations of the preceding claim.
Tsujino further discloses the electronic component housing package (Fig 1-6) according to claim 1, wherein, when a direction along the first frame side surface (side surface of 78) is a second direction (e.g. up-down direction in Fig 2), a plurality of the first conductors (11) is arranged in the second direction.
Tsujino does not disclose a plurality of the second conductors is arranged in the second direction.
Note that Tsujino discusses the first conductor for signals and second conductor for grounding ([0034-0037,0054]).
Choi (US 2016/0286649 A1) teaches of an interface (Fig 7) between one electronic structure (200) to another electronic structure (100) wherein, when a direction along a second direction (e.g. left-right direction in Fig 7), a plurality of the first conductors (FS) is arranged in the second direction and a plurality of the second conductors (FG) is arranged in the second direction.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the package as disclosed by Tsujino, comprising a plurality of the second conductors is arranged in the second direction as taught by Choi, in order to reduce grounding wiring resistance, prevent malfunction, reduce noise, increase the number of wirings, decrease intervals between wiring, and improve miniaturization of electronic devices (Choi, [0073-0078]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Ono (US 2005/0168961 A1) teaches of a package (Fig 4) comprising: a base (30) comprising a first region; a frame (210): positioned on the base; surrounding the first region; and comprising a first frame side surface; and a wiring conductor (about 170) positioned on a surface of the frame, wherein the frame comprises a first projecting portion (portion at 210 about 200) projecting outward from the first frame side surface in a first direction. This could be used in a 103 Rejection.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROSHN K VARGHESE whose telephone number is (571)270-7975. The examiner can normally be reached M-Th: 900 am-300 pm.
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/ROSHN K VARGHESE/Primary Examiner, Art Unit 2847
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