DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to amendment filed on 8/4/2026.
Claims 1, 3, 12, 14, 15, and 19 have been amended.
The objections and rejections from the prior correspondence that are not restated herein are withdrawn.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Narayanaswami et al. (US 2018/0197068), Nagarakatte et al. (US 2023/0376733), Deisher et al. (US 2018/0121796), and Mehendale et al. (US 2024/0104361).
With respect to claim 19, Narayanaswami teaches of a method, comprising: identifying a layer type of a neural network for processing a plurality of input data elements and a plurality of weight data elements (fig. 1, 3; paragraph 29, 44-46; where the instructions include tensor op codes for a convolutional layer or depth-wise convolution layers);
Narayanaswami fails to explicitly teach of (1) in response to the layer type being a first type, routing a singular one of the plurality of weight data elements through a first multiplexer to store the singular one of the plurality of weight data elements in one of a plurality of storage cells of a corresponding processing element; and (2) in response to the layer type being a second type, routing plural ones of the plurality of input data elements through a second multiplexer to store the plural ones of the plurality of input data elements in the plurality of storage cells of the corresponding processing element.
However, Nagarakatte teaches of utilizing input-stationary dataflow (fig. 4-5; paragraph 32, 34-38, 42-46, 66; where input-stationary dataflow can be weight stationary or feature map stationary where one of the inputs is held stationary in the Pes while the other input is broadcast to each PE to ensure data reuse).
The combination of Narayanaswami and Nagarakatte fails to explicitly teach of (1) in response to the layer type being a first type, routing a singular one of the plurality of weight data elements through a first multiplexer to store the singular one of the plurality of weight data elements in one of a plurality of storage cells of a corresponding processing element; and (2) in response to the layer type being a second type, routing plural ones of the plurality of input data elements through a second multiplexer to store the plural ones of the plurality of input data elements in the plurality of storage cells of the corresponding processing element.
However, Deisher teaches of in response to the layer type being a first type, routing a singular one of the plurality of weight data elements to store the singular one of the plurality of weight data elements in one of a plurality of storage cells and in response to the layer type being a second type, routing plural ones of the plurality of input data elements to store the plural ones of the plurality of input data elements in the plurality of storage cells (paragraph 316-317; where the placement of the weight values and data for the layers are directed into an internal buffer depending on the layer type).
The combination of Narayanaswami, Nagarakatte, and Deisher fails to explicitly teach of (1) routing a singular one of the plurality of weight data elements through a first multiplexer and (2) routing plural ones of the plurality of input data elements through a second multiplexer.
However, Mehendale teaches of routing a singular one of the plurality of weight data elements through a first multiplexer to store the singular one of the plurality of weight data elements in one of a plurality of storage cells of a corresponding processing element (fig. 5, 13; paragraph 99, 101-102; where the weight multiplexer fetches the weight elements in a weight register and forwards them to the engine); and
routing plural ones of the plurality of input data elements through a second multiplexer to store the plural ones of the plurality of input data elements in the plurality of storage cells of the corresponding processing element, respectively (fig. 5, 13; paragraph 99, 101-102; where the input data multiplexer fetches all the input data elements stored in an input data register and forwards them to the engine).
The combination of, Narayanaswami, Nagarakatte, Deisher and Mehendale teaches of in response to the layer type being a first type, routing a singular one of the plurality of weight data elements through a first multiplexer to store the singular one of the plurality of weight data elements in one of a plurality of storage cells of a corresponding processing element (Nagarakatte, fig. 4-5; paragraph 32, 34-38, 42-46, 66; Deisher, paragraph 316-317; Mehendale paragraph 99, 101-102; where the placement of the weight values and data for the layers are directed into an internal buffer via the multiplexer of Mehendale depending on the layer type. In the combination with Nagarakatte and Narayanaswami, the layer type is an input stationary layer that is a weight stationary data flow, each PE receives a weight); and
in response to the layer type being a second type, routing plural ones of the plurality of input data elements through a second multiplexer to store the plural ones of the plurality of input data elements in the plurality of storage cells of the corresponding processing element (Nagarakatte, fig. 4-5; paragraph 32, 34-38, 42-46, 66; Deisher, paragraph 316-317; Mehendale paragraph 99, 101-102; where the placement of the weight values and data for the layers are directed into an internal buffer via the multiplexer of Mehendale depending on the layer type. In the combination with Nagarakatte and Narayanaswami, the layer type is an input stationary layer that is a feature map/input stationary data flow, the PEs receive the feature map).
Narayanaswami and Nagarakatte are analogous art because they are from the same field of endeavor, as they involve managing weights and inputs for neural network layers.
It would have been obvious to one of ordinary skill in the art having the teachings of Narayanaswami and Nagarakatte before the time of the effective filing of the claimed invention to incorporate the input-stationary dataflow of Nagarakatte in Narayanaswami. Their motivation would have been to more efficiently implement the neural network layers.
Narayanaswami, Nagarakatte, and Deisher are analogous art because they are from the same field of endeavor, as they involve managing weights and inputs for neural network layers.
It would have been obvious to one of ordinary skill in the art having the teachings of Narayanaswami, Nagarakatte, and Deisher before the time of the effective filing of the claimed invention to incorporate the directing the placement of the data and weights based on the layer type in the combination of Narayanaswami and Nagarakatte as taught in Deisher. Their motivation would have been to provide for more flexibility in the neural network layers.
Narayanaswami, Nagarakatte, Deisher, and Mehendale are analogous art because they are from the same field of endeavor, as they involve managing weights and inputs for neural network layers.
It would have been obvious to one of ordinary skill in the art having the teachings of Narayanaswami, Nagarakatte, Deisher, and Mehendale before the time of the effective filing of the claimed invention to incorporate using the multiplexers of Mehendale to route the weights and data inputs in the combination of Narayanaswami, Nagarakatte, and Deisher as taught in Mehendale. Their motivation would have been to efficiently input the weights and data inputs to the PEs.
With respect to claim 20, Narayanaswami teaches of wherein the first type includes a regular convolutional layer or an attention layer, and the second type includes a depth-wise convolutional layer (fig. 3; paragraph 45-46; where instructions can include tensor op codes for a convolution layer or depth-wise convolution layers).
The reasoning for obviousness is the same as indicated above with respect to claim 19.
Allowable Subject Matter
Claims 1-18 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Mehendale et al. (US 2024/0104361) discloses a weight multiplexer and a input data multiplexer, where depending on the configuration the multiplexers can select either all or duplicates of half of the weight or input data elements and route them to the MAC engine. See fig. 13; paragraphs 99-104. However, Mehendale does not disclose the multiplexer configuration presented in the present claims 3 or 15.
Lee et al. (US 20230022516) discloses multiplexers that are coupled to sense amplifiers and are used to select a weight value from the memory and output it to the multiply circuitry. See fig. 4; paragraph 32-33. However, Lee does not disclose the multiplexer configuration presented in the present claims 1 or 12.
Yang (US 11,803,756) discloses changing a neural network model based on the dedicated hardware device it is being carried out on. The mode of the neural network model is changed based on if the hardware device is a weight stationary dataflow type or is an output stationary dataflow type. However, Yang does not disclose the multiplexer configuration presented in the present claims 1 or 12.
Nagarakatte et al. (US 2023/0376733) discloses a dynamically reconfigurable general matrix-matrix multiplication block (GEMM block) of processing elements (PEs) that can be configured into a tall array or individual square arrays. This is done by configurint the GEMM block for either an input-stationary dataflow or an output-stationary data flow. The input-stationary dataflow can be a weight stationary dataflow or a feature map stationary dataflow. However, Nagarakatte does not disclose the multiplexer configuration presented in the present claims 1 or 12.
With respect to claim 1, the prior art does not teach or suggest, “wherein the data router includes: a first multiplexer having a first input connected to the second buffer and a second input connected to the first buffer; and a second multiplexer having a third input connected to the second buffer and a fourth input connected to the first buffer,” in the context of the claims.
With respect to claim 12, the prior does not teach or suggest, “wherein the memory circuit further comprises a data router configured to receive the control signal and comprising: a first multiplexer having a first input configured to receive at least one of the second data elements and a second input configured to receive at least one of the first data elements; and a second multiplexer having a third input configured to receive at least one of the second data elements and a fourth input configured to receive at least one of the first data elements,” in the context of the claims.
Response to Arguments
Applicant's arguments with respect to claim 19 have been considered but are moot because of the new reference(s) being applied, in light of the amendment, to the particular limitations the arguments are referencing. Thereby the arguments no longer apply to the rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
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MICHAEL C. KROFCHECK
Primary Examiner
Art Unit 2138
/Michael Krofcheck/Primary Examiner, Art Unit 2138
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