Prosecution Insights
Last updated: October 01, 2026
Application No. 18/757,429

ELECTRO-OPTICAL DEVICE AND ELECTRONIC DEVICE

Non-Final OA §103
Filed
Jun 27, 2024
Priority
Jun 29, 2023 — JP 2023-106807
Examiner
NGUYEN, NIKI HOANG
Art Unit
Tech Center
Assignee
Seiko Epson Corporation
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
862 granted / 948 resolved
+30.9% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
15 currently pending
Career history
956
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
41.8%
+1.8% vs TC avg
§102
34.7%
-5.3% vs TC avg
§112
11.0%
-29.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 948 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 06/27/2024 has been considered by the examiner. Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Miyazaki (US 20110013102), and further in view of Tatsuya (JP 2012155118). Regarding claim 1, Miyazaki teaches an electro-optical device in fig. 9 comprising: a transistor (refer to 351 in fig. 9); a pixel electrode (refer to 352 in fig. 9) provided on a light incidence side of the transistor; a lens layer (refer to 344A in fig. 9) provided in a layer between the transistor and the pixel electrode; and a first relay layer (refer to 373 in fig. 10) that is provided in a layer between the lens layer and the pixel electrode and electrically connected to the pixel electrode (see fig. 10). Miyazaki fails to teach the first relay layer includes WSi. Tatsuya teaches the same field of an endeavor wherein a relay layer includes WSi. Thus, it would have been obvious to one having ordinary skills in the art before the invention was made to use WSi as the material of the first relay layer as taught by Tatsuya in the teaching of Miyazaki because Tungsten silicide is commonly known in the art to have a good electrical conductivity, high temperature stability and also limiting interaction with optical mode. Thus, it is a good material for the relay layer between the pixel electrode and lens layer. Regarding claim 6, Miyazaki and Tatsuya teach all the limitations of claimed invention for the same reasons as set forth above. Besides, Miyazaki teaches the electro-optical device according to claim 1 (see fig. 9). Allowable Subject Matter Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “a data line extending in a first direction; a scanning line extending in a second direction intersecting the first direction; and a second relay layer that is provided in a layer between the transistor and the lens layer and electrically connected to the first relay layer, wherein the second relay layer includes a main body portion overlapping the transistor in plan view, a first protruding portion protruding from the main body portion in the first direction, and a second protruding portion protruding from the main body portion in the second direction, and the main body portion, the first protruding portion, and the second protruding portion include WSi.” Claims 3-4 include all the limitations of claim 2. Regarding claim 5, the prior art of record alone or in combination neither teaches nor makes obvious the invention of a semiconductor fuse arrangement wherein “ a second relay layer that is provided in a layer between the transistor and the lens layer and electrically connected to the first relay layer, wherein the second relay layer includes a main body portion overlapping the transistor in plan view, a first protruding portion protruding from the main body portion in the first direction, and a second protruding portion protruding from the main body portion in the second direction, and the main body portion, the first protruding portion, and the second protruding portion include WSi” in combination of all of the limitations of claim 5. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Niki Tram Nguyen whose telephone number is (571) 272-5526. The examiner can normally be reached on 6:00am-4:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Steven Loke can be reached on (703)872-9306. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NIKI H NGUYEN/ Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Jun 27, 2024
Application Filed
Sep 22, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751323
DIRECT BONDING METHODS AND STRUCTURES
3y 6m to grant Granted Sep 29, 2026
Patent 12751293
PACKAGE STRUCTURE WITH TRANSMISSION LINE AND METHOD FOR MANUFACTURING THE SAME
3y 3m to grant Granted Sep 29, 2026
Patent 12751330
SEMICONDUCTOR PACKAGE
3y 2m to grant Granted Sep 29, 2026
Patent 12740185
METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE
2y 11m to grant Granted Sep 15, 2026
Patent 12740074
SEMICONDUCTOR DEVICE
2y 6m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
96%
With Interview (+5.1%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 948 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month