DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-8, 10-17, and 19-22 are pending in this office action and presented for examination. Claims 1-8, 10-16, and 19-20 are newly amended; claims 9 and 18 are newly cancelled; and claims 21-22 are newly added by the response received April 28, 2026.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 10 and 12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 10 recites the limitation “the undefined portion is a register identifier field, the defined portion includes a plurality of register values corresponding to the register identifier field, and the in-memory processor is further configured to coalesce the plurality of register values during execution of the data instruction” in lines 1-5. However, this subject matter was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. For example, the defined portion including a plurality of register values corresponding to the register identifier field does not appear to be described in the specification (e.g., paragraphs [0083], [0084], [0089], [0090], [0091], [0092], [0095], and [0097]) in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 12 recites the limitation “a command buffer index that maintains the PIM command including the data instruction” in lines 3-4. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., paragraphs [0039], [0065], and [0088]) does not appear to provide support for a command buffer index being that which maintains the PIM command including the data instruction.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-8, 10-17, and 19-22 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “identify an instruction delta that is an undefined portion of a data instruction of a processing-in-memory (PIM) command in a command buffer and that remains undefined until the data instruction is executed” in lines 4-6. Claim 1 further recites the limitation “decode the instruction delta into a defined portion of the data instruction to be used in place of the undefined portion to execute the data instruction” in lines 7-9. However, the metes and bounds of these limitations are indefinite. For example, the former limitation appears to imply that the instruction delta is an undefined portion of a data instruction until the data instruction is executed (i.e., until the data instruction is in an executed status, rather than, for example, a mid-execution status or a yet-to-start-executing status). However, the latter limitation appears to convey that the instruction delta is not an undefined portion of a data instruction until the data instruction is executed, because a defined portion of the data instruction, to be used in place of the undefined portion of the data instruction, is to be used “to execute” the data instruction. Therefore, the former limitation and the latter limitation appear to be at odds with each other.
Claims 2-8, 10, and 21-22 are rejected for failing to alleviate the rejection of claim 1 above.
Claim 7 recites the limitation “The system of claim 6, wherein the undefined portion of the conditional instruction is a register identifier field for storing a reference value used during execution or a result of the execution” in lines 1-4. Claim 1, upon which claim 7 is indirectly dependent, recites the limitation “identify an instruction delta that is an undefined portion of a data instruction of a processing-in-memory (PIM) command in a command buffer and that remains undefined until the data instruction is executed” in lines 4-6. However, the metes and bounds of these limitations are indefinite. For example, the limitation of claim 1 appears to imply that the instruction delta is an undefined portion of a data instruction until the data instruction is executed (i.e., until the data instruction is in an executed status, rather than, for example, a mid-execution status or a yet-to-start-executing status). However, the limitation of claim 7 appears to convey that the register identifier field is no longer an undefined portion (because it stores a reference value used during execution) during execution of the conditional instruction. Therefore, the limitation of claim 1 and the limitation of claim 7 appear to be at odds with each other.
Claim 10 recites the limitation “wherein the undefined portion is a register identifier field, the defined portion includes a plurality of register values corresponding to the register identifier field, and the in-memory processor is further configured to coalesce the plurality of register values during execution of the data instruction” in lines 1-5. Claim 1, upon which claim 7 is indirectly dependent, recites the limitation “identify an instruction delta that is an undefined portion of a data instruction of a processing-in-memory (PIM) command in a command buffer and that remains undefined until the data instruction is executed” in lines 4-6. However, the metes and bounds of these limitations are indefinite. For example, the limitation of claim 1 appears to imply that the instruction delta is an undefined portion of a data instruction until the data instruction is executed (i.e., until the data instruction is in an executed status, rather than, for example, a mid-execution status or a yet-to-start-executing status). However, the limitation of claim 10 appears to convey that the register identifier field is no longer an undefined portion (because it includes register values during execution of the data instruction) during execution of the data instruction. Therefore, the limitation of claim 1 and the limitation of claim 10 appear to be at odds with each other.
Claim 11 recites the limitation “identify an instruction delta that is an undefined portion of a data instruction of a processing-in-memory (PIM) command in a command buffer and that remains undefined until the data instruction is executed” in lines 3-5. Claim 11 further recites the limitation “decode, using a delta decode unit, the instruction delta into a defined portion of the data instruction to be used during execution of the data instruction in place of the undefined portion” in lines 6-8. However, the metes and bounds of these limitations are indefinite. For example, the former limitation appears to imply that the instruction delta is an undefined portion of a data instruction until the data instruction is executed (i.e., until the data instruction is in an executed status, rather than, for example, a mid-execution status or a yet-to-start-executing status). However, the latter limitation appears to convey that the instruction delta is not an undefined portion of a data instruction until the data instruction is executed, because a defined portion of the data instruction, to be used in place of the undefined portion of the data instruction, is to be used “during execution of” the data instruction. Therefore, the former limitation and the latter limitation appear to be at odds with each other.
Claim 11 recites the limitation “identify an instruction delta that is an undefined portion of a data instruction of a processing-in-memory (PIM) command in a command buffer and that remains undefined until the data instruction is executed” in lines 3-5. Claim 11 further recites the limitation “execute, using an arithmetic logic unit, the data instruction based on the defined portion” in lines 9-10. However, the metes and bounds of these limitations are indefinite. For example, the former limitation appears to imply that the instruction delta is an undefined portion of a data instruction until the data instruction is executed (i.e., until the data instruction is in an executed status, rather than, for example, a mid-execution status or a yet-to-start-executing status). However, the latter limitation appears to convey that the instruction delta is not an undefined portion of a data instruction until the data instruction is executed, because execution of the data instruction is based on a defined portion of the data instruction. Therefore, the former limitation and the latter limitation appear to be at odds with each other.
Claims 12-17 are rejected for failing to alleviate the rejections of claim 11 above.
Claim 15 recites the limitation “coalesce the plurality of the register values based on the defined portion during the execution of the data instruction” in lines 3-5. Claim 11, upon which claim 15 is indirectly dependent, recites the limitation “identify an instruction delta that is an undefined portion of a data instruction of a processing-in-memory (PIM) command in a command buffer and that remains undefined until the data instruction is executed” in lines 3-5. However, the metes and bounds of these limitations are indefinite. For example, the limitation of claim 11 appears to imply that the instruction delta is an undefined portion of a data instruction until the data instruction is executed (i.e., until the data instruction is in an executed status, rather than, for example, a mid-execution status or a yet-to-start-executing status). However, the limitation of claim 15 appears to convey use of the defined portion during the execution of the data instruction. Therefore, the limitation of claim 11 and the limitation of claim 15 appear to be at odds with each other.
Claim 16 recites the limitation “the delta decode unit configures the arithmetic logic unit to execute the data instruction based on the defined portion and the plurality of coalesced register values” in lines 2-4. Claim 11, upon which claim 16 is indirectly dependent, recites the limitation “identify an instruction delta that is an undefined portion of a data instruction of a processing-in-memory (PIM) command in a command buffer and that remains undefined until the data instruction is executed” in lines 3-5. However, the metes and bounds of these limitations are indefinite. For example, the limitation of claim 11 appears to imply that the instruction delta is an undefined portion of a data instruction until the data instruction is executed (i.e., until the data instruction is in an executed status, rather than, for example, a mid-execution status or a yet-to-start-executing status). However, the limitation of claim 16 appears to convey that execution of the data instruction is based on the defined portion. Therefore, the limitation of claim 11 and the limitation of claim 16 appear to be at odds with each other.
Claim 19 recites the limitation “an instruction delta that is an undefined portion of a data instruction in a command buffer” in lines 2-3. However, instant paragraph [0021] discloses ‘As used herein, the term “instruction deltas” refers to undefined portions of data instructions (e.g., contained in PIM commands) that remain undefined (e.g., in a command buffer) until the data instruction is executed.’ Therefore, the metes and bounds of “instruction delta” are indefinite. For example, the definition that appears to be conveyed via the limitation appears to be different in scope from the definition that appears to be conveyed via paragraph [0021] (after extrapolating the “singular” definition from the “plural” definition). For example, it is unclear as to whether the metes and bounds of claim 19 necessitate that the recited data instruction is contained in a PIM command. For example, it is unclear as to whether the metes and bounds of claim 19 necessitate that the recited instruction delta remains undefined until the data instruction is executed.
Claim 20 is rejected for failing to alleviate the rejection of claim 19 above.
Response to Arguments
Applicant on page 7 argues: “Claims 1-8, 10-13, 17, 19, and 20 are rejected under 35 U.S.C. § 101 because the claimed invention is allegedly directed to an abstract idea without significantly more. Applicant disagrees. Nevertheless, Applicant amends the claims as discussed during the interview and indicated above to address these issues.”
In view of the aforementioned amendments and associated arguments, the previously pending rejections under 35 U.S.C. § 101 are withdrawn.
Applicant on page 13 argues: “Claims 11, 13, and 17 are rejected under 35 U.S.C. § 112(a) or pre-AIA 35 U.S.C. § 112, first paragraph, because the claim purports to invoke 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph, but allegedly fails to recite a combination of elements as required by that statutory provision and thus cannot rely on the specification to provide the structure, material or acts to support the claimed function (Office Action, p. 3). Applicant amends the claims as indicated above to address these issues. Accordingly, Applicant respectfully requests that the § 112(a) rejections are withdrawn.”
In view of the aforementioned amendment, the associated previously presented rejection is withdrawn.
Applicant on page 13 argues: “Claims 4, 5, 7, and 10 are rejected under 35 U.S.C. § 112(a) or 35 U.S.C. § 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement because the claim(s) are alleged to contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. § 112, the inventor(s), at the time the application was filed, had possession of the claimed invention (Office Action, p. 3). Applicant disagrees. Nevertheless, Applicant amends the claims as indicated above to address these issues. Accordingly, Applicant respectfully requests that the § 112(a) rejections are withdrawn.”
Most previously pending rejections of the claims under 35 U.S.C. §112(a) are withdrawn in view of the amendments to the claims. However, at least one facet of one previously presented rejection under 35 U.S.C. §112(a) remains applicable (see the rejection of claim 10), and in one case the amendments to the claims introduce additional subject matter that does not appear to be supported by the original disclosure — see the Claim Rejections - 35 USC § 112 section above.
Applicant on page 13 argues: “Claims 1-8, 10-17, 19, and 20 are rejected under 35 U.S.C. § 112(b) or 35 U.S.C. § 112 (pre-AIA ), second paragraph, as allegedly being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. § 112, the applicant), regards as the invention (Office Action, p. 6). Applicant amends the claims as indicated above to address these issues. Accordingly, Applicant respectfully requests that the § 112(b) rejections are withdrawn.”
Most previously presented rejections of the claims under 35 U.S.C. § 112, second paragraph, are withdrawn in view of the amendments to the claims. However, one previously presented rejection under 35 U.S.C. § 112, second paragraph, remains applicable (see the rejection of claim 19), and in various cases the amendments to the claims introduce additional indefinite subject matter; see the Claim Rejections - 35 USC § 112 section above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEITH E VICARY whose telephone number is (571)270-1314. The examiner can normally be reached Monday to Friday, 9:00 AM to 5:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached at (571)270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/KEITH E VICARY/Primary Examiner, Art Unit 2183
Prosecution Insights