Office Action Predictor
Last updated: April 16, 2026
Application No. 18/759,218

3-DIMENSIONAL NOR MEMORY ARRAY WITH VERY FINE PITCH: DEVICE AND METHOD

Non-Final OA §103§112
Filed
Jun 28, 2024
Examiner
MILLER, JAMI VALENTINE
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sunrise Memory Corporation
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
1y 11m
To Grant
97%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allow Rate
1011 granted / 1067 resolved
+26.8% vs TC avg
Minimal +2% lift
Without
With
+1.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
23 currently pending
Career history
1090
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
27.2%
-12.8% vs TC avg
§102
45.7%
+5.7% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1067 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1-35 are pending in this application. Acknowledgement is made of the amendment received 8/28/25 amending claim 1 and withdrawing claims 15-35. Election/Restrictions Applicant’s election without traverse of Group I (Claims1-14) in the reply filed on 8/28/25 is acknowledged. Claims 15-35 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected inventions, there being no allowable generic or linking claim. Claims 1-14 are examined in this Office action. Information Disclosure Statement An information disclosure statement has not been received. If the applicant is aware of any prior art or any other co-pending applications not already of record, he/she is reminded of his/her duty under 37 CFR 1.56 to disclose the same. Drawings There are no objections or rejections to the drawings. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 1 recites the limitation “a NOR memory string associated with a first conductor and a second conductor device”. It is unclear what is meant by associated with. One reasonable interpretation is that the NOR memory string is located on the first and second conductor device. Another reasonable interpretation is that the NOR memory string is electrically connected in some way to the first and second conductor device. The limitation does not have well defined boundaries. One of ordinary skill in the relevant art would not know what structures/steps are covered by the limitation. For these reasons, the claim is indefinite. Claims 2-14 depend from rejected claim 1, include all limitations of claim 1 and therefore are rejected for the same reason. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under pre-AIA 35 U.S.C. 103(a) are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-5, 7 and 8 are rejected under pre-AIA 35 U.S.C. 103 as being unpatentable over Harari et al. (US Patent Application Publication No 2017/0092370) hereinafter referred to as Harari. Insofar as definite, per Claim 1 Harari discloses a NOR memory string (see figure 3) associated with a first conductor (151b) and a second conductor (151n) device, comprising first (222) and second (303) storage transistors sharing a common drain region (221) and a common source region (223), (as shown in figure 3) the first conductor (151b) serving as gate electrode to the first storage transistor (222) and the second conductor (151n) serving as gate electrode to the second storage transistor (303), each storage transistor having a channel region (described in [0014]) and a data storage layer provided between its gate electrode and its channel region, (described in [0014]) Harari does not teach wherein at least one of the following conditions is true: (i) the first conductor and the second conductor have different compositions, (ii) the data storage layer of the first storage transistor and the data storage layer of the second storage transistor have different compositions, and (iii) the data storage layer of the first storage transistor surrounds its gate electrode and the data storage layer of the second storage transistor does not surround its gate electrode For the first condition, Harari is silent on the composition of materials used for the first and second conductors. Notwithstanding, it would have been obvious to one of ordinary skill in the art to choose materials of different compositions for the first and second conductors in order to take advantage of the commonly understood benefits, such as, compatibility of fabrication. Further it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for its intended use as a matter of design choice. In re Leshin, 125 USPQ 416. Insofar as definite, per Claim 2 Harari discloses the device of claim 1 including where the first conductor (151b) is adjacent a portion of the data storage layer of the second storage transistor (303). (as shown in figure 3) Insofar as definite, per Claim 3 Harari discloses the device of claim 1 including where the first conductor (151b) comprises a refractory metal. [0064] Insofar as definite, per Claim 4 Harari discloses the device of claim 1 including where the first conductor comprises a material selected from a group consisting of titanium, titanium nitride, tantalum nitride, tantalum, tungsten nitride, tungsten, cobalt, heavily-doped p* polysilicon, heavily-doped n* polysilicon, and silicides. [0064] Insofar as definite, per Claim 5 Harari discloses the device of claim 1 including where (see figure 3) the data storage layer of the first storage transistor comprises an oxide-nitride-oxide triple-layer [0062]. Insofar as definite, per Claim 7 Harari discloses the device of claim 1 including where (see figure 3) the first and second storage transistors each comprise a thin-film transistor formed above a planar surface of a semiconductor substrate (Si substrate, thin film transistors both disclosed in [0006]). Insofar as definite, per Claim 8 Harari discloses the device of claim 1 including where (see figure 3) the NOR memory string is one of a plurality of NOR memory strings formed in a 3-dimensional semiconductor structure. (described in [0008]) Allowable Subject Matter Claims 6 and 9-14 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Cited Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicants are directed to consider additional pertinent prior art included on the Notice of References Cited (PTOL 892) attached herewith. The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMI VALENTINE MILLER whose telephone number is (571)272-9786. The examiner can normally be reached on Monday-Thursday 7am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached on (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Jami Valentine Miller/Primary Examiner, Art Unit 2818
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Prosecution Timeline

Jun 28, 2024
Application Filed
Nov 21, 2025
Non-Final Rejection — §103, §112
Apr 01, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
97%
With Interview (+1.9%)
1y 11m
Median Time to Grant
Low
PTA Risk
Based on 1067 resolved cases by this examiner. Grant probability derived from career allow rate.

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