Prosecution Insights
Last updated: October 23, 2026
Application No. 18/759,385

High Throughput High Dynamic Range (HDR) Microscopy

Non-Final OA §101§102§103§112
Filed
Jun 28, 2024
Examiner
THIRUGNANAM, GANDHI
Art Unit
2672
Tech Center
2600 — Communications
Assignee
Wolfspeed Inc.
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
424 granted / 580 resolved
+11.1% vs TC avg
Moderate +13% lift
Without
With
+13.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
24 currently pending
Career history
622
Total Applications
across all art units

Statute-Specific Performance

§101
9.7%
-30.3% vs TC avg
§103
37.5%
-2.5% vs TC avg
§102
19.6%
-20.4% vs TC avg
§112
29.3%
-10.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 580 resolved cases

Office Action

§101 §102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of group 1 (claims 1-19) in the reply filed on 8/11/2026 is acknowledged. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-5,10-16, 18-19, 21 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract idea of combining images without significantly more. The claim(s) 1 recite(s) “ obtaining a plurality of images of at least a portion of a semiconductor workpiece, each of the plurality of images associated with exposing the at least a portion of the semiconductor workpiece to radiation at a different radiation intensity;”, which is directed to an extra-solution activity (presolution) of receiving input data. See MPEP 2106.05(g) “generating a composite workpiece image of at least a portion of the semiconductor workpiece based at least in part on the plurality of images.”, which is directed to the abstract idea of combining images together. For example a person could tape images together to generate a composite image (See the concept of panoramics). The additional element of “semiconductor device” is a filed of use limitation. See MPEP 2106.05(h) This judicial exception is not integrated into a practical application. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The dependent claims do not add additional element that amount to significantly more. Claim 20 recites “obtaining one or more images of at least a portion of a semiconductor workpiece; “, which is directed to an extra-solution activity (presolution) of receiving input data. See MPEP 2106.05(g) “obtaining a response function correlating an intensity of a radiation source with pixel values, wherein the response function is determined based at least in part on a plurality of sample images associated with exposing at least a portion of one or more semiconductor workpieces with different radiation intensities; and “which is directed to an extra-solution activity (presolution) of receiving input data. See MPEP 2106.05(g). Examiner Note: obtaining Is defined as acquiring, for example could simply look up a function in table. “generating transformed image data based at least in part on the response function.” Is directed to an abstract idea of mentally creating an image. For example could look at a response function simply copy it onto a piece of paper. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 9 and 11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 9 recites “determining the pixel value range is monotonic”. It is not clear what Applicant is attempting to claim. A range is a set of one or more values. “monotonic” is a property of a function. Claim 11 recites “wherein spatially correlating …”, but claim 10 recites “spatially coordinating”. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-2, 4-5, 10-12, 16, 18-19 and 21 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Pawlowski (PGPub 2024/0272058). Pawlowski discloses 1. A method, comprising: obtaining a plurality of images of at least a portion of a semiconductor workpiece, each of the plurality of images associated with exposing the at least a portion of the semiconductor workpiece to radiation at a different radiation intensity; and generating a composite workpiece image of at least a portion of the semiconductor workpiece based at least in part on the plurality of images. (Pawlowski, paragraph 129,” [0129] In one aspect, a system illuminates different areas of a front side of the lithographic patterning device and a back side of the lithographic patterning device using ROI illumination, which can reduce the rate of false positive detections. This may help reduce delays in the inspection process caused by searching for contamination that may not exist, or by misidentifying where contamination is located. In one aspect, the system may illuminate with arbitrarily selected irradiance levels and acquire high dynamic range (HDR) data using a camera and/or projector. In one aspect, ROIs may have individually controllable shapes and ROI overlap area can be controlled by electronically controlling a position of the illuminated area. These features, including the ability to select ROI overlap area shape, enable flexibility in the stitching algorithm.”) Pawlowski discloses 2. The method of claim 1, wherein the composite workpiece image is a high dynamic range (HDR) image of the semiconductor workpiece.(Pawlawski, paragraph 129, “HDR”) Pawlowski discloses 4. The method of claim 1, wherein obtaining the plurality of images of at least a portion of the semiconductor workpiece comprises illuminating the at least a portion of the semiconductor workpiece with a radiation source having a non-uniform radiation distribution.(Pawlowski, pargarh 179, “ Inspection system 2600 can be further configured to illuminate and detect particles with a structured light pattern and operate in a bright field mode or a dark field mode”, additionally see paragraphs 181, 185, 213, etc., where structured light has non-uniform distribution) Pawlowski discloses 5. The method of claim 1, wherein the plurality of images are captured with a same exposure time. (See paragraph 147 and Fig. 15; where the time to acquire (exposure ) remains the same for each image, yet the irradiance value can be changed.) Pawlowski discloses 10. The method of claim 1, wherein generating the composite workpiece image comprises spatially coordinating the plurality of images.(Pawlowski, Fig. 6, where image stiching requires spatially coordinating a plurality of images) Pawlowski discloses 11. The method of claim 10, wherein spatially correlating the plurality of images comprises: generating scaled spatial coordinates for each of the plurality of images; determining an affine transformation for each of the plurality of images based at least in part on the scaled spatial coordinates.(Pawlowski, paragraph 149 AND 126 “[149] In order to minimize an area irradiated by a projection sub-system, a transformation between local coordinates of illumination system 1504 and local coordinates of imaging detector 1506 can be determined to precisely adjust size, position and orientation of area irradiated by illumination system 1504 onto lithographic patterning device 1502. For example, this can be done by finding transformation T which relates local coordinates of illumination system (x′, y′, z′) with local coordinates of image detector (x,y,z).” discloses scaling coordinate during acquisition and “[0126] In some examples, an entire lithographic patterning device (i.e., reticle) or only portions of the lithographic patterning device can be scanned. Moreover, an ROI and a FOV can overlap or be mutually exclusive depending on specific application needs. In some aspects, mutually exclusive ROIs and FOVs contribute to increased productivity (e.g. reduced measurement time=higher throughput.) Additionally, overlapping ROIs and FOVs may be used to improve stitching, as particles observed in two data sets may be used to compensate for system imperfections like vibration related image shifts, stage accuracy, and the like. In one aspect, combined ROIs do not have to cover an entire FOV. Given a detector size and magnification of an optical system, size of a FOV can be calculated. For example, if DX and DY are the width and height of the FOV respectively, given reticle width w.sub.reticle and height h.sub.reticle, one may calculate a number of FOV in x direction as follows: …”) Pawlowski discloses 12. The method of claim 1, further comprising: determining one or more workpiece characteristics of the semiconductor workpiece based at least in part on the composite workpiece image. (Pawlowski, paragraph 125, “used to detect particles”) Pawlowski discloses 16. The method of claim 1, further comprising: modifying a fabrication process associated with the semiconductor workpiece based at least in part on the composite workpiece image. (Pawlowski, paragraph 5, “For example, metrology processes are used to measure one or more characteristics of a substrate, such as a relative location (e.g., registration, overlay, alignment, etc.) or dimension (e.g., line width, critical dimension (CD), thickness, etc.) of features formed on the substrate during the patterning process, such that, for example, the performance of the patterning process can be determined from the one or more characteristics. If the one or more characteristics are unacceptable (e.g., out of a predetermined range for the characteristic(s)), one or more variables of the patterning process may be designed or altered, e.g., based on the measurements of the one or more characteristics, such that substrates manufactured by the patterning process have an acceptable characteristic(s).”) Pawlowski discloses 18. The method of claim 1, wherein the composite workpiece image comprises data associated with each of a plurality of different radiation intensities for the at least a portion of the workpiece. (See claim 1) Pawlowski discloses 19. A semiconductor workpiece inspection system, comprising: an imaging device; a radiation source; a workpiece holder operable to receive a semiconductor workpiece; and control circuitry operable to perform operations, comprising: obtaining a plurality of images of at least a portion of a semiconductor workpiece, each of the plurality of images associated with exposing the at least a portion of the semiconductor workpiece to radiation at a different radiation intensity; and generating a composite workpiece image of at least a portion of the semiconductor workpiece based at least in part on the plurality of images. (See claim 1) Pawlowski discloses 21. (New) The method of claim 1, wherein the semiconductor workpiece comprises a plurality of measurement areas, and wherein obtaining the plurality of images comprises obtaining a plurality of image segments for each measurement area of the plurality of measurement areas for a plurality of illumination instances.(Pawlowski, paragraph 146-148; Fig. 13-14, “0146] FIG. 13 illustrates a grid of rectangular fields of view 1300 covering an entire surface of a lithographic patterning device 1302, according to some embodiments. … In some aspects, grid 1300 can be divided into M×N FOVs 1304. Each FOV 1304 can be divided into several ROIs that may be illuminated separately. The ROIs may also be illuminated sequentially, as further illustrated in FIG. 14.”; “[147]… In the example provided in FIG. 14, a series of 8 images taken at times t0 to t7 are recorded. …. According to some embodiments, radiation operation 1400 can begin by illuminating a first ROI 1406 within FOV 1404 at an initial time, t.sub.0, then a second ROI 1408 at time t1, then a third ROI 1410 at t2, then a fourth ROI 1412 at t3, then a fifth ROI 1414 at t4, then a sixth ROI 1416 at t5, then a seventh ROI 1418 at t6, and final ROI 1420 at t7.”) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pawlowski in view of Hatekaeyama (PGPub 2011/01491030) Pawlowski discloses 3. The method of claim 1, But does not expressly disclose “wherein the plurality of images are associated with one of a birefringent contrast image modality or a photoluminescence image modality.” Hatakeyama discloses “wherein the plurality of images are associated with one of a birefringent contrast image modality or a photoluminescence image modality.” (Hatakeyama, paragraph 41, “n addition, not only the image pickup optical system but also a factor for degrading the image quality in the course of image capture can be included in the generation. Examples of that factor include the aperture shape and aperture ratio of a pixel of a birefringent optical low-pass filter or an image pickup element. When a birefringent optical low-pass filter is used in the image pickup optical system, because a high-frequency component of the frequency characteristics of the OTF is suppressed, the image quality is degraded. The aperture shape and aperture ratio of a pixel of an image pickup element also have an influence on the frequency characteristics of the OTF. ”) At the time of the invention, it would have been obvious to a person of ordinary skill in the art to use birefringent modality as the imaging modalitiy of Pawlowski. The suggestion/motivation for doing so would have been to capture stress in manufactured components. Further, one skilled in the art could have combined the elements as described above by known methods with no change in their respective functions, and the combination would have yielded nothing more than predictable results. Therefore, it would have been obvious to combine Pawlowski and Hatakeyama to obtain the invention as specified in claim 3. Claim(s) 6-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pawlowski in view of Debevec (“Recovering High dynamic Range Radiance Maps from Photographs”) Pawlowski discloses 6. The method of claim 1, But does not expressly disclose “wherein generating the composite workpiece image of at least a portion of the semiconductor workpiece comprises: obtaining a response function for the plurality of images; and generating the composite image based at least in part on the response function; wherein the response function is determined based at least in part on one or more pixel values associated with the plurality images, the plurality of images each associated with exposing the at least a portion of the workpiece to a different radiation intensity.” Debevec discloses “wherein generating the composite workpiece image of at least a portion of the semiconductor workpiece comprises: obtaining a response function for the plurality of images; and generating the composite image based at least in part on the response function; wherein the response function is determined based at least in part on one or more pixel values associated with the plurality images, the plurality of images each associated with exposing the at least a portion of the workpiece to a different radiation intensity.” (See, Section 2.2 “For robustness, and to recover high dynamic range radiance val ues, we should use all the available exposures for a particular pixel to compute its radiance. For this, we reuse the weighting function in Equation 4 to give higher weight to exposures in which the pixel’s value is closer to the middle of the response function: lnEi = PP j=1 w(Zij)(g(Zij) ln tj) PP j=1 w(Zij) (6) Combining the multiple exposures has the effect of reducing noise in the recovered radiance values. It also reduces the effects of imaging artifacts such as film grain. Since the weighting func tion ignores saturated pixel values, “blooming” artifacts5 have little impact on the reconstructed radiance values.”, See also section 2.4 last two paragraphs” As before, a series of differently exposed images of the same scene can be used to recover the response function of the imaging system with each of these scanner settings.”) At the time of the invention, it would have been obvious to a person of ordinary skill in the art to use the algorithm of Debevec as the method to combine images of Pawlowski. The suggestion/motivation for doing so would have been to produce a high dynamic range output image Further, one skilled in the art could have combined the elements as described above by known methods with no change in their respective functions, and the combination would have yielded nothing more than predictable results. Therefore, it would have been obvious to combine Pawlowski and Debevec to obtain the invention as specified in claim 6. Pawlowski in view of Debevec discloses 7. The method of claim 6, wherein obtaining the response function for the plurality of images comprises: sampling one or more pixels of each of the plurality of images; in response to sampling the one or more pixels, determining the one or more pixel values; and determining the response function based at least in part on the one or more pixel values. (Debevec, Section 2.1, 3rd paragraph from the end “Further more, the pixels are best sampled from regions of the image with low intensity variance so that radiance can be assumed to be constant across the area of the pixel, and the effect of optical blur of the imaging system is minimized.”) Pawlowski in view of Debevec discloses 8. The method of claim 6, wherein the response function maps pixel values of the plurality of images to intensity of radiation in a physical space. (Debevec, Section 2.2, Eqn 6) Pawlowski in view of Debevec discloses 9. The method of claim 8, wherein obtaining the response function comprises: determining a pixel value range associated with the plurality of images based at least in part on the one or more pixel values; determining the pixel value range is monotonic; and in response to determining the pixel value range is monotonic, determining the response function for the plurality of images based at least in part on the one or more pixel values.(Debevec, Section 2.2 explicitly disclose, “Note that we have not explicitly enforced the constraint that g must be a monotonic function. If desired, this can be done by trans forming the problem to a non-negative least squares problem. We have not found it necessary because, in our experience, the smooth ness penalty term is enough to make the estimated g monotonic in addition to being smooth” ) Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pawalowski in view of Kolchin (2018/0103247) Pawlowski discloses 13. The method of claim 12, But does not expressly disclose “wherein determining the one or more workpiece characteristics of the semiconductor workpiece comprises: providing image data associated with the composite workpiece image to a machine-learned model; and determining the one or more workpiece characteristics for the semiconductor workpiece based at least in part on an output obtained from the machine-learned model.” Kochin discloses“wherein determining the one or more workpiece characteristics of the semiconductor workpiece comprises: providing image data associated with the composite workpiece image to a machine-learned model; and determining the one or more workpiece characteristics for the semiconductor workpiece based at least in part on an output obtained from the machine-learned model.”(Kolchin, paragraph 69) It would have been obvious to a person having ordinary skill in the art before the time of the effective filing date of the claimed invention of the instant application to include a machine learning component as shown by Kolchin to the system of Pawlowski The suggestion/motivation for doing so would have been to automatically identify defects. Further, one skilled in the art could have combined the elements as described above by known methods with no change in their respective functions, and the combination would have yielded nothing more than predictable results. Therefore, it would have been obvious to combine Pawlowski and Kolchin to obtain the invention as specified in claim 13. Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pawlowski in view of Leonard PGPub 2021/0272298 Pawlowski discloses 14. The method of claim 12, But does not expressly disclose “wherein determining the one or more workpiece characteristics of the semiconductor workpiece comprises determining a presence of one or more micropipes, threading dislocations, or threading screw dislocations on the semiconductor workpiece based at least in part on the composite workpiece image.” Leonard discloses “wherein determining the one or more workpiece characteristics of the semiconductor workpiece comprises determining a presence of one or more micropipes, threading dislocations, or threading screw dislocations on the semiconductor workpiece based at least in part on the composite workpiece image.” (Leonard, paragraph 10, “”plurality of common crystalline features comprises at least one of micropipes, threading edge dislocations, threading screw dislocations, basal plane dislocations, hexagonal voids, or stacking faults. I) It would have been obvious to a person having ordinary skill in the art before the time of the effective filing date of the claimed invention of the instant application to detect fault as shown by Leonard in place of identifying “particles” The suggestion/motivation for doing so would have been to detect problem area in a semiconductor. Further, one skilled in the art could have combined the elements as described above by known methods with no change in their respective functions, and the combination would have yielded nothing more than predictable results. Therefore, it would have been obvious to combine Pawlowski wit Leonard to obtain the invention as specified in claim 14. Pawlowski discloses 15. The method of claim 12, But does not expressly disclose “wherein the one or more workpiece characteristics comprise at least one of: one or more defects associated with the semiconductor workpiece; a surface roughness of the semiconductor workpiece; a parallelism of the semiconductor workpiece; or an optical wedge of the semiconductor workpiece.” Leonard discloses “wherein the one or more workpiece characteristics comprise at least one of: one or more defects associated with the semiconductor workpiece; a surface roughness of the semiconductor workpiece; a parallelism of the semiconductor workpiece; or an optical wedge of the semiconductor workpiece.” (Leonard, paragraph 10, “”plurality of common crystalline features comprises at least one of micropipes, threading edge dislocations, threading screw dislocations, basal plane dislocations, hexagonal voids, or stacking faults. I) It would have been obvious to a person having ordinary skill in the art before the time of the effective filing date of the claimed invention of the instant application to detect fault as shown by Leonard in place of identifying “particles” The suggestion/motivation for doing so would have been to detect problem area in a semiconductor. Further, one skilled in the art could have combined the elements as described above by known methods with no change in their respective functions, and the combination would have yielded nothing more than predictable results. Therefore, it would have been obvious to combine Pawlowski wit Leonard to obtain the invention as specified in claim 14. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pawlowski in view of Carlson (PGPub 2011/0054659) Pawlowski discloses 17. The method of claim 16, But does not expressly disclose “wherein modifying the fabrication process associated with the semiconductor workpiece comprises: generating feedback data associated with the fabrication process based at least in part on the composite workpiece image of the semiconductor workpiece, the feedback data being indicative of one or more defects associated with the fabrication process; and modifying the fabrication process associated with the semiconductor workpiece based at least in part on the feedback data.” Carlson discloses “wherein modifying the fabrication process associated with the semiconductor workpiece comprises: generating feedback data associated with the fabrication process based at least in part on the composite workpiece image of the semiconductor workpiece, the feedback data being indicative of one or more defects associated with the fabrication process; and modifying the fabrication process associated with the semiconductor workpiece based at least in part on the feedback data.” (Carlson, paragraph 66,) It would have been obvious to a person having ordinary skill in the art before the time of the effective filing date of the claimed invention of the instant application to use the method of Pawlowski as a means for updating a fabrication process as shown by Carlson. The suggestion/motivation for doing so would have been to correct error in the fabrication process. Further, one skilled in the art could have combined the elements as described above by known methods with no change in their respective functions, and the combination would have yielded nothing more than predictable results. Therefore, it would have been obvious to combine Pawlowski with Carlson to obtain the invention as specified in claim 17. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GANDHI THIRUGNANAM whose telephone number is (571)270-3261. The examiner can normally be reached M-F 8:30-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sumati Lefkowitz can be reached at 571-272-3638. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GANDHI THIRUGNANAM/ Primary Examiner, Art Unit 2672
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Prosecution Timeline

Jun 28, 2024
Application Filed
Sep 30, 2026
Non-Final Rejection mailed — §101, §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
86%
With Interview (+13.2%)
3y 5m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
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