DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The application has not been checked to the extent necessary to determine the presence of all possible typographical and grammatical errors. Applicant’s cooperation is requested in correcting any errors of which he/she may become aware in the application.
The Information Disclosure Statements filed 07/02/2024 has been considered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Eccleston et al (US 4,716,398) in view of Pastoriza (Re. 31,850).
Regarding claim 5, Eccleston et a teach in figure (1) a digital to analog converter (DAC) (See title), comprising: a voltage sensing stage that includes a sense amplifier (15) (See column 5, lines 63-65) configured to sense a reference voltage at a reference node and to generate a voltage signal Vx corresponding with the reference voltage; a buffer (10) (See column 6: lines 45-48) coupled with the voltage sensing stage and configured to generate a buffered voltage signal based on the voltage signal.
Eccleston et al do not specifically teach an output stage configured to output a base voltage depending on the buffered voltage signal.
However, as evidenced by Pastoriza, this is well-known in the art, to hold the currents constant and reduce errors. Pastoriza teaches a digital-to-analog converter wherein in an output stage is configured to output a base voltage depending on the buffered voltage signal, i.e., and adjusted/corrected base voltage (See column 6: lines 13-15).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Pastoriza into the converter of Eccleston et al to realize a DAC converter having improved performance and reliability because that would help to hold the currents constant, thereby reducing errors (See column 6: lines 13-15).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Craven (US 4,309,693) in view of McKenzie et al (US 10,790,790).
Regarding claim 14, Craven teaches the essential features of the claimed invention including an amplifier, as set forth above, except for a class AB amplifier. However, this limitation is obvious, because as evidenced by McKenzie et al (See column 1: lines 11-13), it is well-known that class AB amplifiers are generally linear and have low distortion.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 11, 12, 16, 17 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Craven (US 4,309,693).
Regarding claim 11, Craven teaches in figure (1) a method of driving a digital to analog converter (DAC) (See title), the method comprising: providing a reference current for the DAC (See column 2: lines 63-68), a reference voltage (32) being generated based on the needed reference current, a base voltage of reference transistor (30) being responsive to changes in the reference voltage; and adaptively steadying/adjusting the base voltage based on changes in the reference voltage (See column 2: lines 63-68).
Regarding claim 12, Craven teaches in figure (1) a method of driving a digital to analog converter (DAC) (See title), wherein adaptively steadying/adjusting the base voltage of reference transistor (30) comprises driving an amplifier (26) with a drive voltage, the drive voltage varying with the changes in the reference voltage (32).
Regarding claim 16, Craven teaches in figure (1) a method of driving a digital to analog converter (DAC) (See title) wherein adaptively steadying/adjusting the base voltage of reference transistor (30) comprises setting the base voltage of reference transistor (30) at an output of the amplifier (26).
Regarding claim 17, Craven teaches in figure (1) a method of driving a digital to analog converter (DAC) (See title), the method further comprising providing the base voltage to a base of a reference bipolar transistor (30), a reference current source (14) generating the reference current being coupled with a collector of the reference bipolar transistor (30).
Allowable Subject Matter
Claims 1-4 are allowable.
Claims 6-10, 13, 15 and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSEPH J LAUTURE whose telephone number is (571)272-1805. The examiner can normally be reached 9:30 AM-6:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dameon Levi can be reached at 5712722105. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JOSEPH J LAUTURE/Primary Examiner, Art Unit 2845
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