Prosecution Insights
Last updated: October 01, 2026
Application No. 18/768,791

CIRCUIT STRUCTURE

Non-Final OA §102§103
Filed
Jul 10, 2024
Priority
Jan 04, 2024 — TW 113100440
Examiner
PATEL, AMOL H
Art Unit
Tech Center
Assignee
Siliconware Precision Industries Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
552 granted / 646 resolved
+25.4% vs TC avg
Moderate +10% lift
Without
With
+9.5%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
14 currently pending
Career history
656
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
53.1%
+13.1% vs TC avg
§102
36.0%
-4.0% vs TC avg
§112
7.2%
-32.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 646 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chiu et al. (Patent No. US 9,941,216). As to claim 1, Chiu discloses a circuit structure (fig. 10), comprising: an insulating layer 222; a plurality of first circuits 224 disposed on a surface at one side of the insulating layer; and a plurality of first electrical connection pads P1, each of which has a first extension portion P2 extending toward and electrically connected to one end of a first circuit RL of the first circuits, wherein a width of each of the first electrical connection pads in a direction transverse to the first circuit connected thereto is wider than a width of the first circuit (fig. 10), and a width of the first extension portion gradually decreases toward a junction of the first extension portion and the first circuit connected thereto (figs. 10-10A). As to claim 2, Chiu discloses that the first extension portion has a first extension angle ϴ1 formed between edges on both sides of the first circuit connected to the first extension portion, and the first extension angle ϴ1 is less than 90° (figs. 10-10A; col. 6 lines 1-6). As to claim 3, Chiu discloses that an extension path of each of the first circuits differs from a virtual straight line connecting two ends of the first circuit (fig. 10A, see curved portions CV). As to claim 4, Chiu discloses that a path length of each of the first circuits is greater than a straight-line distance between the two ends of the first circuit (fig. 10A). Claim(s) 1 and 5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chang et al. (Pub. No. US 2009/0283303). As to claim 1, Chang discloses a circuit structure (fig. 3C), comprising: an insulating layer 300; a plurality of first circuits 320 disposed on a surface at one side of the insulating layer; and a plurality of first electrical connection pads 321, each of which has a first extension portion extending toward and electrically connected to one end of a first circuit of the first circuits, wherein a width of each of the first electrical connection pads in a direction transverse to the first circuit connected thereto is wider than a width of the first circuit, and a width of the first extension portion gradually decreases toward a junction of the first extension portion and the first circuit connected thereto (figs. 3D-3E). As to claim 5, Chang discloses a plurality of second circuits disposed on another side of the insulating layer; a plurality of second electrical connection pads, each of which has a second extension portion extending toward and electrically connected to one end of a second circuit of the second circuits, wherein a width of each of the second electrical connection pads in a direction transverse to the second circuit connected thereto is greater than a width of the second circuit, and a width of the second extension portion gradually decreases toward a junction of the second extension portion and the second circuit connected thereto; and a plurality of first conductive vias disposed in the insulating layer and penetrating the insulating layer, wherein two ends of each of the first conductive vias correspond to and electrically connected respectively to one of the first electrical connection pads and one of the second electrical connection pads (fig. 3C shows two circuits being formed on a top and bottom surface of insulation 300; figs. 3A and 3D show the pad shapes). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chang et al. (Pub. No. US 2009/0283303) in view of Chiu et al. (Patent No. US 9,941,216). As to claim 2, Chang discloses that the first extension portion has a first extension angle ϴ1 formed between edges on both sides of the first circuit connected to the first extension portion (figs. 3D-3E) However, Chang does not explicitly disclose that the first extension angle ϴ1 is less than 90°. Chiu discloses that the first extension angle ϴ1 is less than 90° (figs. 10-10A) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the angle be less than 90° as similarly taught by Chiu since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. As to claim 6, Chang discloses that the second extension portion has a second extension angle ϴ2 formed between edges on both sides of the second circuit connected to the second extension portion. However, Chang does not disclose that the second extension angle ϴ2 is less than 90°. Chiu discloses that the first extension angle ϴ1 is less than 90° (figs. 10-10A) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the angle be less than 90° as similarly taught by Chiu since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claim(s) 1, 3-5, and 7-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsu et al. (Pub. No. US 2006/0108143). As to claim 1, Hsu discloses a circuit structure (fig. 3A), comprising: an insulating layer (¶0026); a plurality of first circuits 302 disposed on a surface at one side of the insulating layer; and a plurality of first electrical connection pads 322, each of which has a first extension portion extending toward and electrically connected to one end of a first circuit of the first circuits, wherein a width of each of the first electrical connection pads in a direction transverse to the first circuit connected thereto is wider than a width of the first circuit, and a width of the first extension portion gradually decreases toward a junction of the first extension portion and the first circuit connected thereto (fig. 3A). As to claim 3, Hsu discloses that an extension path of each of the first circuits differs from a virtual straight line connecting two ends of the first circuit (fig. 3A). As to claim 4, Hsu discloses that a path length of each of the first circuits is greater than a straight-line distance between the two ends of the first circuit (fig. 3A). As to claim 5, Hsu discloses a plurality of second circuits 304 disposed on another side of the insulating layer; a plurality of second electrical connection pads 342, each of which has a second extension portion extending toward and electrically connected to one end of a second circuit of the second circuits, wherein a width of each of the second electrical connection pads in a direction transverse to the second circuit connected thereto is greater than a width of the second circuit, and a width of the second extension portion gradually decreases toward a junction of the second extension portion and the second circuit connected thereto; and a plurality of first conductive vias 334, 338 disposed in the insulating layer and penetrating the insulating layer, wherein two ends of each of the first conductive vias correspond to and electrically connected respectively to one of the first electrical connection pads and one of the second electrical connection pads (fig. 3A). As to claim 7, Hsu discloses that the first extension portion of the one of the first electrical connection pads and the second extension portion of the one of the second electrical connection pads connected respectively to the two ends of each of the first conductive vias extend in different directions (fig. 3A). As to claim 8, Hsu discloses that an extension path of each of the second circuits differs from a virtual straight line connecting two ends of the second circuit (fig. 3A). As to claim 9, Hsu discloses that a path length of each of the second circuits is greater than a straight-line distance between the two ends of the second circuit (fig. 3A). As to claim 10, Hsu discloses that the first circuit electrically connected to the one of the first electrical connection pads and the second circuit electrically connected to the one of the second electrical connection pads at the two ends of each of the first conductive vias, respectively, extend along different directions on different surfaces of the insulating layer (fig. 3A). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMOL H PATEL whose telephone number is (571)270-7833. The examiner can normally be reached 9:30AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TIMOTHY THOMPSON can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AMOL H PATEL/ Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/ Supervisory Patent Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Jul 10, 2024
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
95%
With Interview (+9.5%)
1y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 646 resolved cases by this examiner. Grant probability derived from career allowance rate.

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