DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claim 18 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 & 18 of U.S. Patent No. US 12,062,711 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because:
Regarding claim 18, A manufacturing method of a display substrate, comprising manufacturing a top-gate type thin film transistor on a side of a base substrate, wherein the manufacturing the top-gate type thin film transistor on the side of the base substrate comprises the following steps: forming an active layer, a gate insulation film layer, a gate film layer and a photoresist film layer sequentially on the base substrate;
pre-baking the photoresist film layer; exposing the photoresist film layer to a light using a mask as a protection mask, and developing the exposed photoresist film layer without post-baking; over-etching the gate film layer to form a gate electrode using the developed photoresist film layer as a protection mask; over-etching the gate insulation film layer by a gaseous corrosion method to form a gate insulation layer using the developed photoresist film layer as a protection mask; peeling off the photoresist film layer remained on a surface of the gate electrode; and performing a conductive treatment to the active layer using the gate insulation layer as a protection mask(claim 1 or Claim 18 of US 12,062,711 B2).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 4, 12, 13,14 & 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Uehara (US Pub no. 2007/0155182 A1).
Regarding claim 1, Uehara et al discloses a display substrate, comprising:
a base substrate(201) [0078]; and a top-gate type thin film transistor located on a side of the base substrate, wherein the top-gate type thin film transistor comprises an active layer, a gate insulation layer (203e)and a gate electrode (205e)sequentially disposed in a direction away from the
base substrate(201)[0012] [0078-0080], wherein a side surface of the gate insulation layer(203e) close to the gate electrode(205e) extends beyond an edge of the gate electrode(205e) in a direction parallel to the base substrate(201), and a side surface of the active layer (202)close to the gate insulation layer(203e) extends beyond an edge of the gate insulation layer (203e)in the direction parallel to the base
substrate(201)[0017][0078] fig. 5a-5f.
Regarding claim 2, Uehara et al discloses wherein a length of the side surface of the active layer (202)close to the gate insulation layer (203e)extending beyond the edge of the gate insulation layer(203e) is greater than a length of the side surface of the gate insulation layer (203e)close to the gate electrode(205e) extending beyond the edge of the gate electrode(205e) fig.. 5a-5f.
Regarding claim 4, Uehara et al discloses wherein an included angle between a first side of the gate insulation layer (203e) close to the active layer(202) and a side edge of the gate insulation layer (203e) is less than 90° fig. 5f.
Regarding claim 12, Uehara et al discloses wherein a portion of the side surface (207 or 430-433)of the active layer (202 or 405)close to the gate insulation layer(203e) extending beyond the edge of the gate insulation layer is conductorized [0084][0116]; and wherein the display substrate further comprises: a first via hole (contact holes-430-433)and a second via hole (contact holes-430-433)communicated to the conductorized portion (207/430-433))of the active layer(405)[0121], wherein an orthographic projection of the first via hole on the base substrate(401) and an orthographic projection of the second via hole on the base substrate(401) are located on two sides of an orthographic projection of the gate electrode(418) on the base
substrate(401) [0104][0114][0116][0123].
Regarding claim 13, Uehara et al discloses wherein the source electrode (449)and the drain electrode (450)are respectively connected to the conductorized portion (430-433)of the active layer(405) through
the first via hole (contact holes-430-433)and the second via hole(contact holes-430-433)[0122-0123].
Regarding claim 14, Uehara et al discloses further comprising: a third via hole contact holes-430-433) communicated to the first insulation layer (448). wherein an orthographic projection of the third via hole contact holes-430-433) on the base substrate is spaced apart from the orthographic projection of the active layer (405)on the base substrate(401) fig. 12a.
Regarding claim 20, Uehara et al discloses A display device, comprising the display substrate according to claim 1(fig. 7-12b/fig. 5a-5f).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3,5-11 & 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Uehara (US Pub no. 2007/0155182 A1) in view Zhou (US Pub no. 2019/0172954 A1).
Regarding claim 3, Uehara et al discloses all the claim limitations of claim 1 and further teaches wherein a material of the gate insulation layer (409)comprises silicon oxide, with a thickness of 0.1-0.2µm[0112]; and
wherein a material of the gate electrode(410) with a thickness of 0.4-0.6µm [0112][0079] but fails to teach comprising copper or aluminum.
However, Zhou et al discloses gate materials(60) comprising copper or aluminum[0073]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Uehara et al with the teachings of Zhou et al since the claim would have been obvious because the substitution of one known element for another yields predictable results to one of ordinary skill in the art. Ruiz v. AB Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004)
Regarding claim 5, Uehura et al discloses all the claim limitations of claim 1 but fails to teach further comprising: a light shielding layer located on a side of the active layer in a direction perpendicular to the base substrate.
However, Zhou et al discloses a light shielding layer(20) located on a side of the active layer(40) in a direction perpendicular to the base substrate(10)[0059]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Uehura et al with the teachings of Zhou et al to prevent the active layer from TFT negative threshold voltage drift.
Regarding claim 6, Zhou et al discloses wherein an orthographic projection of the active layer (40) on the base substrate(10) falls within an orthographic projection of the light shielding layer(20) on the base substrate(10) [0063].
Regarding claim 7, Zhou et al discloses further comprising: a first insulation layer (70) on a side of the light shielding layer (20)away from the base substrate(10),
wherein the first insulation layer(70) covers the light shielding layer(20)[0078].
Regarding claim 8, Zhou et al discloses wherein a material of the light shielding
layer (20) comprises molybdenum [0065]; and
wherein a material of the first insulation layer (70)comprises silicon oxide, with a thickness[0079] but fails to teach of 0.3-0.5µm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve a thickness of 0.3-0.5µm through routine experimentation. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)
Regarding claim 9, Uehura et al discloses the gate electrode thickness but fails to teach wherein a thickness of the light shielding layer is less than a thickness of the gate electrode.
However, Zhou et al discloses wherein a thickness of the light shielding layer (20) is less than a thickness of the gate electrode[0065][0073]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Uehura et al with the teachings of Zhou et al to provide stability of the device.
Regarding claim 10, Uehura et al discloses all the claim limitations of claim 1 but fails to teach further comprising: a second insulation layer on a side of the gate electrode away from the base substrate; and a source electrode and a drain electrode on a side of the second insulation layer away from the base substrate, and a material of the source electrode and the drain electrode comprises copper or aluminum, with a thickness of 0.5-0.7µm, respectively.
However, Zhou et al discloses a second insulation layer(70) on a side of the gate electrode (60)away from the base substrate(10); and a source electrode (71/81)and a drain electrode(72/82) on a side of the second insulation layer (70)away from the base substrate(10)[0078], and a material of the source electrode 81 and the drain electrode 82 comprises copper or aluminum, with a thickness [0082] but fails to teach of 0.5-0.7µm, respectively. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve a thickness of 0.5-0.7µm, through routine experimentation. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990) Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Uehura et al with the teachings of Zhou et al to provide electrical isolation and to provide work stability of the device.
Regarding claim 11, Zhou et al discloses further comprising: a passivation layer (90)on a side of the source electrode(71) and the drain electrode(72) away from the base substrate(10), wherein a material of the passivation layer(90) comprises silicon oxide or a combination of silicon oxide and silicon nitride, and a thickness of the passivation layer(90) is less than a thickness of the second insulation layer(70) [0078-0079][0086].
Regarding claim 15, Zhou et al discloses further comprising:
a fourth via hole (73 in 70)communicated to the light shielding layer(20), wherein an orthographic projection of the fourth via hole(73 in 70) on the base substrate(10) overlaps with the orthographic projection of the third via hole(73 in 30) on the base substrate(10)[0078]; and wherein the light shielding layer(20) is connected to the source electrode (71)or the drain electrode(72) through the third via hole and the fourth via hole(73/30 and 73/70) fig. 14 [0078].
Regarding claim 16, Zhou et al discloses wherein the fourth via hole(73 in 70), the first via hole (72/70)and the second via hole(71/70) are formed by one patterning process[0078] fig. 12.
Regarding claim 17, Uehura et al discloses all the claim limitations of claim 1 but fails to teach wherein a material of the active layer comprises IGZO.
However, Zhou et al discloses wherein a material of the active layer(40) comprises IGZO[0067]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Uehura et al with the teachings of Zhou et al to improve the mobility of the device.
Allowable Subject Matter
Claim 19 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LATANYA N CRAWFORD EASON whose telephone number is (571)270-3208. The examiner can normally be reached Monday-Friday 8:30 AM-4:30 PM.
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/LATANYA N CRAWFORD EASON/Primary Examiner, Art Unit 2813
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