Prosecution Insights
Last updated: October 02, 2026
Application No. 18/769,438

CIRCUIT BOARD, DISPLAY APPARATUS, AND MANUFACTURING METHOD FOR CIRCUIT BOARD

Non-Final OA §102§112
Filed
Jul 11, 2024
Priority
Mar 21, 2023 — continuation of PCTCN2023082846
Examiner
BURNS, TREMESHA WILLIS
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE Technology Group Co., Ltd.
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
698 granted / 893 resolved
+10.2% vs TC avg
Strong +17% interview lift
Without
With
+17.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
43 currently pending
Career history
947
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
33.4%
-6.6% vs TC avg
§102
47.0%
+7.0% vs TC avg
§112
17.8%
-22.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 893 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "the seed pattern" on line 8 (line 5 of claim 1 recites “seed patterns”). There is insufficient antecedent basis for this limitation in the claim. Claim 1 recites the limitation "the seed pattern" on line 10 (line 5 of claim 1 recites “seed patterns”). There is insufficient antecedent basis for this limitation in the claim. PLEASE CORRECT THROUGHOUT THE CLAIMS Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 – 9 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Li et al. (CN 113260135 A). Regarding claim 1, in Figure 4D, Li discloses a manufacturing method for a circuit board (1B), wherein the circuit board has a plurality of patterned areas (comprising 100, 106), and a non-patterned area (comprising 202, 104, 200) outside the patterned areas, wherein the manufacturing method comprises: providing a precursor substrate (ST); forming seed patterns (1070A, 1080A) and an auxiliary seed pattern (103) on a side of the precursor substrate, wherein the seed patterns are located in the patterned areas, the auxiliary seed pattern is located in the non-patterned area (Figure 4D), and the seed pattern and the auxiliary seed pattern are separated from each other (Figure 4D); and forming a pad (1070B, 1080B) at a position of the seed pattern and an auxiliary pattern (105, 102) at a position of the auxiliary seed pattern by an electroplating process. Regarding claim 2, Li discloses wherein the forming the seed patterns and the auxiliary seed pattern on the side of the precursor substrate, comprises: forming a plurality of the seed patterns in the patterned areas of the precursor substrate; forming an auxiliary film having the auxiliary seed pattern and a hollowed area, wherein the auxiliary seed pattern comprises: a first flexible substrate, and a first auxiliary seed film layer on a side of the first flexible substrate; and attaching a side of the auxiliary film having the first flexible substrate to a side of the precursor substrate having the seed pattern, wherein the patterned area of the precursor substrate is attached to the hollowed area of the auxiliary film (Figure 4D). Regarding claim 3, Li discloses wherein the forming the auxiliary film having the auxiliary seed pattern and the hollowed area, comprises: providing a rigid substrate; forming the first flexible substrate and the first auxiliary seed film layer sequentially on a side of the rigid substrate; cutting the first flexible substrate and the first auxiliary seed film layer to remove an area without the auxiliary seed pattern to form the hollowed area; and removing the rigid substrate (Figure 4D). Regarding claim 4, Li discloses wherein the attaching the side of the auxiliary film having the first flexible substrate to the side of the precursor substrate having the seed pattern, comprises: attaching the side of the auxiliary film having the first flexible substrate to the side of the precursor substrate having the seed pattern by a roller rolling (Figure 4D). Regarding claim 5, Li discloses wherein, after forming the pad at the position of the seed pattern and the auxiliary pattern at the position of the auxiliary seed pattern by the electroplating process, the manufacturing method further comprises: removing the auxiliary film (Figure 4D). Regarding claim 6, Li discloses wherein, after removing the auxiliary film, the manufacturing method further comprises: forming a protective layer on a surface of the pad; and forming a solder resist layer in the non-patterned area (Figure 4D). Regarding claim 7, Li discloses wherein the forming the seed patterns and the auxiliary seed pattern on the side of the precursor substrate, comprises: forming a second seed film layer on the precursor substrate by a sputtering process; and forming a plurality of the seed patterns in the patterned areas, and forming the auxiliary seed pattern in the non-patterned area, by performing a patterning process on the second seed film layer, wherein a gap is provided between the auxiliary seed pattern and the seed pattern (Figure 4D). Regarding claim 8, Li discloses wherein, after forming the pad at the position of the seed pattern and the auxiliary pattern at the position of the auxiliary seed pattern by the electroplating process, the manufacturing method further comprises: forming a protective layer on surfaces of the pad and the auxiliary pattern; and forming a solder resist layer in an area where the auxiliary pattern is located (Figure 4D). Regarding claim 9, Li discloses wherein the providing the precursor substrate, comprises: providing a base substrate; forming a plurality of leads on a side of the base substrate; and forming a planarization layer on a side of the leads facing away from the base substrate, wherein the planarization layer has via holes exposing portions of the leads (Figure 4D). Regarding claim 15, Li discloses a display apparatus, comprising: a display panel; a flexible circuit board; a control chip; and a circuit board obtained by the manufacturing method according to claim 1;wherein the plurality of patterned areas of the circuit board comprise: a first patterned area, a second patterned area, and a third patterned area; the display panel comprises a plurality of first pins, and the plurality of first pins of the display panel are bonded one-to-one with pads in the first patterned area; the flexible circuit board comprises a plurality of second pins, and the plurality of second pins of the flexible circuit board are bonded one-to-one with pads in the second patterned area; and the control chip comprises a plurality of third pins, and the plurality of third pins of the control chip are bonded one-to-one with pads in the third patterned area (Figure 4D). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TREMESHA W BURNS whose telephone number is (571)270-3391. The examiner can normally be reached Monday-Friday 8am - 4:30 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. TREMESHA W. BURNS Primary Examiner Art Unit 2847 /TREMESHA W BURNS/Primary Examiner, Art Unit 2847
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Prosecution Timeline

Jul 11, 2024
Application Filed
Sep 23, 2026
Non-Final Rejection mailed — §102, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751302
CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE COMPRISING SAME
2y 8m to grant Granted Sep 29, 2026
Patent 12750956
DISPLAY DEVICE
2y 1m to grant Granted Sep 29, 2026
Patent 12745347
IMAGE PICKUP UNIT AND ENDOSCOPE
3y 0m to grant Granted Sep 22, 2026
Patent 12734981
ELECTRONIC MODULE WITH SELF-RETAINING FEATURE AND METHOD OF USING SAME
2y 6m to grant Granted Sep 15, 2026
Patent 12727806
FLEXIBLE ELECTRONIC DEVICE
2y 7m to grant Granted Sep 08, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
95%
With Interview (+17.2%)
2y 6m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 893 resolved cases by this examiner. Grant probability derived from career allowance rate.

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