Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Drawings
The formal drawings filed on 7/11/2024 have been approved by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “ SEMICONDUCTOR PACKAGE HAVING A SIGNAL TERMINAL OVERHANGING A HEAT SPREADER ”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, and 6-8 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Nakata et al. (US 2019/0295932).
With respect to Claim 1, Nakata teaches a base material 1a, 7 and a semiconductor chip 2a mounted to an upper surface of the base material 1a, 7. A main electrode (i.e. under solder 3c) and a signal electrode (i.e. under bonding wire 12a) formed in regions different from each other on the semiconductor chip 2a, respectively. A main terminal 4a bonded to the main electrode and a signal terminal 11a connected to the signal electrode via a metal wire 12a. A region in the signal terminal 11a to which the metal wire is bonded overhangs the base material 1a, 7 while being separated from the base material (see paragraphs 22-38; Figs. 2-4).
With respect to Claim 2, Nakata teaches the base material 1a, 7 is a heat spreader, a lead frame, or an insulating substrate (see paragraphs 23-26).
With respect to Claim 6, Nakata discloses a portion of the signal terminal and the main terminal overhang the base material from directions displaced from each other by 90 degrees or 180 degrees (see Fig. 4).
With respect to Claim 7, Nakata discloses the semiconductor chip (i.e. IGBT or MOSFET) is made of wide bandgap semiconductor as a material paragraph 47).
With respect to Claim 8, Nakata teaches an area of the base material 1a, 7 is twice an area of the semiconductor chip 2a or more, a distance from an end portion of the semiconductor chip to an end portion of the base material is equal to or larger than a thickness of the base material (see Figs. 2-4).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 3, 4, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Nakata et al. (US 2019/0295932) as applied to claim 1 above, and further in view of Kim et al. (US 2013/0009291).
With respect to Claim 3 and 4, Nakata discloses the claimed invention except for a dimple is formed in at least a part of the upper surface of the base material other than a region where the signal terminal overhangs and a region where the semiconductor chip is bonded. However, Kim in Figs. 1-4 a dimple 111 (i.e. groove) is formed in at least a part of the upper surface of the base material 110 other than a region where the signal terminal 11a of Nakata overhangs and a region where the semiconductor chip 2a is bonded. Thus, Nakata and Kim have substantially the same environment of plurality of chips mounted on base material, wherein the a plurality of signal leads are electrically connected to the chips. Therefore, one skilled in the art before the effective filing date of the claimed invention would readily recognize incorporating dimple in the base material of Nakata, since the dimple would facilitate in dissipating heat between chips as taught by Kim.
With respect to Claim 4, Kim discloses a mark made by pressing the signal terminal 140 is formed in a position on the base material corresponding to the signal terminal (see Fig. 1).
With respect to Claim 9, Nakata discloses the claimed invention except for end portion of the signal terminal that is pressed on the base material. However, it is well known in the semiconductor industry to have a signal terminal 140 pressed on the base material 110 in Fig. 1 as evident by Kim.
Allowable Subject Matter
Claim 5 is objected to as being dependent upon a rejected
base claim, but would be allowable if rewritten in independent form including all of the
limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowance subject
matter: none of the prior art of record teaches or suggest the combination of
a separation distance from the signal terminal to the base material is equal to or
larger than 0.5 mm and equal to or smaller than 2 mm. An overhang amount of the signal terminal overhanging the base material is equal or smaller than 20 mm
in claim 5.
The prior art made of record and not relied upon is cited primarily to show the
product of the instant invention.
Conclusion
11. Any inquiry concerning the communication or earlier communications from the
examiner should be directed to Alonzo Chambliss whose telephone number is (571)
272-1927.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's
supervisor, Jacob Y. Choi can be reached on (469) 295-9060. The fax phone number
for the organization where this application or proceeding is assigned is (571) 273-8300.
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AC/July 13, 2026 /Alonzo Chambliss/
Primary Examiner, Art Unit 2897
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