Prosecution Insights
Last updated: October 04, 2026
Application No. 18/770,677

SILICON CARBIDE MATERIAL

Non-Final OA §102§DP
Filed
Jul 12, 2024
Priority
Jul 27, 2020 — provisional 63/056,733 +1 more
Examiner
HOBAN, MATTHEW E
Art Unit
Tech Center
Assignee
Globalwafers Co., Ltd.
OA Round
1 (Non-Final)
60%
Grant Probability
Moderate
1-2
OA Rounds
1y 3m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
516 granted / 854 resolved
At TC average
Strong +25% interview lift
Without
With
+25.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
36 currently pending
Career history
873
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
52.9%
+12.9% vs TC avg
§102
17.0%
-23.0% vs TC avg
§112
19.8%
-20.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 854 resolved cases

Office Action

§102 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hao in their publication “Growth of 2-Inch V-Doped Bulk 6H-SiC with High Semi-Insulating Yield”. Regarding Claim 1-4: Hao teaches the creation of a silicon carbide material, comprising a wafer (See results and discussion, first paragraph). Hao teaches that the wafers are 2 inches in diameter and the resistivity is determined over the whole surface of the wafer. Hao teaches the creation of 9 different wafers (See Table I) and teaches that in wafer 14 to 18 the resistivity of the whole wafer was larger than 1012 Ω cm (See Results and Discussion; paragraph 2; Table I). As Hao teaches that the whole wafer has a resistivity of greater than 1012 Ω cm, the part of the wafer with an average resistivity greater than 1010 (or 5*1010, or 1011, or 5*1011; Re: Claims 2-4) Ω cm occupies 100% of an area of the wafer. Regarding Claim 5: Hao does not teach that any portion of the wafer is damaged and the entire surface of the wafer has a high resistivity (See Figure 2 and Table I). Thus the damage rate of the wafer is considered to be 0%. The specification characterizes regions that have a resistivity of less than 1010 Ω cm with crystal damage leading to a damage rate (See Paragraph 44-45). As the wafer of Hao has 0% of these regions, the damage rate would be 0%. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-5 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-6 of U.S. Patent No. 12276043. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims are drawn to an overlapping range of materials. The patented claims are drawn to a silicon carbide ingot, which is a crystal of silicon carbide. The ingot of the patented claims has two ends being a seed end and a dome end, wherein the portion of each end with a resistivity higher than 1012 Ω cm occupies 100% of the area of said end (See patented claim 2-3). As the crystal is composed of said ends and 100% of the area of each end has a resistivity of greater than 1012 Ω cm, the average resistivity of said crystal is greater than 1012 Ω cm and the part of the crystal with such an average occupies 100% of an area of said crystal (Re: Claims 1-4). The patented claims do not teach the incorporation of damaged portions of said crystal. As damaged portions are not included, the damage rate of the crystal of the patented claim would be the same as that which is claimed or 0% (Re: Claim 5). The specification characterizes regions that have a resistivity of less than 1010 Ω cm with crystal damage leading to a damage rate (See Paragraph 44-45). As the patented ingot has 0% of these regions, the damage rate would also be 0%. Claims 1-5 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 of U.S. Patent No. 12612713. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims are drawn to an overlapping range of materials. The patented claim is drawn to a silicon carbide wafer. The wafer of the patented claim has a resistivity of greater than 1012 Ω cm in an area representing 100% of the entire wafer area. As this is the case, the average resistivity of the wafer must also be greater than 1012 Ω cm. The part of the wafer with an average resistivity greater than 1012 Ω cm occupies 100% of an area of the wafer. The patented claim does not teach the incorporation of damaged portions of said crystal. As damaged portions are not included, the damage rate of the crystal of the patented claim would be the same as that which is claimed or 0% (Re: Claim 5). The specification characterizes regions that have a resistivity of less than 1010 Ω cm with crystal damage leading to a damage rate (See Paragraph 44-45). As the patented wafer has 0% of these regions, the damage rate would also be 0%. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW E HOBAN whose telephone number is (571)270-3585. The examiner can normally be reached M-F 9:30am-6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jonathan Johnson can be reached at 571-272-1177. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Matthew E. Hoban/Primary Examiner, Art Unit 1734
Read full office action

Prosecution Timeline

Jul 12, 2024
Application Filed
Aug 11, 2026
Non-Final Rejection mailed — §102, §DP (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
60%
Grant Probability
86%
With Interview (+25.3%)
3y 6m (~1y 3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 854 resolved cases by this examiner. Grant probability derived from career allowance rate.

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