DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
MPEP § 2111.01 states that “… Under a broadest reasonable interpretation (BRI), words of the claim must be given their plain meaning, unless such meaning is inconsistent with the specification. The plain meaning of a term means the ordinary and customary meaning given to the term by those of ordinary skill in the art at the relevant time. The ordinary and customary meaning of a term may be evidenced by a variety of sources, including the words of the claims themselves, the specification, drawings, and prior art. However, the best source for determining the meaning of a claim term is the specification - the greatest clarity is obtained when the specification serves as a glossary for the claim terms …”. Thus under a broadest reasonable interpretation, the greatest clarity is obtained when the specification (e.g., see “… temperature coefficient of resistance (TCR) … In the disclosure, Itotal indicates a drain current Id, Vg indicates a gate voltage, and a median to be calculated indicates a gate voltage value at which the absolute value of the TCR is at a maximum …” on pg. 1, line 15 and pg. 11, lines 11+) serves as a glossary for the claim terms “Itotal” and “median”.
The specification (e.g., see “… second film 17 gives the CNTs 161 contained in the first film 16 an action of donating electrons (carriers induced by a gate voltage become electrons: N-type doping) or extracting electrons (carriers induced by a gate voltage become holes: P-type doping) by a doping action …” on pg. 8, line 21+) serves as a glossary for the claim term “doping action”.
The specification (e.g., see “… "the first film 16 covers the drain electrode 14 and the source electrode 15", and thus it is also possible to obtain an effect that "A contact area between the CNT 161 in the CNT network and the drain electrode 14 or the source electrode 15 increases, and the resistance of the bolometer 1 can be lowered" …” on pg. 16, line 15+) serves as a glossary for the claim term “wherein the first film covers the drain electrode and the source electrode so that a contact area between the carbon nanotube in the first film and the drain electrode or the source electrode increases”.
Claim Objections
Claim(s) 1, 9, and 11 is/are objected to because of the following informalities:
(a) in claim 1, “gate voltage value” on lines 12-13 should probably be --the gate voltage--;
(b) on line 15 in claim 1, “TCR” should probably be --the TCR-- and “a bolometer” should probably be --the bolometer--;
(c) in claim 1, “the gate voltage value” on line 16 should probably be --the gate voltage--;
(d) in claim 1, “increases
m
e
d
i
a
n
=
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
” on the last two lines should probably be --increases--;
(e) in claim 9, “gate voltage value” on lines 12-13 should probably be --the gate voltage--;
(f) on line 15 in claim 9, “TCR” should probably be --the TCR-- and “a bolometer” should probably be --the bolometer--;
(g) in claim 9, “the gate voltage value” on line 16 should probably be --the gate voltage--;
(h) in claim 9, “increases
m
e
d
i
a
n
=
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
” on the last two lines should probably be --increases--;
(i) in claim 11, “gate voltage value” on lines 13-14 should probably be --the gate voltage--;
(j) on line 16 in claim 11, “TCR” should probably be --the TCR-- and “a bolometer” should probably be --the bolometer--;
(k) in claim 11, “the gate voltage value” on line 17 should probably be --the gate voltage--; and
(l) in claim 11, “increases
m
e
d
i
a
n
=
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
” on the last two lines should probably be --increases--.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim(s) 10 and 12 is/are rejected under 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112, first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention.
While “in the applying of the gate voltage, when the drain voltage is negative, the gate voltage is set between a second upper limit value and a second lower limit value” is recited in original claim 10, applicant has not pointed out where the amended claim is supported, nor does there appear to be a written description of the newly added claim limitation “in a second configuration between a second upper limit value and a second lower limit value to the gate electrode” in the application as filed (MPEP § 2163.04).
While “in the applying of the gate voltage, when the drain voltage is negative, the gate voltage is set between a second upper limit value and a second lower limit value” is recited in original claim 12, applicant has not pointed out where the amended claim is supported, nor does there appear to be a written description of the newly added claim limitation “the second film is further provided such that in to the gate electrode in a second configuration, ” in the application as filed (MPEP § 2163.04).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 4, 7, 9, 11, and 13-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gokturk (US 2005/0036905) in view of Li (US 2018/0323387) and Saxena et al. (Gate voltage tunable temperature coefficient of resistance of WSe2 for thermal sensing applications, IEEE Transactions on Electron Devices, Vol. 70, no. 5 (May 2023), pp. 2600-2605).
In regard to claim 1, Gokturk discloses a bolometer comprising:
(a) a gate electrode to which a gate voltage is configured to be applied (e.g., see “… gate electrode (G) can be positioned on a side of the insulating film 29 opposite the side on which the nanotube is located … Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode. Such an arrangement provides the opportunity to control sensor characteristics by means of the gate voltage. Moreover, resistivity of the nanotube can also be controlled by the gate voltage. For example, resistivity of the nanotube can change as a function of the quantity being detected, such as but not limited to … temperature …” in
PNG
media_image1.png
365
1713
media_image1.png
Greyscale
and paragraph 135);
(b) a drain electrode to which a drain voltage is configured to be applied (e.g., see “… drain electrode (D) and source electrode (S) are located at opposite ends of the nanotube … drain (D) and source (S) electrodes contact the channel to allow current flow …” in Figs. 16a-b and paragraphs 135-136 or alternatively it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to apply a drain voltage in order to measure “resistivity of the nanotube” “as a function of” “temperature”);
(c) a source electrode (e.g., see “… drain electrode (D) and source electrode (S) are located at opposite ends of the nanotube …” in Figs. 16a-b and paragraph 135);
(d) a first film that connects the drain electrode and the source electrode and includes a carbon nanotube (e.g., see “… preferred nanotube will be formed of carbon atoms … As discussed above, nanotubes can have semiconducting properties depending on the structure. Originally metallic tubes with nearly zero bandgap can be converted to semiconductive tubes with larger bandgap by introducing defects. A semiconductive nanotube can be used as the channel of a MOSFET transistor as illustrated in FIGS. 16(a)-(d) …” in Figs. 16a-b and paragraphs 78 and 135); and
(e) the gate voltage in a first configuration is set between a first upper limit value and a first lower limit value (e.g., see “… gate electrode (G) can be positioned on a side of the insulating film 29 opposite the side on which the nanotube is located … Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode. Such an arrangement provides the opportunity to control sensor characteristics by means of the gate voltage. Moreover, resistivity of the nanotube can also be controlled by the gate voltage. For example, resistivity of the nanotube can change as a function of the quantity being detected, such as but not limited to … temperature …” in Figs. 16a-b, paragraph 135, “Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode” can be labeled as drain current or Itotal, and “the gate voltage” can be labeled as Vg).
The bolometer of Gokturk lacks an explicit description of details of the “… MOSFETs, it is understood that they may also be fabricated as fabricated as p-channel …” such as applying a negative drain voltage to the drain electrode and details of the “… resistivity of the nanotube can also be controlled by the gate voltage …” such as the first upper limit value is the gate voltage of a minimum drain current and the first lower limit value = first upper limit value - (first upper limit value - gate voltage at an absolute value of a maximum TCR)×2 wherein the TCR represents temperature coefficient of resistance of the bolometer, wherein the gate voltage at the absolute value of the maximum TCR is
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
, and wherein the first film covers the drain and source electrodes so that a contact area between the first film and the drain electrode or the source electrode increases. However, “… fabricated as p-channel …” details are known to one of ordinary skill in the art (e.g., see “… at least one n+ or p+ doped layer disposed between the at least one carbon nanotube active layer and the drain and source electrodes, such that the TFT demonstrates unipolar characteristics … doped layers also serve to reduce the contact resistance between the CNT and the metal electrode thus improving performance of the TFTs … As with the process for forming top-gated unipolar CNT TFTs the process for forming bottom-gated CNT TFTs may also be simplified, as shown, for example, in FIGS. 10 and 11 … STEP 3: The patterning and etching of the drain/source electrodes and the doped layer. STEP 4: The deposition of a CNT thin film layer atop the doped layer and exposed dielectric layer …” in paragraphs 14, 73, 110, 114, and 115 of Li, “… temperature coefficient of resistance (TCR) … Gate voltage tunable TCR … lead to the design of maximal TCR-based thermal sensors …” in the section I paragraphs of Saxena et al., “… where Cox is the oxide capacitance … Vg is the gate voltage, and Vt is the threshold voltage … for n-channel metal oxide semiconductor FET (MOS-FET), the current in the saturation region is given by [20]
I
D
=
μ
w
c
O
X
2
L
V
g
-
V
t
2
(5) where W is the channel width, µ is the mobility, and L is the channel length … For the temperature ranges …” in the section III paragraphs of Saxena et al., and “… back-gated FET devices were fabricated … p-WSe2 device turns to ON state for the negative gate voltage, and the n-MoS2 device turns to ON state for the positive gate voltage. The voltage polarity reversal between p-WSe2 and n-MoS2 is an expected response from an FET device [20]. The applied drain voltage is −1 V for p-WSe2 and 1 V for n-MoS2. Also, Vt is estimated experimentally from the peak position in the graph of the double derivative of drain current versus the applied gate voltage …” in the section IV paragraphs of Saxena et al.). It should be noted that “when a patent claims a structure already known in the prior art that is altered by the mere substitution of one element for another known in the field, the combination must do more than yield a predictable results”. KSR International Co. v. Teleflex Inc., 550 U.S. 398 at 416, 82 USPQ2d 1385 (2007) at 1395 (citing United States v. Adams, 383 U.S. 39, 40 [148 USPQ 479] (1966)). See MPEP § 2143. In this case, one of ordinary skill in the art could have substituted a known conventional transistor (e.g., comprising details such as “reduce the contact resistance between the CNT and the metal electrode” and additional details such as “applied drain voltage is −1 V” and “Gate voltage tunable TCR”, in order to achieve “maximal TCR-based thermal sensors” for desired “temperature ranges”) for the unspecified transistor of Gokturk and the results of the substitution would have been predictable. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide a known conventional transistor (e.g., comprising details such as the drain voltage is negative, wherein the first upper limit value is the gate voltage at which a drain current of the drain electrode is at a minimum, and the first lower limit value is the gate voltage that satisfies relationships shown in the following equation: first lower limit value = first upper limit value - (first upper limit value - gate voltage value at which an absolute value of a TCR is at a maximum)×2 where, TCR represents temperature coefficient of resistance of a bolometer, wherein the gate voltage value at which the absolute value of the TCR is at the maximum is expressed as follows:
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
where Itotal represents the drain current, and Vg represents the gate voltage, wherein the first film covers the drain electrode and the source electrode so that a contact area between the carbon nanotube in the first film and the drain electrode or the source electrode increases) as the unspecified transistor of Gokturk.
In regard to claim 4 which is dependent on claim 1, the bolometer of Gokturk lacks an explicit description of details of the “… resistivity of the nanotube can also be controlled by the gate voltage …” such as the gate voltage in a second configuration is set between a second upper limit value and a second lower limit value, the second upper limit value satisfies a relationship shown in the following equation: second upper limit value = gate voltage value at which the absolute value of the TCR is at the maximum + (first upper limit value - gate voltage value at which the absolute value of the TCR is at the maximum)/2, and the second lower limit value satisfies a relationship shown in the following equation: second lower limit value = second upper limit value - (second upper limit value - gate voltage value at which the absolute value of the TCR is at the maximum)x2. However, “… fabricated as p-channel …” details are known to one of ordinary skill in the art (e.g., see “… at least one n+ or p+ doped layer disposed between the at least one carbon nanotube active layer and the drain and source electrodes, such that the TFT demonstrates unipolar characteristics … doped layers also serve to reduce the contact resistance between the CNT and the metal electrode thus improving performance of the TFTs … As with the process for forming top-gated unipolar CNT TFTs the process for forming bottom-gated CNT TFTs may also be simplified, as shown, for example, in FIGS. 10 and 11 … STEP 3: The patterning and etching of the drain/source electrodes and the doped layer. STEP 4: The deposition of a CNT thin film layer atop the doped layer and exposed dielectric layer …” in paragraphs 14, 73, 110, 114, and 115 of Li, “… temperature coefficient of resistance (TCR) … Gate voltage tunable TCR … lead to the design of maximal TCR-based thermal sensors …” in the section I paragraphs of Saxena et al., “… where Cox is the oxide capacitance … Vg is the gate voltage, and Vt is the threshold voltage … for n-channel metal oxide semiconductor FET (MOS-FET), the current in the saturation region is given by [20]
I
D
=
μ
w
c
O
X
2
L
V
g
-
V
t
2
(5) where W is the channel width, µ is the mobility, and L is the channel length … For the temperature ranges …” in the section III paragraphs of Saxena et al., and “… back-gated FET devices were fabricated … p-WSe2 device turns to ON state for the negative gate voltage, and the n-MoS2 device turns to ON state for the positive gate voltage. The voltage polarity reversal between p-WSe2 and n-MoS2 is an expected response from an FET device [20]. The applied drain voltage is −1 V for p-WSe2 and 1 V for n-MoS2. Also, Vt is estimated experimentally from the peak position in the graph of the double derivative of drain current versus the applied gate voltage …” in the section IV paragraphs of Saxena et al.). It should be noted that “when a patent claims a structure already known in the prior art that is altered by the mere substitution of one element for another known in the field, the combination must do more than yield a predictable results”. KSR International Co. v. Teleflex Inc., 550 U.S. 398 at 416, 82 USPQ2d 1385 (2007) at 1395 (citing United States v. Adams, 383 U.S. 39, 40 [148 USPQ 479] (1966)). See MPEP § 2143. In this case, one of ordinary skill in the art could have substituted a known conventional transistor (e.g., comprising details such as “reduce the contact resistance between the CNT and the metal electrode” and additional details such as “applied drain voltage is −1 V” and “Gate voltage tunable TCR”, in order to achieve “maximal TCR-based thermal sensors” for desired “temperature ranges”) for the unspecified transistor of Gokturk and the results of the substitution would have been predictable. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide a known conventional transistor (e.g., comprising details such as the gate voltage in a second configuration is set between a second upper limit value and a second lower limit value, the second upper limit value satisfies a relationship shown in the following equation: second upper limit value = gate voltage value at which the absolute value of the TCR is at the maximum + (first upper limit value - gate voltage value at which the absolute value of the TCR is at the maximum)/2, and the second lower limit value satisfies a relationship shown in the following equation: second lower limit value = second upper limit value - (second upper limit value - gate voltage value at which the absolute value of the TCR is at the maximum)x2) as the unspecified transistor of Gokturk.
In regard to claim 7 which is dependent on claim 1, Gokturk also discloses that the carbon nanotube is a semiconductor type carbon nanotube (e.g., “… preferred nanotube will be formed of carbon atoms … semiconductive nanotube can be used as the channel of a MOSFET transistor as illustrated in FIGS. 16(a)-(d) …” in paragraphs 78 and 135).
In regard to claim 9, Gokturk discloses a detection method for a bolometer including a gate electrode, a drain electrode, a source electrode, and a first film that connects the drain electrode and the source electrode and includes a carbon nanotube (e.g., see “… preferred nanotube will be formed of carbon atoms … As discussed above, nanotubes can have semiconducting properties depending on the structure. Originally metallic tubes with nearly zero bandgap can be converted to semiconductive tubes with larger bandgap by introducing defects. A semiconductive nanotube can be used as the channel of a MOSFET transistor as illustrated in FIGS. 16(a)-(d). For example, as illustrated in FIG. 16(a), the nanotube can be positioned on an insulating film 29, of, for example, silicon dioxide, gate electrode (G) can be positioned on a side of the insulating film 29 opposite the side on which the nanotube is located, and the drain electrode (D) and source electrode (S) are located at opposite ends of the nanotube. The gate electrode can be insulated from the nanotubes in other manners then being positioned on the opposite side of the insulating film. Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode. Such an arrangement provides the opportunity to control sensor characteristics by means of the gate voltage. Moreover, resistivity of the nanotube can also be controlled by the gate voltage. For example, resistivity of the nanotube can change as a function of the quantity being detected, such as but not limited to … temperature …” in Figs. 16a-b and paragraphs 78 and 135), the detection method comprising:
(a) applying a gate voltage in a first configuration between a first upper limit value and a first lower limit value to the gate electrode (e.g., see “… gate electrode (G) can be positioned on a side of the insulating film 29 opposite the side on which the nanotube is located … Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode. Such an arrangement provides the opportunity to control sensor characteristics by means of the gate voltage. Moreover, resistivity of the nanotube can also be controlled by the gate voltage. For example, resistivity of the nanotube can change as a function of the quantity being detected, such as but not limited to … temperature …” in Figs. 16a-b, paragraph 135, “Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode” can be labeled as drain current or Itotal, and “the gate voltage” can be labeled as Vg); and
(b) detecting infrared rays (e.g., see “… resistivity of the nanotube can change as a function of the quantity being detected, such as but not limited to … temperature …” in Figs. 16a-b and paragraphs 78 and 135).
The method of Gokturk lacks an explicit description of details of the “… MOSFETs, it is understood that they may also be fabricated as fabricated as p-channel …” such as applying a negative drain voltage to the drain electrode and details of the “… resistivity of the nanotube can also be controlled by the gate voltage …” such as the first upper limit value is the gate voltage of a minimum drain current and the first lower limit value = first upper limit value - (first upper limit value - gate voltage at an absolute value of a maximum TCR)×2 wherein the TCR represents temperature coefficient of resistance of the bolometer, wherein the gate voltage at the absolute value of the maximum TCR is
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
, and wherein the first film covers the drain and source electrodes so that a contact area between the first film and the drain electrode or the source electrode increases. However, “… fabricated as p-channel …” details are known to one of ordinary skill in the art (e.g., see “… at least one n+ or p+ doped layer disposed between the at least one carbon nanotube active layer and the drain and source electrodes, such that the TFT demonstrates unipolar characteristics … doped layers also serve to reduce the contact resistance between the CNT and the metal electrode thus improving performance of the TFTs … As with the process for forming top-gated unipolar CNT TFTs the process for forming bottom-gated CNT TFTs may also be simplified, as shown, for example, in FIGS. 10 and 11 … STEP 3: The patterning and etching of the drain/source electrodes and the doped layer. STEP 4: The deposition of a CNT thin film layer atop the doped layer and exposed dielectric layer …” in paragraphs 14, 73, 110, 114, and 115 of Li, “… temperature coefficient of resistance (TCR) … Gate voltage tunable TCR … lead to the design of maximal TCR-based thermal sensors …” in the section I paragraphs of Saxena et al., “… where Cox is the oxide capacitance … Vg is the gate voltage, and Vt is the threshold voltage … for n-channel metal oxide semiconductor FET (MOS-FET), the current in the saturation region is given by [20]
I
D
=
μ
w
c
O
X
2
L
V
g
-
V
t
2
(5) where W is the channel width, µ is the mobility, and L is the channel length … For the temperature ranges …” in the section III paragraphs of Saxena et al., and “… back-gated FET devices were fabricated … p-WSe2 device turns to ON state for the negative gate voltage, and the n-MoS2 device turns to ON state for the positive gate voltage. The voltage polarity reversal between p-WSe2 and n-MoS2 is an expected response from an FET device [20]. The applied drain voltage is −1 V for p-WSe2 and 1 V for n-MoS2. Also, Vt is estimated experimentally from the peak position in the graph of the double derivative of drain current versus the applied gate voltage …” in the section IV paragraphs of Saxena et al.). It should be noted that “when a patent claims a structure already known in the prior art that is altered by the mere substitution of one element for another known in the field, the combination must do more than yield a predictable results”. KSR International Co. v. Teleflex Inc., 550 U.S. 398 at 416, 82 USPQ2d 1385 (2007) at 1395 (citing United States v. Adams, 383 U.S. 39, 40 [148 USPQ 479] (1966)). See MPEP § 2143. In this case, one of ordinary skill in the art could have substituted a known conventional transistor (e.g., comprising details such as “reduce the contact resistance between the CNT and the metal electrode” and additional details such as “applied drain voltage is −1 V” and “Gate voltage tunable TCR”, in order to achieve “maximal TCR-based thermal sensors” for desired “temperature ranges”) for the unspecified transistor of Gokturk and the results of the substitution would have been predictable. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide a known conventional transistor (e.g., comprising details such as applying a negative drain voltage to the drain electrode, wherein the first upper limit value is the gate voltage at which a drain current of the drain electrode is at a minimum, and the first lower limit value is the gate voltage that satisfies relationships shown in the following equation: first lower limit value = first upper limit value - (first upper limit value - gate voltage value at which an absolute value of a TCR is at a maximum)×2 where, TCR represents temperature coefficient of resistance of a bolometer, wherein the gate voltage value at which the absolute value of the TCR is at the maximum is expressed as follows:
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
where Itotal represents the drain current, and Vg represents the gate voltage, wherein the first film covers the drain electrode and the source electrode so that a contact area between the carbon nanotube in the first film and the drain electrode or the source electrode increases) as the unspecified transistor of Gokturk.
In regard to claim 11, Gokturk discloses a bolometer manufacturing method comprising:
(a) laminating a first film that connects a drain electrode and a source electrode and includes a carbon nanotube (e.g., see “… preferred nanotube will be formed of carbon atoms … As discussed above, nanotubes can have semiconducting properties depending on the structure. Originally metallic tubes with nearly zero bandgap can be converted to semiconductive tubes with larger bandgap by introducing defects. A semiconductive nanotube can be used as the channel of a MOSFET transistor as illustrated in FIGS. 16(a)-(d). For example, as illustrated in FIG. 16(a), the nanotube can be positioned on an insulating film 29, of, for example, silicon dioxide, gate electrode (G) can be positioned on a side of the insulating film 29 opposite the side on which the nanotube is located, and the drain electrode (D) and source electrode (S) are located at opposite ends of the nanotube. The gate electrode can be insulated from the nanotubes in other manners then being positioned on the opposite side of the insulating film. Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode. Such an arrangement provides the opportunity to control sensor characteristics by means of the gate voltage. Moreover, resistivity of the nanotube can also be controlled by the gate voltage. For example, resistivity of the nanotube can change as a function of the quantity being detected, such as but not limited to … temperature …” in Figs. 16a-b and paragraphs 78 and 135); and
(b) providing a second film on a surface of the first film (e.g., “… sensor comprising a transistor comprising the defect controlled nanotube can detect temperature … density of defects adjusted to broaden the bandgap to several times, for example, 5 times, that of thermal energy corresponding to the temperature of interest; a protection layer with high thermal conductivity to prevent exposure to ambient gases … At least the nanotube can include a protection layer, such as, composed of polymethylmethacrylate (PMMA) polymer, to prevent exposure to ambient gases …” in paragraphs 55 and 165), wherein in the providing a second film, the second film is provided such that a gate voltage applied to the gate electrode in a first configuration is set between a first upper limit value and a first lower limit value (e.g., see “… gate electrode (G) can be positioned on a side of the insulating film 29 opposite the side on which the nanotube is located … Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode. Such an arrangement provides the opportunity to control sensor characteristics by means of the gate voltage. Moreover, resistivity of the nanotube can also be controlled by the gate voltage. For example, resistivity of the nanotube can change as a function of the quantity being detected, such as but not limited to … temperature …” in Figs. 16a-b, paragraph 135, “Conductivity of the nanotube (channel) is modulated by a voltage applied to the gate (G) electrode” can be labeled as drain current or Itotal, and “the gate voltage” can be labeled as Vg).
The method of Gokturk lacks an explicit description of details of the “… fabricated as an n-channel MOSFETs, it is understood that they may also be fabricated as fabricated as p-channel …” such as the second film performing a doping action on the first film and applying a negative drain voltage to the drain electrode and details of the “… resistivity of the nanotube can also be controlled by the gate voltage …” such as the first upper limit value is the gate voltage of a minimum drain current and the first lower limit value = first upper limit value - (first upper limit value - gate voltage at an absolute value of a maximum TCR)×2 wherein the TCR represents temperature coefficient of resistance of the bolometer, wherein the gate voltage at the absolute value of the maximum TCR is
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
, and wherein the first film covers the drain and source electrodes so that a contact area between the first film and the drain electrode or the source electrode increases. However, “… fabricated as p-channel …” details are known to one of ordinary skill in the art (e.g., see “… at least one n+ or p+ doped layer disposed between the at least one carbon nanotube active layer and the drain and source electrodes, such that the TFT demonstrates unipolar characteristics … doped layers also serve to reduce the contact resistance between the CNT and the metal electrode thus improving performance of the TFTs … As with the process for forming top-gated unipolar CNT TFTs the process for forming bottom-gated CNT TFTs may also be simplified, as shown, for example, in FIGS. 10 and 11 … STEP 3: The patterning and etching of the drain/source electrodes and the doped layer. STEP 4: The deposition of a CNT thin film layer atop the doped layer and exposed dielectric layer …” in paragraphs 14, 73, 110, 114, and 115 of Li, “… temperature coefficient of resistance (TCR) … Gate voltage tunable TCR … lead to the design of maximal TCR-based thermal sensors …” in the section I paragraphs of Saxena et al., “… where Cox is the oxide capacitance … Vg is the gate voltage, and Vt is the threshold voltage … for n-channel metal oxide semiconductor FET (MOS-FET), the current in the saturation region is given by [20]
I
D
=
μ
w
c
O
X
2
L
V
g
-
V
t
2
(5) where W is the channel width, µ is the mobility, and L is the channel length … For the temperature ranges …” in the section III paragraphs of Saxena et al., and “… back-gated FET devices were fabricated … p-WSe2 device turns to ON state for the negative gate voltage, and the n-MoS2 device turns to ON state for the positive gate voltage. The voltage polarity reversal between p-WSe2 and n-MoS2 is an expected response from an FET device [20]. The applied drain voltage is −1 V for p-WSe2 and 1 V for n-MoS2. Also, Vt is estimated experimentally from the peak position in the graph of the double derivative of drain current versus the applied gate voltage …” in the section IV paragraphs of Saxena et al.). It should be noted that “when a patent claims a structure already known in the prior art that is altered by the mere substitution of one element for another known in the field, the combination must do more than yield a predictable results”. KSR International Co. v. Teleflex Inc., 550 U.S. 398 at 416, 82 USPQ2d 1385 (2007) at 1395 (citing United States v. Adams, 383 U.S. 39, 40 [148 USPQ 479] (1966)). See MPEP § 2143. In this case, one of ordinary skill in the art could have substituted a known conventional transistor (e.g., comprising details such as “reduce the contact resistance between the CNT and the metal electrode” by “at least one n+ or p+ doped layer disposed between the at least one carbon nanotube active layer and the drain and source electrodes” and additional details such as “applied drain voltage is −1 V” and “Gate voltage tunable TCR”, in order to achieve “maximal TCR-based thermal sensors” for desired “temperature ranges”) for the unspecified transistor of Gokturk and the results of the substitution would have been predictable. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide a known conventional transistor (e.g., comprising details such as the second film performing a doping action on the first film, applying a negative drain voltage to the drain electrode, wherein the first upper limit value is the gate voltage at which a drain current of the drain electrode is at a minimum, and the first lower limit value is the gate voltage that satisfies relationships shown in the following equation: first lower limit value = first upper limit value - (first upper limit value - gate voltage value at which an absolute value of a TCR is at a maximum)×2 where, TCR represents temperature coefficient of resistance of a bolometer, wherein the gate voltage value at which the absolute value of the TCR is at the maximum is expressed as follows:
a
r
g
m
a
x
d
l
o
g
I
t
o
t
a
l
V
g
d
V
g
where Itotal represents the drain current, and Vg represents the gate voltage, wherein the first film covers the drain electrode and the source electrode so that a contact area between the carbon nanotube in the first film and the drain electrode or the source electrode increases) as the unspecified transistor of Gokturk.
In regard to claim 13 which is dependent on claim 11, Gokturk also discloses that, in the providing of the second film, the second film includes a polymeric material (e.g., “… sensor comprising a transistor comprising the defect controlled nanotube can detect temperature … protection layer with high thermal conductivity to prevent exposure to ambient gases … At least the nanotube can include a protection layer, such as, composed of polymethylmethacrylate (PMMA) polymer, to prevent exposure to ambient gases …” in paragraphs 55 and 165).
In regard to claim 14 which is dependent on claim 11, Gokturk also discloses that, in the providing of the second film, the second film includes PMMA, P4VP, or P4VBM (e.g., “… sensor comprising a transistor comprising the defect controlled nanotube can detect temperature … protection layer with high thermal conductivity to prevent exposure to ambient gases … At least the nanotube can include a protection layer, such as, composed of polymethylmethacrylate (PMMA) polymer, to prevent exposure to ambient gases …” in paragraphs 55 and 165).
In regard to claim 15 which is dependent on claim 11, Gokturk also discloses that, in the laminating of the first film, the carbon nanotube is a semiconductor type carbon nanotube (e.g., “… preferred nanotube will be formed of carbon atoms … semiconductive nanotube can be used as the channel of a MOSFET transistor as illustrated in FIGS. 16(a)-(d) …” in paragraphs 78 and 135).
In regard to claim 16 which is dependent on claim 11, the cited prior art is applied as in claim 11 above. Applicant is advised that should claim 11 be found allowable, claim 16 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim(s) 2, 5, and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gokturk in view of Li and Saxena et al. as applied to claim(s) 1 above, and further in view of Xu et al. (Selective conversion from p‑type to n‑type of printed bottom-gate carbon nanotube thin-film transistors and application in complementary metal−oxide−semiconductor inverters, ACS Applied Materials & Interfaces Vol. 9, no. 14 (March 2017), pp.12750−12758).
In regard to claim 2 which is dependent on claim 1, while Gokturk also discloses a second film that is provided on a surface of the first film (e.g., “… sensor comprising a transistor comprising the defect controlled nanotube can detect temperature … density of defects adjusted to broaden the bandgap to several times, for example, 5 times, that of thermal energy corresponding to the temperature of interest; a protection layer with high thermal conductivity to prevent exposure to ambient gases … defect controlled nanotube fabricated as an n-channel MOSFETs, it is understood that they may also be fabricated as p-channel MOSFETs without departing from the scope and/or spirit of the invention … At least the nanotube can include a protection layer, such as, composed of polymethylmethacrylate (PMMA) polymer, to prevent exposure to ambient gases …” in paragraphs 55 , 150, and 165), the bolometer of Gokturk lacks an explicit description of details of the “… fabricated as an n-channel MOSFETs, it is understood that they may also be fabricated as fabricated as p-channel …” such as the second film performs a doping action on the first film. However, “… fabricated as an n-channel … fabricated as p-channel …” details are known to one of ordinary skill in the art (e.g., see “… semiconducting single-walled carbon nanotubes (sc-SWCNTs). (5, 14, 36-39) … most printed sc-SWCNT TFT circuits are based on unipolar (p-type only) technologies, which are burdened with high power dissipation and limited noise margins compared to CMOS circuitry consisting of both p-type and n-type TFTs. (43) … a new polarity conversion method is presented which is based on printing ethanolamine (EA) as an electron doping agent on the transistor active region …” in the Introduction section paragraphs of Xu et al.). It should be noted that “when a patent claims a structure already known in the prior art that is altered by the mere substitution of one element for another known in the field, the combination must do more than yield a predictable results”. KSR International Co. v. Teleflex Inc., 550 U.S. 398 at 416, 82 USPQ2d 1385 (2007) at 1395 (citing United States v. Adams, 383 U.S. 39, 40 [148 USPQ 479] (1966)). See MPEP § 2143. In this case, one of ordinary skill in the art could have substituted a known conventional transistor (e.g., comprising details such as “printing ethanolamine (EA) as an electron doping agent on the transistor active region”, in order to achieve “CMOS circuitry consisting of both p-type and n-type TFTs”) for the unspecified transistor of Gokturk and the results of the substitution would have been predictable. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide a known conventional transistor (e.g., comprising details such as the second film performs a doping action on the first film) as the unspecified transistor of Gokturk.
In regard to claim 5 which is dependent on claim 2, Gokturk also discloses that the second film includes a polymeric material (e.g., “… sensor comprising a transistor comprising the defect controlled nanotube can detect temperature … protection layer with high thermal conductivity to prevent exposure to ambient gases … At least the nanotube can include a protection layer, such as, composed of polymethylmethacrylate (PMMA) polymer, to prevent exposure to ambient gases …” in paragraphs 55 and 165).
In regard to claim 6 which is dependent on claim 2, Gokturk also discloses that the second film includes PMMA, P4VP, or P4VBM (e.g., “… sensor comprising a transistor comprising the defect controlled nanotube can detect temperature … protection layer with high thermal conductivity to prevent exposure to ambient gases … At least the nanotube can include a protection layer, such as, composed of polymethylmethacrylate (PMMA) polymer, to prevent exposure to ambient gases …” in paragraphs 55 and 165).
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gokturk in view of Li, Saxena et al., and Xu et al. as applied to claim(s) 2 above, and further in view of Aota (US 2005/0248397).
In regard to claim 3 which is dependent on claim 2, the bolometer of Gokturk lacks that the gate electrode and the source electrode are short-circuited. However, Aota teaches (paragraph 61) that “… FET 112 functions as a constant current source since its source and gate are connected together …”. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to short-circuit the gate and source electrodes of Gokturk, in order to achieve constant current to measure voltage instead of a current measurement.
Response to Arguments
Applicant’s arguments with respect to the amended claims have been fully considered but are moot in view of the new ground(s) of rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
JP 2015-49207 teaches a carbon nanotube FET.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Shun Lee whose telephone number is (571)272-2439. The examiner can normally be reached Monday-Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uzma Alam can be reached at (571)272-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SL/
Examiner, Art Unit 2884
/UZMA ALAM/Supervisory Patent Examiner, Art Unit 2884