Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-4, 6-12, and 14-20 directed to Fig. 8 (Species 3) in the reply filed on 07/22/2026 is acknowledged.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Nakagawa et al. [US PPGUB 20230006708] in view of Sawada [US PGPUB 20180077790], Reinhardt et al. [US PGPUB 20110206143], and Onaka et al. [US PGPUB 20230140655] with support from Weng et al. [US PGPUB 20130315288] (hereinafter, Nakagawa, Reinhardt, Onaka, and Weng).
Regarding claim 1, Nakagawa teaches a radio frequency communication device comprising:
a first package (100, Para 36) comprising a first semiconductor component (Para 54, i.e., one of the plurality of electronic components 8 which includes the low-noise amplifier 121 ), the first semiconductor component comprising a reception amplifier (121, Para 42) configured to
receive a radio frequency (RF) signal to obtain a received RF signal (Para 42),
amplify the received RF signal to obtain an amplified RF signal (Para 42), and
output the amplified RF signal (Para 42 – i.e., low-noise amplifier 121 amplifies a reception signal in a second frequency band inputted to the input terminal and outputs the amplified reception signal from the output terminal);
a signal processing circuit (301, Para 37) comprising a second semiconductor component (RFIC 302, Fig. 4) and a third semiconductor component (BBIC 303, Fig. 4), the second semiconductor component comprising a reception chain configured to
receive the amplified RF signal from the first semiconductor chip via at least one first wire (Para 42 –i.e., output terminal of the low-noise amplifier 121 is connected to the signal processing circuit 301 via, for example, the signal output terminal 83. The signal output terminal 83 is a terminal for outputting a radio frequency signal (reception signal) from the low-noise amplifier 121 to an external circuit (for example, the signal processing circuit 301)), and
generate a baseband digital signal (Para 38, i.e., the RF signal processing circuit 302 performs signal processing such as down-conversion on a radio frequency signal (reception signal) outputted from the radio frequency module 100, and outputs the radio frequency signal, on which the signal processing has been performed, to the baseband signal processing circuit 303 –wherein Weng details that signals exchanged between RFIC and BBIC components of a device are digital signals (Para 97-101)), and
the third semiconductor component being configured to
receive the baseband digital signal from the second semiconductor component via an internal a transmission of the signal processing circuit (Para 38, i.e., the RF signal processing circuit 302 performs signal processing such as down-conversion on a radio frequency signal (reception signal) outputted from the radio frequency module 100, and outputs the radio frequency signal, on which the signal processing has been performed, to the baseband signal processing circuit 303), and
process the baseband digital signal (Para 38, i.e., reception signal processed by the baseband signal processing circuit 303); and
the PCB (9, Para 55) on which the first package (Fig. 2) is mounted.
Nakagawa does not specifically disclose that the first semiconductor component is a chip,
that the signal processing circuit is a second package,
that the second semiconductor component and a third semiconductor component are chips,
the first wire is on a printed circuit board (PCB),
that the baseband signal is a digital signal, and
the PCB on which the second package is mounted.
Referring to the invention of Sawada, Sawada teaches a package 100 (radio frequency module (similar to module 100 of Nakagawa), Para 34), wherein package comprises a chip 120 (which is configured as the first semiconductor component of Nakagawa, Para 37/38/45), and wherein the RFIC and BBIC of the device (similar to second and third semiconductor components of Nakagawa) are chips (Para 79/80).
In view of such teaching by Sawada, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Nakagawa comprise the teachings of Sawada at least based on the rationale of using known technique to improve similar devices (methods, or products) in the same way using (MPEP 2143.I.C).
In view of Sawada’s disclosure that the RFIC and BBIC of the device are chips and the teachings of Nakagawa referring to RFIC 302 and BBIC 303 as a signal processing circuit, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the RFIC and BBIC chips implemented in Nakagawa’s invention as a package.
Referring to the invention of Reinhardt, Reinhardt discloses that RFIC and BBIC are usually provided in separate packages. However, it would be beneficial to provide RFIC and BBIC in a single package or even as a single chip solution to decrease pin count and printed circuit board (PCB) area (Para 9).
Thus, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have implement the teachings of Reinhardt in the invention of Nakagawa (Sawada) to improve surface area and power consumption.
Referring to the invention of Onaka, Onaka teaches a device package (Fig. 2), wherein all the components of the package are mounted onto printed circuit board (PCB) 250 (Para 57, Fig. 2), the RFIC and BBIC exchanging signals via a wire (260, Para 57) on the printed circuit board (PCB).
In view of such teaching by Onaka, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Nakagawa comprise the teaching of Onaka to have a compact configuration.
Allowable Subject Matter
Claims 9-12, and 14-20 are allowed.
Claims 2-4 and 6-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claims 9-12, and 14-19 are allowed because all prior arts of record and related prior arts not of record either singularly or in combination fail to anticipate or render obvious a radio frequency communication device comprising:
a first package comprising a first semiconductor chip, the first semiconductor chip comprising a first reception amplifier and a second reception amplifier,
a second package comprising a second semiconductor chip and a third semiconductor chip, the second semiconductor chip comprising a first reception chain and a second reception chain (and with regards to how the chips components are configured as claimed in claim 9), in combination with the rest of claim limitations as claimed and defined by the Applicant.
Claim 20 is allowed because all prior arts of record and related prior arts not of record either singularly or in combination fail to anticipate or render obvious a radio frequency communication device comprising:
a first package comprising a first semiconductor chip, the first semiconductor chip comprising a first reception amplifier and a second reception amplifier,
a second package comprising a second semiconductor chip and a third semiconductor chip, the second semiconductor chip comprising a first reception chain and a second reception chain (and with regards to how the chips components are configured as claimed in claim 20), in combination with the rest of claim limitations as claimed and defined by the Applicant.
Conclusion
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/ISMAIL A MUSE/Primary Examiner, Art Unit 2812
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