DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
2. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. It is suggested that the title include “a MOSFET with a sensing element.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-5 are rejected under 35 U.S.C. 103 as being unpatentable over Japanese Pat. No. JP 2020145219 A to 内沼 善将 et al. (loosely translated to “Yoshimasa Uchinuma”) (hereinafter “Uchinuma”) in view of U.S. Pat. Pub. No. US 20200343240 A1 to Eguchi et al. (hereinafter “Eguchi”).
Regarding claim 1, Uchinuma teaches a semiconductor device (embodiment 1 including figs. 1-11) [0012] comprising:
a semiconductor chip (CP1; fig. 2) [0018] including a first MOSFET (power MOSFET 1, taught as being disposed within CP1; fig. 2) [0018] formed in a first region (region defined by CP1) of a semiconductor substrate (die pad DP; fig. 4) [0092],
a detection element (element disposed in region RG2, including a detection element; fig. 2) [0043] formed in a second region (region RG2; fig. 2) [0043] within the first region (region of CP1), and
a source electrode (portion of source connection portion MP1 above MOSFET 1; fig. 2) [0095] formed above the first region (region of CP1) and connected to a source (source of MOSFET 1 or “first MOSFET”; fig. 2) [0113] of the first MOSFET (1); and
a source electrode material (MP2; fig. 2) [0049] arranged to cover (be disposed above) the detection element (element of RG2) and
Uchinuma does not teach that the source electrode material is stitch-bonded to the source electrode.
Eguchi, however, teaches conductive material (external wiring 60; fig. 1) [0048] which is stich bonded to electrodes (50, the contact occurring at boundary 25; figs. 1 & 2) [0048].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention, to modify the connection of the source electrode material and the source electrode to comprise stitch bonding to increase long-term reliability through a reduction in thermal fatigue as taught by Eguchi [0052].
Regarding claim 2, Uchinuma in view of Eguchi teaches the semiconductor device according to claim 1, wherein the source electrode material (MP2) is bonded at least at a first joint( location of AD3; fig. 4) [0123] and a second joint (edge of MP2, which is closest to RG2, which is also in contact with AD2; fig. 2), and the detection element (element of RG2) is arranged below the source electrode material (MP2) between the first junction (AD3) and the second junction (edge of AD2).
Uchinuma in view of Eguchi, as presently modified, does not teach that the bonding of claim 2 is stitch-bonding.
Eguchi, however, teaches conductive material (external wiring 60; fig. 1) [0048] which is stich bonded to electrodes (50, the contact occurring at boundary 25; figs. 1 & 2) [0048].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention, to modify the connection bonding points of the first and second junctions to comprise stitch bonding to increase long-term reliability through a reduction in thermal fatigue as taught by Eguchi [0052].
Regarding claim 3, Uchinuma in view of Eguchi teaches the semiconductor device according to claim 1, wherein the source electrode material (material of MP2) is a ribbon wire made of aluminum [0046].
Regarding claim 4, Uchinuma in view of Eguchi teaches the semiconductor device according to claim 1, wherein the detection element (element of RG2, including a detection element) [0113] is a temperature detection element [0116], and the temperature detection element [0116] includes a plurality of diodes connected in series [0116].
It is noted that ¶ [0113]-[0122] of Uchinuma comprise a list of “notes” i.e., [note 2], [note 3], etc., which are written in pseudo claim format. In considering ¶ [0113]-[0122], it is interpreted that these “notes” align with embodiment 1, which reads on the claim above.
Regarding claim 5, Uchinuma in view of Eguchi teaches the semiconductor device according to claim 1, wherein the detection element (element of RG2, including a detection element) [0113] is a current detection element [0115], and the current detection element includes a second MOSFET [0115] and a second source electrode connected to a source of the second MOSFET [0115].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ETHAN EDWARD CUTLER whose telephone number is (703)756-5415. The examiner can normally be reached Monday-Friday 7:30 am - 5:00 pm Eastern Time.
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/ETHAN EDWARD CUTLER/Examiner, Art Unit 2892
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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