DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 5-8 and 12-14 state “the user interface” and depend from claim 1. There is no claimed language for “user interface” in claim 1. Examiner determines by broadest reasonable interpretation that “the user interface” to be any user interface that can create scatter plots and analysis defect data. Thus, the claims will be examined as best understood by the examiner.
Claims 9-11 inherit their indefiniteness from claim 8 from which they depend.
Claims 5-14 will be examined as best understood by the Examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 5, 16, and 17 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Kitsunezuka et al. WIPO WO 2024024633 A1 (hereinafter Kitsunezuka).
Regarding claim 1, Kitsunezuka teaches a method of presenting (Displaying Defects for Analysing, Page 5 Para. 6 , Page 6 Para. 1) defects data (Monitoring Data that Includes Defect Data) produced by inspection of semiconductor wafers or masks, the method comprising(Page 2 Section: System Configuration Para. 3):
(a) receiving defects data(Monitoring Data that Includes Defect Data) comprising a plurality of attributes (Label Information or Monitoring Data associated with each Defect, Page 12 Para. 4) per defect; (Page 2 Section: System Configuration Para. 3)
(b) using t-SNE (t-distributed Stochastic Neighbor Embedding) (Dimension Reduction Model) to embed the defects attributes(Label Information or Monitoring Data associated with each Defect) from a multi-dimensional attribute space into a lower-dimension space; (Page 7, Para. 2)
and (c) displaying (Page 10 Para. 5) the defect data(Monitoring Data that Includes Defect Data) embedded into the lower-dimension space(Page 7, Para. 2) on a 2D display as a scatter plot (Scatter Diagram, Page 9 Para. 2 and Page 14, Para. 4). (Fig. 5, Fig. 13, Fig. 15)
Regarding claim 5, Kitsunezuka teaches the method according to claim 1 wherein the lower-dimension space (2D or 3D, Page 5 Para. 5) is a 2-dimensional (2D) plane and the user interface displays a 2D scatter plot(Scatter Diagram, Page 9 Para. 2 and Page 14, Para. 4). (Fig. 5, Fig. 13, Fig. 15) The Monitoring data can be multidimensional and can be graphed/displayed in 2D or 3D(Page 5 Para. 5).
Regarding claim 16, Kitsunezuka teaches a non-transitory computer-readable medium storing (Storage Unit 12, Page 3, Para. 4) instructions that, when executed by a processor (CPU, GPU, Quantum Processor, Page 3 Para. 3), cause the processor to perform operations of claim 1, therefore it is rejected under the same rationale as claim 1.
Regarding claim 17, Kitsunezuka teaches a system for inspecting wafers or masks, the system comprising a user interface for presenting(Displaying Defects for Analysing, Page 5 Para. 6 , Page 6 Para. 1) defect data(Monitoring Data that Includes Defect Data) produced by inspection of wafers or masks (Page 2 Section: System Configuration Para. 3), the user interface implementing a method of claim 1, therefore it is rejected under the same rationale as claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 6, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Kitsunezuka et al. WIPO WO 2024024633 A1 (hereinafter Kitsunezuka).
Regarding claim 2, Kitsunezuka teaches the method according to claim 1 and further comprising:
(d) adding (Label Information or Monitoring Data associated with each Defect, Page 12 Para. 4) to at least one defect (Monitoring Data that Includes Defect Data): Kitsunezuka tracks if changes have happened when collecting monitoring data (Page 24, Para. 5 and Page 25, Para. 7) and updating the dimensional compression model to include the new monitoring data (Page 24, Para. 3).
and (e) performing
While Kitsunezuka fails to explicitly teach perform steps (b) and (c) again. Updating the dimensional compression model with new data (New Monitoring Data, Page 24, Para. 5 and Page 25, Para. 7), would update the analysis using t-SNE and the scatter diagram(Page 24, Para. 3). As the scatter diagram is created based on the dimensional compression model and monitoring data. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Scatter Diagram and Dimension Reduction Model to incorporate Kitsunezuka’s own teaching of updating the Dimension Reduction Model. Since doing so would provide the benefit of analysing changes over time in the monitoring data and updating the scatter diagrams with new data. (Page 26, Para. 6)
Regarding claim 6, Kitsunezuka teaches the method according to claim 1 wherein the lower-dimension space is a 3-dimensional (3D) (2D or 3D, Page 5 Para. 5) volume and the user interface displays a While Kitsunezuka fails to explicitly teach a three dimensional (3D) scatter plot. The Monitoring data can be multidimensional and can be graphed/displayed in 2D or 3D(Page 5 Para. 5). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s User Interface that displays 2D Scatter plots to incorporate Kitsunezuka’s own teaching of Graphing/Displaying 3D Information. Since doing so would provide the benefit of graphing and displaying 3D information as scatter diagrams, since scatter diagrams are useful for identifying correlations and detecting outliers.
Regarding claim 15, Kitsunezuka teaches the method according to claim 1 wherein (Fig. 5) include processing data comprising one or more of:
identity of a machine which produced the defect; (Chamber ID, Page 3 Para. 7 and Page 12 Para. 4-6)
date upon which the defect was produced;
time upon which the defect was produced; (Time Stamp, Page 3 Para. 6-7 and Page 12 Para. 4-6)
location of the defect on a die;
location of the defect on a wafer;
location of the defect on a mask;
identity of an inspection machine;
and identity of operator of the inspection machine.
While Kitsunezuka fails to explicitly teach the scatter plot(s) axes include attributes stated above. Kitsunezuka teaches visualizations can be based on label information (Page 7 Section: Displaying processing of monitoring data, Para. 2) and the label information (Page 12 Para. 4-6) can chamber ID, Recipe ID, Wafer ID, etc... Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Scatter Plot(s) Axes to incorporate Kitsunezuka’s own teaching of Creating Visualizations Based on Label Information. Since doing so would provide the benefit of generating Scatter Plots(s) with different Axes, which would increase the user’s ability to perform data analysis.
Claim(s) 3-4, 7-10 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Kitsunezuka et al. WIPO WO 2024024633 A1 (hereinafter Kitsunezuka) in view of NPL “Combining unsupervised and supervised learning in microscopy enables defect analysis of a full 4H-SiC wafer” by Binh Duong Nguyen, Johannes Steiner, Peter Wellmann, and Stefan Sandfeld (hereinafter Nguyen).
Regarding claim 3, Kitsunezuka fails to explicitly teach the method according to claim 1 wherein the attributes comprise attributes produced by input of a defect image to an image processing module trained to produce the attributes based on the defect image.
Kitsunezuka and Nguyen are analogous to the claimed invention because both of them are in the same field of analysing semiconductor wafer defects and displaying them through graphs.
However, Nguyen teaches the method according to claim 1 wherein the attributes comprise attributes (Type of Dislocation, Components, or Features, Fig. 3 or Fig. B2) produced by input of a defect image to an image processing module (Image Processing Techniques, Section: 2.2.1 Identification of Image Regions that contain an etch pit) trained to produce the attributes based on the defect image. (Section: 1 Introduction Classical Image Analysis Methods, Fig. 3).Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka Attributes to incorporate Nguyen’s Attributes based on Defect Images. Since doing so would provide the benefit of clustering image defects in various diagrams using the attributes. (Nguyen, Section: 2.2.3 Automated Clustering of Different Dislocation Types).
Regarding claim 4, Kitsunezuka fails to explicitly teach the method according to claim 1 wherein the attributes comprise attributes produced by input of a defect image to a machine learning module trained to produce the attributes based on the defect image.
However, Nguyen teaches the method according to claim 1 wherein the attributes comprise attributes(Type of Dislocation, Components, or Features, Fig. 3 or Fig. B2) produced by input of a defect image to a machine learning module (Automated Machine Learning Pipeline, Fig.2) trained to produce the attributes based on the defect image. (Section: 2 Materials and Methods) Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Attributes to incorporate Nguyen’s Attributes based on Defect Images. Since doing so would provide the benefit of clustering image defects in various diagrams using the attributes. (Nguyen, Section: 2.2.3 Automated Clustering of Different Dislocation Types).
Regarding claim 7, Kitsunezuka teaches the method according to claim 1 wherein the user interface displays two 2D scatter plots (Fig. 5), wherein:
the defects(Monitoring Data that Includes Defect Data) have been classified into categories; (Page 7 Section: Display Processing of Monitoring Data Para. 3 to Page 8 Para. 1 and Page 4 Para. 1) The monitoring data is classified into multiple categories, which includes defect data.
a first 2D scatter plot (Fig. 5, Either Scatter Plot) displays defects which have been classified manually;(Page 9 Para. 1) Both scatter plots have been classified based on the sensors present.
However, Kitsunezuka fails to teach:
and a second 2D scatter plot displays defects which have been classified by automatic classification.
Nguyen teaches:
(Page 2 Col. Para. 1) Analysing defects manually or utilizing a classical image analysis method are common.
and a second 2D scatter plot (Fig. 3 and Fig. B2) displays defects which have been classified by automatic classification. (Fig. 2) The defects are automatically classified utilizing machine learning based on type of dislocation, components, or features of the defect.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Categorization to incorporate Nguyen’s Automatic Machine Learning Categorization. Since doing so would provide the benefit of automating classification of defects which would accelerate the process of analysing defects. (Nguyen et al. Page 2 Col. 1 Para. 2) As well as allow someone to compare defect categorization that has been classified manually or automatic.
Regarding claim 8, Kitsunezuka teaches a user interface for creating 2D Scatter plots (Fig. 5, Fig. 13, Fig. 15) based on semiconductor monitoring data that includes defects.
Kitsunezuka fails to teach the method according to claim 1 wherein the user interface enables a user to select one defect in one of the 2D scatter plots and display an image of the defect.
However, Nguyen teaches the method according to claim 1 wherein the user interface enables a user to select one defect (Defect A-G) in one of the 2D scatter plots (Fig. 3) and display an image of the defect (Etch pit images associated with each Defect A-G). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s 2D Scatter Plots to incorporate Nguyen’s Displaying the Defect Image for each Point. Since doing so would provide the benefit of viewing data associated with each scatter point.
Regarding claim 9, Kitsunezuka fails to teach the method according to claim 8 wherein the defect image comprises a digital image obtained from an e-beam inspection machine.
However, Nguyen teaches the method according to claim 8 wherein the defect image comprises a digital image obtained from an e-beam inspection machine (Images Produced by Scanning Electron Microscopy). (Section: 1 Introduction, Page 2 Col.1 Para. 1) Scanning Electron Microscopy is an e-beam inspection machine. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Sensors to include Nguyen’s Scanning Electron Microscopy. Since doing so would provide the benefit of generating images of the semiconductors wafer surface for inspection (Nguyen, Section: 1 Introduction, Page 2 Col.1 Para. 1).
Regarding claim 10, Kitsunezuka fails to teach the method according to claim 8 wherein the defect image comprises a digital image obtained from an optical inspection machine.
However, Nguyen teaches the method according to claim 8 wherein the defect image comprises a digital image obtained from an optical inspection machine(Images Produced by Optical Scanning). (Section: 1 Introduction, Page 2 Col.1 Para. 1) Optical Scanning would utilize an optical inspection machine. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Sensors to include Nguyen’s Optical Scanning Since doing so would provide the benefit of generating images of the semiconductors wafer surface for inspection (Nguyen, Section: 1 Introduction, Page 2 Col.1 Para. 1).
Regarding claim 18, Kitsunezuka teaches the system according to claim 17 and further comprising a database (Monitoring Data Storage Unit 12c, Page 3 Para. 7) for storing defect(Label Information or Monitoring Data associated with each Defect, Page 12 Para. 4) associated with the defectThe Monitoring Data Storage Unit 12c is a database, which stores monitoring data that includes defect data. (Page 2 Section: System Configuration Para. 3)
However, Kitsunezuka fails to explicitly teach defect images and defect image attributes.
Nguyen teaches defect images (Images of Semiconductor Wafers include Defects, Fig.1 or Fig.3) and defect image attributes(Type of Dislocation, Components, or Features, Fig. 3 or Fig. B2). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Attributes to incorporate Nguyen’s Attributes based on Defect Images. Since doing so would provide the benefit of clustering image defects in various diagrams using the attributes. (Nguyen, Section: 2.2.3 Automated Clustering of Different Dislocation Types).
Regarding claim 19, Kitsunezuka teaches the system according to claim 17 and further comprising a database(Monitoring Data Storage Unit 12c, Page 3 Para. 7) for storing non-image attributes(Label Information or Monitoring Data associated with each Defect, Page 12 Para. 4) associated with the defect
However, Kitsunezuka fails to explicitly teach defect images.
Nguyen teaches defect images (Images of Semiconductor Wafers include Defects, Fig.1 or Fig.3). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Attributes to incorporate Nguyen’s Attributes based on Defect Images. Since doing so would provide the benefit of clustering image defects in various diagrams using the attributes. (Nguyen, Section: 2.2.3 Automated Clustering of Different Dislocation Types).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Kitsunezuka et al. WIPO WO 2024024633 A1 (hereinafter Kitsunezuka) in view of NPL “Combining unsupervised and supervised learning in microscopy enables defect analysis of a full 4H-SiC wafer” by Binh Duong Nguyen, Johannes Steiner, Peter Wellmann, and Stefan Sandfeld (hereinafter Nguyen) in further view of Gkorou et al. WIPO WO 2022012873 A1 (hereinafter Gkorou).
Regarding claim 11, Kitsunezuka and Nguyen fail to teach the method according to claim 8 wherein the display of the image of the defect is by displaying one image of the defect and one image of a same area without the defect, to cause appearance of the defect to switch on and off.
Kitsunezuka, Nguyen, and Gkorou are analogous to the claimed invention because all of them are in the same field of analysing semiconductor defects.
Gkorou teaches the method according to claim 8 wherein the display of the image of the defect is by displaying one image of the defect (Selected Wafer Image 602) and one image of a same area without the defect (Reference Data Image 604, 606, or 608), to cause appearance of the defect to switch on and off. (Fig. 6 and Para. 0083-0086) The selected wafer image could be a wafer with a defect and the reference data image can be an image the wafer without the defect. Since the reference data is based on a common characteristic of the parameter data and the parameter data can be used to diagnostic wafers. (Para. 007). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s and Nguyen’s Defect Images to incorporate Gkorou Selection and Comparison of Defect Images and Reference Images. Since doing so would provide the benefit of comparing defect wafers with reference images to enhance analysis of the defect and modify the model that groups the images (Para. 009).
Claim(s) 12 are rejected under 35 U.S.C. 103 as being unpatentable over Kitsunezuka et al. WIPO WO 2024024633 A1 (hereinafter Kitsunezuka) in view of NPL Matplotlib 3.9.0 Documentation for Creating Scatter Plots by Matplotlib (hereinafter Matplotlib).
Regarding claim 12, Kitsunezuka teaches the method according to claim 1 wherein the user interface enables selecting (User Changing Setting Information, Page 3 Para. 6) which method is used, instead of t-SNE (Other Dimensional Reductions Models – Principal Component Analysis, Independent Component Analysis, Factor Analysis, Hierarchical Clustering, Latent Semantic Analysis. (Page 7, Para. 2), The user can utilize several different analysis methods to reduce the dimensions.
However, Kitsunezuka fails to teach to reduce dimensionality of the plurality of attributes to the number of axes of the scatter plot(s).
Kitsunezuka and Matplotlib are analogous to the claimed invention because both of them are in the same field of visualizing data using scatter plots.
Matplotlib teaches to reduce dimensionality of the plurality of attributes to the number of axes of the scatter plot(s). (Page 1, X and Y Values) Matplotlib is a well-known data analysis tool for generating interactive visualizations and performing statistical analysis using the popular programming language Python. When creating scatter plots in Matplotlib a user can choose the axes (X and Y values) and the data associated with the scatter plot. Thus, if a user wanted to create a scatter plot utilizing defect data that has been categorized. They could easily choose the axes to be certain defect attributes. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s Scatter Plot(s) to incorporate MatplotLib’s Scatter Plots Creation Tool that can Select Any Data as the Axes. Since doing so would provide the benefit of increasing the flexibility when generating scatter plots and enhance the user’s ability when analysing data.
Claim(s) 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Kitsunezuka et al. WIPO WO 2024024633 A1 (hereinafter Kitsunezuka) in view of NPL “Combining unsupervised and supervised learning in microscopy enables defect analysis of a full 4H-SiC wafer” by Binh Duong Nguyen, Johannes Steiner, Peter Wellmann, and Stefan Sandfeld (hereinafter Nguyen) in further view of Davis et al. U.S. Patent Application Publication 20080247636 A1 (hereinafter Davis).
Regarding claim 13, Both Kitsunezuka and Nguyen teach Generating 2D Scatter plot(s) based on semiconductor defect analysis (Kitsunezuka et al. Fig.5 and Nguyen et al. Fig. 3) and the utilization of a user interface to create said 2D Scatter plots(s). Nguyen teaches the defects data can be either classified manually (Nguyen et al. Page 2 Col. 1 Para. 1) or automatically (Nguyen et al. Fig. 2).
However, Kitsunezuka and Nguyen fail to explicitly teach the method according to claim 7 wherein the user interface enables to select one defect in the second 2D scatter plot which displays defects which have been classified by automatic classification and classify the defect manually.
Kitsunezuka, Nguyen, and Davis are analogous to the claimed invention because all of them are in the same field of generating visualizations for performing inspections and analysis.
Davis teaches the method according to claim 7 wherein the user interface (Para. 0006-0007 and 0040-0041) enables to select one defect in the second 2D scatter plot (Fig. 5 - 2D Visualization) which displays defects which have been classified by automatic classification and classify the defect manually. (Scatter plot(s) are 2D Visualizations of data. The user can modify the 2D Visualizations inspection process in a way that fits their workflow, Para. 0067. As well as the 2D visualizations can be labeled during inspection manually or automatically, Para. 0078)
Davis’s robust interactive graphical user interface used to inspect and analysis objects, could be used for semiconductors that have been scanned/modeled. One of ordinary skill in the art would be able to utilize the semiconductor wafer data collected in Kitsunezuka and Nguyen as input into Davis’s Interactive Inspection/Analysis Tool. As Davis’s has an acquisition module 156 which can acquire stored data or data from other devices (Davis et al. Para. 0041), and Kitsunezuka stores its monitoring data (Defect data) into a database (Kitsunezuka et al. Monitoring Data Storage Unit 12c, Page 3 Para. 7) and has a communication unit 13 that can transmit/receive data (Kitsunezuka et al. Page 5 Para. 6). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s and Nguyen’s 2D Scatter plot(s) and Defect Data to incorporate Davis’s Graphical User Interface Inspection/Analysis Tool. Since doing so would provide the benefit of analysing/inspecting defects in semiconductors utilizing an interactive graphical user interface, which would increase the user’s ability to perform data analysis and allow manipulation of the defect data.
Regarding claim 14, Both Kitsunezuka and Nguyen teach Generating 2D Scatter plot(s) based on semiconductor defect analysis (Kitsunezuka et al. Fig.5 and Nguyen et al. Fig. 3) and the utilization of a user interface to create said 2D Scatter plots(s). Nguyen teaches the defects data can be either classified manually (Nguyen et al. Page 2 Col. 1 Para. 1) or automatically (Nguyen et al. Fig. 2).
However, Kitsunezuka and Nguyen fail to explicitly teach the method according to claim 7 wherein the user interface enables to select one defect in the second 2D scatter plot which displays defects which have been classified by manual classification and submit the defect to automatic classification.
Kitsunezuka, Nguyen, and Davis are analogous to the claimed invention because all of them are in the same field of generating visualizations for performing inspections and analysis.
Davis teaches the method according to claim 7 wherein the user interface (Para. 0006-0007 and 0040-0041) enables to select one defect in the second 2D scatter plot(Fig. 5 - 2D Visualization) which displays defects which have been classified by manual classification and submit the defect to automatic classification. (Scatter plot(s) are 2D Visualizations of data. The user can modify the 2D Visualizations inspection process in a way that fits their workflow, Para. 0067. As well as the 2D visualizations can be labeled during inspection manually or automatically, Para. 0078)
Davis’s robust interactive graphical user interface used to inspect and analysis objects, could be used for semiconductors that have been scanned/modeled. One of ordinary skill in the art would be able to utilize the semiconductor wafer data collected in Kitsunezuka and Nguyen as input into Davis’s Interactive Inspection/Analysis Tool. As Davis’s has an acquisition module 156 which can acquire stored data or data from other devices (Davis et al. Para. 0041), and Kitsunezuka stores its monitoring data (Defect data) into a database (Kitsunezuka et al. Monitoring Data Storage Unit 12c, Page 3 Para. 7) and has a communication unit 13 that can transmit/receive data (Kitsunezuka et al. Page 5 Para. 6). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kitsunezuka’s and Nguyen’s 2D Scatter plot(s) and Defect Data to incorporate Davis’s Graphical User Interface Inspection/Analysis Tool. Since doing so would provide the benefit of analysing/inspecting defects in semiconductors utilizing an interactive graphical user interface, which would increase the user’s ability to perform data analysis and allow manipulation of the defect data.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIANNA R COCHRAN whose telephone number is (571)272-4671. The examiner can normally be reached Mon-Fri. 7:30am - 5:00pm.
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/BRIANNA RENAE COCHRAN/Examiner, Art Unit 2615
/ALICIA M HARRINGTON/Supervisory Patent Examiner, Art Unit 2615