DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 21-40 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 22-25, 27, 31, and 33-40 of U.S. Patent No. 12/100,720 B2. Although the claims at issue are not identical, they are not patentably distinct from each other.
The following is to compare claims 21-40 of instant application with claims 22-25, 27, 31, and 33-40 of Patent No.: 12/100,720 B2.
Instant Application
Patent No.: 12/100,720 B2 (hereinafter ‘720)
Claims 21, 24, 26, and 30
Claim 25
Claim 22
Claim 22
Claim 23
Claim 23
Claim 25
Claim 24
Claim 27
Claim 27
Claims 28 and 31-32
Claim 31
Claims 29 and 34
Claim 33
Claim 33
Claim 35
Claim 35
Claim 34
Claim 36
Claim 36
Claim 37
Claim 37
Claim 38
Claim 39
Claim 39
Claim 38
Claim 40
Claim 40
As shown in the comparison chart above, although independent claims 21, 31, and 36 of instant application and claims 25, 31, and 36 of ‘720 are not identical, they are not patentably distinct from each other. Claim 25 of '720 recites all the limitations of claim 1 of instant application and more limitations, claim 31 of '720 recites all the limitations of claim 31 of instant application and more limitations. Claim 36 of '720 recites claim limitations of claim 36 of instant application, and more limitations. It appears that they are not the same invention because narrower vs. broader claimed limitations; thus they are not patentably distinct.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 22, and 30 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kwon et al. (US PG-Pub No.: 2009/0122178 A1, hereinafter, “Kwon”).
Regarding claim 1, Kwon discloses an image sensor package (see Kwon, FIG. 1), comprising:
a substrate (inherent in 100, FIG. 1);
a pixel sensing array (100b, FIGs. 1 and 2) disposed within a device layer (100b) over the substrate (FIG. 1);
a color filter array (112, ¶ [0029]) disposed over the pixel sensing array (100b);
a flatness layer (113, FIG. 1) disposed on the color filter array (112) and extended laterally along an upper surface of the substrate (100b); and
an on-wafer lens (114, ¶ [0029]) disposed over the flatness layer (113) with a convex top surface and a bottom surface contacting an upper surface of the flatness layer (113, FIG. 1).
Regarding claim 22, Kwon discloses the image sensor package according to claim 21, further comprises: a protection layer (200, FIG. 1) disposed on the convex top surface of the on-wafer lens (114); and an on-wafer shield structure (450, FIG. 1) spaced around a periphery of the image sensor package and having a sidewall directly contacting sidewalls of the substrate (100b) and the protection layer (200, FIG. 1).
Regarding claim 1, Kwon discloses an image sensor package (see Kwon, FIG. 1), comprising:
a substrate (inherent in 100, FIG. 1);
a pixel sensing array (100b, FIGs. 1 and 2) disposed within a device layer (100b) over the substrate (FIG. 1);
a color filter array (112, ¶ [0029]) disposed over the pixel sensing array (100b);
a flatness layer (410, FIG. 1) disposed on the color filter array (112) and extended laterally along an upper surface of the substrate (100b); and
an on-wafer lens (412, ¶ [0034]) disposed over the flatness layer (410) with a convex top surface and a bottom surface contacting an upper surface of the flatness layer (410, FIG. 1).
Regarding claim 30, Kwon discloses the image sensor package according to claim 21, wherein the flatness layer (410) has a sidewall vertically aligned with a sidewall of the substrate (100b, FIG. 1).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XIA L. CROSS whose telephone number is (571)270-3273. The examiner can normally be reached 9 am-5:30 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at 571-272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/XIA L CROSS/Primary Examiner, Art Unit 2892
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