DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-11 are pending.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) to TW113101665 for 01/16/2024. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 07/17/2024, have been considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested:
STACKED LIGHT EMITTING DIODES HAVING TWO-DIMENSIONAL CONTACT LAYERS
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 4, 5, 7-9, and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cao (US PGPub 2007/0170444; herein known as Cao).
Regarding claim 1, Cao teaches (annotated Fig. 3 below), a light emitting diode, comprising:
a substrate (301, [0023]), a buffer layer (302, [0023]), stacked on the substrate, and at least two light emitting units (LE1, LE2, LE3, [0023]), sequentially layered on the buffer layer in a stacked manner ([0023]), wherein each light emitting unit includes a semiconductor light emitting structure (306, 315, 322, [0023]) and a two-dimensional material layer (306, 307, 308; 314, 315, 316; 322, 323, 324, [0023]), and the two-dimensional material layer is stacked on the semiconductor light emitting structure, and wherein each light emitting unit emits light with a specific wavelength through the semiconductor light emitting structure respectively (red, green, and blue, respectively, [0023]), wherein the specific wavelength corresponding to one of the at least two light emitting units, which is closer to the substrate, is not smaller than the specific wavelength corresponding to the other of the at least two light emitting units, which is farther from the substrate (red is closest to the substrate, blue is farther).
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Regarding claim 2, Cao teaches (annotated Fig. 3 above), the light emitting diode as claimed in claim 1, wherein the at least two light emitting units include a first light emitting unit (LE1) and a second light emitting unit (LE2), wherein the first light emitting unit is stacked on the buffer layer (302, [0023]), the second light emitting unit is stacked on a two-dimensional material layer (308, [0023]) of the first light emitting unit, and wherein a semiconductor light emitting structure of the first light emitting unit is different from a semiconductor light emitting structure of the second light emitting unit (LE1 is a red emitting structure, LE2 is a green emitting structure).
Regarding claim 4, Cao teaches (annotated Fig. 3 above), the light emitting diode as claimed in claim 2, wherein a cross-sectional area of the first light emitting unit (LE1) along a horizontal direction is smaller than a cross-sectional area of the buffer layer (302) along the horizontal direction (LE1 is fully stacked on the buffer layer, and the buffer layer extends further beyond the edge of LE1) , and a cross-sectional area of the second light emitting unit (LE2) along the horizontal direction is smaller than the cross-sectional area of the first light emitting unit (LE2) along the horizontal direction (LE2 is fully stacked on LE1 and LE1 extends further beyond the edge of LE2).
Regarding claim 5, Cao teaches (annotated Fig. 3 above), the light emitting diode as claimed in claim 1, wherein when a quantity of the light emitting units is not less than three (LE1, LE2, LE3, [0023]), the semiconductor light emitting structure of any light emitting unit of the at least two the light emitting units is different from the semiconductor light emitting structure of another adjacent light emitting unit (LE1 is red, LE2 is green, LE3 is blue).
Regarding claim 7, Cao teaches (annotated Fig. 3 above), the light emitting diode as claimed in claim 1, wherein the buffer layer (302, [0023]) is made of a two-dimensional material ([0019]).
Regarding claim 8, Cao teaches (annotated Fig. 3 above), the light emitting diode as claimed in claim 1, further comprising a base electrode, (310, [0023]) wherein the base electrode is electrically connected to the buffer layer and a horizontal spacing is retained between the base electrode and the at least two light emitting units (see Fig. 3).
Regarding claim 9, Cao teaches (annotated Fig. 3 above), the light emitting diode as claimed in claim 1, wherein each light emitting unit of the at least two light emitting units further includes an additional electrode respectively (309, 317, 325, [0023]) and each additional electrode is electrically connected to the two-dimensional material layer correspondingly (308, 316, 324, [0023]), and wherein each additional electrode of the light emitting unit retains a horizontal spacing relative to the adjacent light emitting unit (See Fig. 3).
Regarding claim 11, Cao teaches (annotated Fig. 3 above), the light emitting diode as claimed in claim 1, wherein the substrate is made of sapphire ([0019]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Cao as applied to claims 2 and 5 above, and further in view of Chae et al. (US PGPub 2019/0164945; herein Chae).
Regarding claim 3, Cao teaches the light emitting diode as claimed in claim 2, wherein each semiconductor light emitting structure has a first-type semiconductor epitaxial layer (305, 313, [0023]), a light emitting layer (306, 314, [0023]) and a second-type semiconductor epitaxial layer (307, 315, [0023]), but does not explicitly teach wherein an epitaxial stacking sequence of the first-type semiconductor epitaxial layer, the light emitting layer and the second-type semiconductor epitaxial layer of any light emitting unit is reverse relative to an epitaxial stacking sequence of the first-type semiconductor epitaxial layer, the light emitting layer and the second-type semiconductor epitaxial layer of the second light emitting unit.
In analogous art, Chae teaches (Figs. 16-17) wherein an epitaxial stacking sequence of the first-type semiconductor epitaxial layer (221, [0429]), the light emitting layer (233, [0429]) and the second-type semiconductor epitaxial layer (235, [0429]) of the first light emitting unit (230, [0430]) is reverse relative to an epitaxial stacking sequence of the first-type semiconductor epitaxial layer (241, [0434]), the light emitting layer (243, [0434]) and the second-type semiconductor epitaxial layer (245, [0434]) of the second light emitting unit (240, [0432]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Cao and of Chae to include wherein an epitaxial stacking sequence of the first-type semiconductor epitaxial layer, the light emitting layer and the second-type semiconductor epitaxial layer of any light emitting unit is reverse relative to an epitaxial stacking sequence of the first-type semiconductor epitaxial layer, the light emitting layer and the second-type semiconductor epitaxial layer of the second light emitting unit in order to independently drive the respective light emitting units (Chae, [0437]).
Regarding claim 6, Cao teaches the light emitting diode as claimed in claim 5, wherein each semiconductor light emitting structure has a first-type semiconductor epitaxial layer (305, 313, 322, [0023]), a light emitting layer (305, 313, 322, [0023]) and a second-type semiconductor epitaxial layer (307, 315, 323, [0023]), but does not explicitly teach wherein an epitaxial stacking sequence of the first-type semiconductor epitaxial layer, the light emitting layer and the second-type semiconductor epitaxial layer of any light emitting unit is reverse relative to an epitaxial stacking sequence of the first-type semiconductor epitaxial layer, the light emitting layer and the second-type semiconductor epitaxial layer of another adjacent light emitting unit.
In analogous art, Chae teaches wherein an epitaxial stacking sequence of the first-type semiconductor epitaxial layer (221, [0429]), the light emitting layer (233, [0429]) and the second-type semiconductor epitaxial layer (235, [0429]) of any light emitting unit (230, [0430]) is reverse relative to an epitaxial stacking sequence of the first-type semiconductor epitaxial layer (241, [0434]), the light emitting layer (243, [0434]) and the second-type semiconductor epitaxial layer of another adjacent light emitting unit (240, [0432]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Cao and of Chae to include wherein an epitaxial stacking sequence of the first-type semiconductor epitaxial layer, the light emitting layer and the second-type semiconductor epitaxial layer of any light emitting unit is reverse relative to an epitaxial stacking sequence of the first-type semiconductor epitaxial layer, the light emitting layer and the second-type semiconductor epitaxial layer of another adjacent light emitting unit in order to independently drive the respective light emitting units (Chae, [0437]).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Cao as applied to claim 1 above, and further in view of Nikam et al. (Epitaxial growth of vertically stacked p-MoS2/n-MoS2 heterostructures by chemical vapor deposition for light emitting devices, Nano Energy; herein known as Nikam).
Regarding claim 10, Cao teaches the light emitting diode as claimed in claim 1, but does not explicitly teach wherein a material of the two-dimensional material layer is selected from a group of molybdenum disulfide, tungsten disulfide, molybdenum diselenide and tungsten diselenide.
In analogous art, Nikam teaches a material of the two-dimensional material layer is molybdenum disulfide (p. 460, Col 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Cao and of Nikam to include wherein a material of the two-dimensional material layer is molybdenum disulfide in order to fabricate atomically thin light sources with white-light emission for low-cost display, lighting, and optical communication (Nikam, p. 461, Conclusion).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EMILY N FARMER whose telephone number is (703)756-1472. The examiner can normally be reached Monday-Friday 7:30-5:00.
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/EMILY FARMER/Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
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