Prosecution Insights
Last updated: October 01, 2026
Application No. 18/777,194

SEMICONDUCTOR DEVICE

Non-Final OA §102§103
Filed
Jul 18, 2024
Priority
Jan 20, 2022 — JP 2022-007105 +1 more
Examiner
YUSHINA, GALINA G
Art Unit
Tech Center
Assignee
Rohm Co., Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
882 granted / 1107 resolved
+19.7% vs TC avg
Strong +16% interview lift
Without
With
+16.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
34 currently pending
Career history
1124
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
48.1%
+8.1% vs TC avg
§102
13.2%
-26.8% vs TC avg
§112
36.1%
-3.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1107 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1-15 are examined on merits herein. Specification The disclosure is objected to because of the following informalities: Paragraph 0043 of the published application US 20240379574 states that Figs. 6 and 8 show the first semiconductor element 11 and the insulating element 13 bonding to the obverse surface 31. However, none of the referenced figures shows element 11 – both show element 13. Paragraph 0057 of the published application teaches that wires 62 are bonding to a connection part 54, which is incorrect, since wires 62 are bonded to connection part 56. Appropriate corrections are required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Aki et al. (US 2005/0116145) In re Claim 1, Aki teaches a semiconductor device comprising (Figs. 1 and 11): an insulating element 2 (paragraph 0049); a conductive member 3b - with elements 13b (paragraphs 0050 0010) - on which the insulating element 2 is mounted; and a sealing resin 4 (paragraph 0049) covering the insulating element 2, wherein the conductive member – e.g., its elements 13b - includes an uneven part (Fig. 11, paragraphs 0040, 0068) covered by the sealing resin 4 (as shown in Fig. 1). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4 and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Kikuchi (US 2021/0265310) in view of Ishihara (JP 201016198). In re Claim 1, Kikuchi teaches a semiconductor device comprising (Fig. 1-14): an insulating element 50 (paragraph 0035); a conductive member 1 (paragraph 0035) on which the insulating element 50 is mounted (paragraph 00038); and a sealing resin 70 (paragraph 0035) covering the insulating element 50, wherein the conductive member 1 includes a portion covered by the sealing resin 70: the portion of conductive member 1 surrounded by resin is shown by dotted lines 70 in Fig. 2 and is better shown in a perspective view of Fig. 1 and multiple cross-sectional views of the device. Kikuchi does not teach that the conductive member includes an uneven part covered by the resin. Ishihara teaches a semiconductor device (Figs. 1-4, page 3, a section “die pad” in Fig. 7, and a section “description of symbols” in page 14) with a conductive member 1, 11, with a chip 3 mounted on pad 11 and both being covered with resin 4, where the conductive member includes an uneven part - on a top surface of pad 11 - comprising a plurality of dimples (see page 7), the uneven part is shown as D1 in Fig. 3 and as D2 in Fig. 4 (see page 14), this uneven part also is identified as a roughened surface (page 13. Kikuchi and Ishihara teach analogous arts directed to semiconductor devices comprising leads and pads on which chips are mounted where pads and chips are embedded into a sealing resin, and one of ordinary skill in the art before the effective date of filing the application would have had a reasonable expectation of success in modifying the Kikuchi device in view of the Ishihara device, since they are from the same field of endeavor, and Ishihara created a successfully operated device. It would have been obvious for one of ordinary skill in the art before the effective date of filing the application to modify the Kikuchi device by creating at least a part of an upper surface of the conductive member 1 – e.g., an upper surface of pad 11 (paragraph 0036) - with dimples (e.g., having a roughened surface), where such modification is beneficial for improved adhesion between the conductive member and the resin and prevents the resin from peeling off (Ishihara, page 2, paragraphs 1-2). In re Claim 2, Kikuchi/Ishihara teaches the semiconductor device of Claim 1 as cited above, wherein the conductive member 1 includes a first die pad 11 on which the insulating element 50 is mounted, and the uneven part – as a part having dimples and/accordingly, the roughened, uneven surface - includes a first region that is provided on the first die pad 11. In re Claim 3, Kikuchi/Ishihara teaches the semiconductor device of Claim 2 as cited above, wherein the first die pad 11 (of Kikuchi) includes an obverse surface (e.g., the upper surface) on which the insulating element 50 is mounted, and the first region (with the uneven part) is provided on the obverse surface (per Ishihara, as explained for Claim 1). In re Claim 4, Kikuchi/Ishihara teaches the semiconductor device of Claim 3 as cited above, with the first region of the roughened surface provided per Ishihara. Ishihara further teaches (Figs. 3 and 4) that the first region (D1 or D2) is provided only on a part of the obverse surface. In re Claim 12, Kikuchi/Ishihara teaches the semiconductor device of Claim 2 as cited above. Kikuchi further teaches (Figs. 1-14) that the conductive member 1 includes a second die pad 21 (paragraph 0036) that is spaced apart from the first die pad 11. For the same reason that explained for Claim 1, it would have been obvious for one of ordinary skill in the art before the effective date of filing the application, to incorporate into the uneven part a tenth region that is provided on the upper surface of the second die pad 21. In re Claim 13, Kikuchi/Ishihara teaches the semiconductor device of Claim 12 as cited above, including the first and second die pads. Kikuchi/Ishihara further teaches that the semiconductor device of Claim 12 comprising (see Kikuchi): a controlling element 41 electrically connected to the insulating element 50 (paragraph 0038); and a driving element 42 electrically connected to the insulating element 50 (paragraph 0038), wherein the controlling element 41 is mounted on the first die pad 11, and the driving element 42 is mounted on the second die pad 21. Claims 5-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kikuchi/Ishihara in view of Inoue et al. (US 2013/0180772). In re Claim 5, Kikuchi/Ishihara teaches the semiconductor device of Claim 3 as cited above, including the reason for creating an uneven part on the obverse surface of the first die pad. Kikuchi’ first the first die pad 11 (Figs. 1-14) includes a first side surface (as one of fourth side surfaces of pad 11 in Figs. 2, 12, etc.) connected to the obverse surface and comprising a second region. Kikuchi/Ishihara does not explicitly teach that the uneven part also includes the second region, since Ishihara teaches creating the uneven part only on an upper surface of the conductive member. Inoue teaches a conductive member 22 (Fig. 3, paragraphs 0026-0027, 0059-0066) having uneven (roughened) parts on an obverse surface 25 and on all side surface 26 to increase an adhesion strength to these surfaces. Kikuchi/Ishihara and Inoue teach analogous arts directed to semiconductor devices comprised roughened surfaces of conductive members, and one of ordinary skill in the art before the effective dates of filing the application would have had a reasonable expectation of success in modifying the Kikuchi/Ishihara device in view of the Inoue device, since they are from a same field of endeavor, and Inoue created a successfully operated device. Since the first side surface of the Kikuchi first pad is in contact with the resin, it would have been obvious for one of ordinary skill in the art before the effective date of filing the application to modify the Kikuchi/Ishihara device of Claim 3 by extending the uneven part to the first side surface of the first pad, in order to improve an adhesive strength between this side and the resin (Inoue, paragraph 0026). In re Claim 6, Kikuchi/Ishihara/Inoue teaches the semiconductor device of Claim 5 as cited above, including the second region with the uneven surface on the first side surface of the device. Since Ishihara teaches that only a part of a surface can include an uneven part (as D1 and D2 in Figs. 3-4 of Ishihara), it would have been obvious for one of ordinary skill in the art before the effective date of filing the application to modify the semiconductor device of Claim 5 by providing the second region on a part of the first side surface, wherein this is sufficient to prevent resin from peeling off the first side surface. In re Claim 7, Kikuchi/Ishihara/Inoue teaches the semiconductor device of Claim 5 as cited above. Kikuchi further teaches (Figs. 1-14) that the first die pad 11 includes a second side surface connected to (and adjacent with) the obverse surface and the first side surface and obviously having a third region. Since the second side surface of the first pad is in contact with the resin (similar to the first side and the obverse surface), it would have been obvious for one of ordinary skill in the art before the effective date of filing the application to include into the uneven part also the third region provided on the second side surface. In re Claim 8, Kikuchi/Ishihara/Inoue teaches the semiconductor device of Claim 7 as cited above, including the third region on the second side surface. Since Ishihara teaches that only a part of a surface can include an uneven part (as D1 and D2 in Figs. 3-4 of Ishihara), it would have been obvious for one of ordinary skill in the art before the effective date of filing the application to modify the semiconductor device of Claim 7 by providing the third region on a part of the first side surface, wherein this is sufficient to prevent resin from peeling off the second side surface. In re Claim 9, Kikuchi/Ishihara/Inoue teaches the semiconductor device of Claim 7 as cited above, comprising the uneven part that includes portions of the obverse surface, the first side surface and the second side surface, the second side surface adjacent the first side surface and the obverse surface. Ishihara further teaches (Fig. 4) that a portion of the uneven part is created as corner portions D2. Since Ishihara teaches that only a part of a surface at a corner of the surface can include an uneven part, it would have been obvious for one of ordinary skill in the art before the effective date of filing the application to modify the semiconductor device of Claim 7 by creating at a first corner part where the obverse surface, the first side surface, and the second side surface are connected to each other, the first region being provided on the obverse surface, the second region being provided on the first side surface (also at the corner), and the third region being provided on the second side surface, if such modification would satisfy the manufacturer requirement of preventing peeling off the resin from surfaces of the first die pad. In re Claim 10, Kikuchi/Ishihara/Inoue teaches the semiconductor device of Claim 7 as cited above, including the obverse and first and second side surfaces of the first die pad comprising first, second, and third uneven regions. Kikuchi further teaches that the first die pad 11 (Figs. 1-14) includes a third side surface connected to the obverse surface and the second side surface, while Ishihara teaches a fourth region with an uneven part (as a second region with D2 at a second corner of Fig. 4) on the obverse surface to be spaced apart from the first region, e.g., Ishihara teaches multiple separated uneven portions D2 on one surface. It would have been obvious for one of ordinary skill in the art before the effective date of filing the application to further modify the Kikuchi/Ishihara/Inoue device of Claim 7 by creating uneven portions also at some parts of the first and second side surfaces of the first die pad, such as creating a fifth region provided on the second side surface to be spaced apart from the third region and creating a sixth region provided on the third side surface, where and at a second corner part where the obverse surface, the second side surface, and the third side surface are connected to each other, the fifth region provided on the second side surface, and the sixth region provided on the third side surface, wherein such modification allows creating a device satisfying the manufacturer requirement of preventing peeling off the resin from the first die pad. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Kikuchi/Ishihara/Inoue in view of Baek et al. (US 2013/0277833). In re Claim 11, Kikuchi/Ishihara/Inoue teaches the semiconductor device of Claim 7 as cited above, including first and second side surfaces and the obverse surface of the first die pad all including portions of the uneven part, per Ishihara and Inoue. Ishihara teaches (Fig. 4) that the uneven part on the obverse surface includes four uneven regions D2, each disposed at a corner of the obverse surface and being separated from other regions, while Kikuchi teaches (Fig. 12, paragraph 0079) that the first die pad 11 has a reverse surface attached to a bonding layer 49. It would have been obvious for one of ordinary skill in the art before the effective date of filing the application to modify the Kikuchi/Ishihara/Inoue device of Claim 7 by creating the first and second side surfaces in a same manner as Ishihara teaches the obverse surface, and creating for that a seventh region provided on the first side surface to be spaced apart from the second region, creating an eighth region provided on the second side surface to be spaced apart from the third region, where at a third corner part - the first side surface, the second side surface, and the reverse surface are connected to each other, the seventh region is provided on the first side surface, the eighth region is provided on the second side surface, wherein such shapes of the first and second side surfaces allows preventing the resin peeling off from the first and second side surfaces while being desirable for the manufacturer. obverse and modification and such shapes of dispositions of the uneven surface portions are desirable. Note in addition that in accordance with MPEP 2144.04. I.B, referencing In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966), the court held that changes in shape is not patentable since this is a matter of choice of a person of ordinary skill in the art in absent persuasive evidence that the particular configuration is significant. Kikuchi/Ishihara/Inoue does not teach that the reverse surface of the first die pad has a ninth uneven region. Baek teaches (Fig. 1, paragraphs 0060, 0069-0072) that a pad 150 has high roughness portions (e.g. uneven parts) as an uneven part 150-U on an obverse surface and an uneven part 150-L on a reverse surface, allowing to improve an electrical connection at the upper (obverse) part and to improve a physical connection at the lower (reverse) part (paragraph 0072). Kikuchi/Ishihara/Inoue and Baek teach analogous arts directed to conductive pads comprised uneven portions, and one of ordinary skill in the art before the effective date of filing the application would have had a reasonable expectation of success in modifying the Kikuchi/Ishihara/Inoue device in view of the Baek teaching, since they are from the same field of endeavor, and Baek created a successfully operated device. It would have been obvious for one of ordinary skill in the art before the effective date of filing the application to further modify the Kikuchi/Ishihara/Inoue device of Claim 7 by creating the reverse side of the first die pad with the nineth uneven surface, in order to provide a better connection of the reverse surface with the adhesive layer to which it is attached (Baek, paragraph 0072). Claims 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Aki in view of Yamada et al. (US 2019/0160726). In re Claim 14, Aki teaches the semiconductor device of Claim 1 as cited above, wherein the uneven part is presented by fine recesses and protrusions (as Fig. 11 of Aki shows). Aki does not teach that fine recesses are irregularly aligned in the uneven part. Yamada teaches (paragraph 0041) that recesses and protrusion can be irregularly aligned. Aki and Yamada teach analogous arts directed to plurality of recesses and protrusion, and one of ordinary skill in the art before the effective date of filing the application would have had a reasonable expectation of success in modifying the Aki device in view of the Yamada device, since they are from the same field of endeavor, and Yamada created a successfully operated device. It would have been obvious for one of ordinary skill in the art before the effective date of filing the application to modify the Aki device by creating the fine recesses of Aki to be irregularly aligned when it is desirable having an appearance of the pad surface that can be created by irregularly aligned recesses (Yamada, paragraph 0041). In re Claim 15, Aki teaches the semiconductor device of Claim 1 as cited above, wherein the uneven part is presented by fine recesses and protrusions (as Fig. 11 of Aki shows). wherein fine recesses are regularly aligned in the uneven part. Aki does not teach that fine recesses are regularly aligned in the uneven part. Yamada teaches (paragraph 0041) that recesses and protrusion can be regularly aligned. It would have been obvious for one of ordinary skill in the art before the effective date of filing the application to modify the Aki device by creating the fine recesses of Aki to be regularly aligned when it is desirable having an appearance of the pad surface that can be created by regularly aligned recesses (Yamada, paragraph 0041). Conclusion Any inquiry concerning this communication should be directed to GALINA G YUSHINA whose telephone number is 571-270-7440. The Examiner can normally be reached between 8 AM - 7 PM Pacific Time (Flexible). Examiner interviews are available. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s Supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300; a fax phone number of Galina Yushina is 571-270-8440. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center - for more information about Patent Center and visit https://www.uspto.gov/patents/docx - for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GALINA G YUSHINA/Primary Patent Examiner, Art Unit 2811, TC 2800, United States Patent and Trademark Office E-mail: galina.yushina@USPTO.gov Phone: 571-270-7440 Date: 07/29/26
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Prosecution Timeline

Jul 18, 2024
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
96%
With Interview (+16.4%)
2y 4m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1107 resolved cases by this examiner. Grant probability derived from career allowance rate.

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