DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending and examined.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 6-7, 9, 14-15, 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 7,656,734 to Thorp et al. (hereafter Thorp).
Regarding independent claim 1, Thorp teaches a memory device, comprising:
a heater device located on or in at least one die (i.e. heating elements physically distributed on the memory IC, see 2:38-39), the heater device comprising:
a switch element electrically connected to a power supply connection and the at least one die (FIG. 1: one of the switches 120A, 120B … 120N coupled to supply voltage 104); and
a resistive element electrically connected to the switch element and a ground connection, the resistive element configured to generate heat at the memory device (FIG. 1: one of resistive heating elements 122A, 122B … 122N coupled to ground 112),
wherein the switch element is configured to switch between electrically connecting the at least one die to the power supply connection and connecting the resistive element to the power supply connection (FIG. 1: when transistors 120A, 120B … 120N are turned on, resistive heating elements 122A, 122B … 122N are connected to supply voltage 104).
Regarding dependent claim 6, Thorp teaches wherein the heater device is separate and discrete from the at least one die in a redistribution layer (RDL) or an interposer operably coupled to the at least one die (because heating elements physically distributed on the memory IC, see 2:38-39).
Regarding dependent claim 7, Thorp teaches wherein the memory device comprises one or more of DRAM, NAND, or NOR die (see FIG. 3A and 4 of US 7,233,024 to Scheuerlein et al., which is incorporated by reference in Thorp).
Regarding dependent claim 9, Thorp implicitly teaches wherein the switch element comprises switching circuitry configured to be operated via one or more of an MRS command or a chip select command (FIG. 5: it is seen that MRS command or chip select command is required for the memory exiting a low power mode in step 506, and a thermal regulation circuit enabling in step 502).
Regarding dependent claims 14-15 and 17, see rejection applied to claims 6-7 and 9 above.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-4, 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Thorp.
Regarding dependent claim 2, Thorp teaches wherein the resistive element comprises: at least one first resistor having a first resistance (FIG. 1: resistive heating elements 122A); and at least one second resistor having a second resistance (FIG. 1: resistive heating elements 122B)
Thorp does not explicitly teach the second resistance is different than the first resistance. However, Thorp describes resistive heating elements may vary in number, heat up different parts of the IC, distributed on the same and/or different planes of memory arrays, controlled by different temperature sensors (see 3:57-4:11). This may suggest availability of design choice, and heating elements with different resistance values is considered design choice. For example, heating element of smaller resistance value may be needed to heat up a smaller part of the IC, and heating element of larger resistance value for larger part of the IC.
Regarding dependent claim 3, Thorp teaches wherein the heater device further comprises an additional switch element electrically connected to the switch element and the resistive element, the additional switch element configured to switch between electrically connecting the at least one first resistor to the switch element and connecting the at least one second resistor to the switch element (FIG. 1: transistors 120A and 120B corresponding to heating resistive elements 122A and 122B, respectively).
Regarding dependent claim 4, Thorp does not explicitly teach wherein the at least one first resistor has a resistance of about 4.0 ohms and the at least one second resistor has a resistance of about 24 ohms. However, as mentioned in rejection of claim 2, choosing the smaller heating element of 4 ohms, and larger heating element of 24 ohms maybe a design choice.
Regarding dependent claims 11-12, see rejection applied to claims 2-3 above.
Claims 5, 10, 13 are rejected under 35 U.S.C. 103 as being unpatentable over Thorp in view of US 9,761,290 to Kankani et al. (hereafter Kankani).
Thorp teaches, as applied in prior rejection of claim 1, all claimed subject matter except further limitations set forth in the following claim(s).
Regarding dependent claim 5, Kankani teaches a chip package (see FIG. 6C) comprising heating elements wherein the heater device is located on or in an active surface of the at least one die peripheral to a memory array of the at least one die (FIG. 6B: heating resistor 610 are embedded within substrate 620).
Since Thorp and Kankani are both from the same field of endeavor, the purpose disclosed by Kankani would have been recognized in the pertinent art of Thorp.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to embed the heating elements within the substrate as taught by Kankani to the memory device of Thorp because it is a known design.
Regarding independent claim 10, Thorp teaches a memory device, comprising:
at least one die (memory IC, see 2:38-39); and
a heater device operably coupled to the at least one die (i.e. heating elements physically distributed on the memory IC, see 2:38-39), the heater device comprising:
a resistive element electrically connected to a ground connection FIG. 1: one of resistive heating elements 122A, 122B … 122N coupled to ground 112), and
a switch element electrically connected to a power supply connection FIG. 1: one of the switches 120A, 120B … 120N coupled to supply voltage 104),
wherein the switch element is configured to switch between electrically connecting the at least one die to the power supply connection FIG. 1: when transistors 120A, 120B … 120N are turned on/off, resistive heating elements 122A, 122B … 122N are connected/disconnected to/from supply voltage 104).
Thorp does not teach the strikethrough limitations.
Kankani teaches a memory module comprising multiple memory devices (see FIG. 4A) operably coupled to a substrate (FIG. 6C: die 606 coupled to substrate 620). Heating elements are located within the substrate (FIG. 6B: heating resistor 610 are embedded within substrate 620, also see FIG. 5B). It is obvious that there must be connections to ground and power supply of the substrate in order to current a current flow through heating resistors.
Since Thorp and Kankani are both from the same field of endeavor, the purpose disclosed by Kankani would have been recognized in the pertinent art of Thorp.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to embed the heating elements within the substrate as taught by Kankani to the memory device of Thorp because it is a known design.
Regarding dependent claim 13, see rejection applied to claim 5 above.
Claims 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Thorp in view of US 6,060,895 to Soh et al. (hereafter Soh).
Regarding independent claim 18, Thorp teaches a semiconductor structure, comprising:
FIG. 1: circuit 100) comprising:
a switch element electrically connected to a power supply connection ((FIG. 1: one of the switches 120A, 120B … 120N coupled to supply voltage 104))
a resistive element electrically connected to the switch element and a ground connection (FIG. 1: one of resistive heating elements 122A, 122B … 122N coupled to ground 112), the resistive element comprising:
at least one first resistor having a first resistance (FIG. 1: resistive heating elements 122A); and
at least one second resistor having a second, FIG. 1: resistive heating elements 122B),
wherein the switch element is configured to switch between electrically connecting the at least one die to the power supply connection and connecting the resistive element to the power supply connection (FIG. 1: when transistors 120A, 120B … 120N are turned on, resistive heating elements 122A, 122B … 122N are connected to supply voltage 104).
Thorp does not explicitly teach the second resistance is different than the first resistance. However, Thorp describes resistive heating elements may vary in number, heat up different parts of the IC, distributed on the same and/or different planes of memory arrays, controlled by different temperature sensors (see 3:57-4:11). This may suggest availability of design choice, and heating elements with different resistance values is considered design choice. For example, heating element of smaller resistance value may be needed to heat up a smaller part of the IC, and heating element of larger resistance value for larger part of the IC.
Thorp does not at least one wafer and a thermal and heat testing device located on or in the at least one wafer.
Soh teaches at least one wafer and a thermal and heat testing device located on or in the at least one wafer (see 4:12-5:16).
Since Thorp and Soh are both from the same field of endeavor, the purpose disclosed by Soh would have been recognized in the pertinent art of Thorp.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to implement the semiconductor structure of Thorp at wafer level of Soh to increasing reliability during manufacturing.
Regarding dependent claim 19, Thorp teaches wherein the heater device further comprises an additional switch element electrically connected to the switch element and the resistive element, the additional switch element configured to switch between electrically connecting the at least one first resistor to the switch element and connecting the at least one second resistor to the switch element (FIG. 1: transistors 120A and 120B corresponding to heating resistive elements 122A and 122B, respectively).
Allowable Subject Matter
Claims 8, 16 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
With respect to dependent claim 8: wherein the switch element comprises a fuse and a fuse device configured to selectively blow the fuse.
With respect to dependent claim 16: wherein the switch element comprises a fuse and a fuse device configured to selectively open the fuse.
With respect to dependent claim 20: wherein the at least one first resistor emulates an active power mode of a system in which the semiconductor structure is utilized, and wherein the at least one second resistor emulates a standby mode of the system.
Conclusion
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January 27, 2026
/VANTHU T NGUYEN/Primary Examiner, Art Unit 2824
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