Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 4, 5, 11 and 13-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsai (20160087022).
Regarding claim 1, Tsai teaches a display device comprising:
a flexible substrate (fig. 1: 24) comprising
a display area (area having 22, as seen in fig. 8) and a non-display area (as seen in fig. 8, area directly abuts 22) surrounding the display area (area, as seen in fig. 8, wherein 22 resides);
a plurality of pixels (fig. 8: 22) arranged in the display area,
each of the plurality of pixels including a first transistor (fig. 4: 58), a second transistor (fig. 4: 60), and a light-emitting stack (please see OLED in fig. 4) including an emission layer to emit light (fig. 4: 47), the first transistor including a first semiconductor layer (fig. 4: 62), a first gate electrode (fig. 4: 66), a first source electrode (fig. 4: 74), and a first drain electrode (fig. 4: 76), and the second transistor including a second semiconductor layer (fig. 4: 112), a second gate electrode (fig. 4: 110), a second source electrode (fig. 4: 116), and a second drain electrode (fig. 4: 114);
first insulation layers (fig. 4: 106) disposed on the flexible substrate, the second semiconductor layer disposed on the first insulation layers (please see fig. 4); and
a second insulation layer (fig. 4: 108) disposed on the first insulation layers, the second insulation layer covering the second semiconductor layer, the second source electrode, and the second drain electrode (please see fig. 4),
a first planarization layer (fig. 4: 50) disposed over the second insulation layer and covering the first transistor and the second transistor;
a pixel connection electrode (fig. 4: 44) on the first planarization layer; and
a second planarization layer (fig. 4: 46; please note that a PHOSITA would be aware that pixel banks are CMP’d to smooth and level) on the first planarization layer and covering the pixel connection electrode (please see fig. 4);
wherein the first planarization layer, second planarization layer, and a signal link (fig. 8: 202; data lines and signal lines extend into the designated NDA) extend into a bending portion in the non-display area (see bending portion in fig. 8),
wherein the signal link extended into the bending portion includes (please see fig. 9) at least a first section (please see section of 202 atop L1 + L2 + L3, as see in fig. 9) being spaced from the flexible substrate by a first distance (distance between 202 and 24 is L1 + L2 + L3), a second section (please see section of 202 atop L1 + L2, as see in fig. 9) being spaced from the flexible substrate by a second distance smaller than the first distance (distance between 202 and 24 is L1 + L2), and a third section (please see section of 202 atop L1, as see in fig. 9) between the first section and the second section spaced from the flexible substrate by a third distance smaller than the first distance and greater than the second distance (distance between 202 and 24 is L1).
Regarding claim 2, Tsai teaches a display device of claim 1, wherein at least a part of the third section of the signal link faces side walls of the first insulation layers and the second insulation layer, in the bending portion (please see fig. 9 and 11).
Regarding claim 4, Tsai teaches a display device of claim 1, wherein a lower surface of the first planarization layer and an upper surface of the flexible substrate contact other, in the bending portion (please see fig. 9 and 11).
Regarding claim 5, Tsai teaches a display device of claim 1, wherein an upper surface of the first planarization layer and a lower surface of the second planarization layer contact each other, in the bending portion (please see fig. 11).
Regarding claim 11, Tsai teaches a display device of claim 1, wherein first side walls of the first insulation layers and a second side wall of the second insulation layer form a step, and a first depth of the first insulation layers is greater than a second depth of the second insulation layer (please see fig. 11 which shows 106 and 108 having sidewalls that form steps and varying depths).
Regarding claim 13, Tsai teaches a display device of claim 1, wherein the first insulating layers and the second insulating layer comprise silicon oxide or silicon nitride (par. 34).
Regarding claim 14, Tsai teaches a display device of claim 1, wherein the first semiconductor layer includes a polycrystalline semiconductor layer (par. 32).
Regarding claim 15, Tsai teaches a display device of claim 1, wherein the second semiconductor layer includes an oxide semiconductor layer (par. 35).
Regarding claim 16, Tsai teaches a display device of claim 1, wherein the pixel connection electrode connects to the second source electrode through a first contact hole in the first planarization layer and connects to an anode electrode of a light emitting device through a second contact hole in the second planarization layer in the display area (please see fig. 10 and 11).
Regarding claim 17, Tsai teaches a display device of claim 1, wherein the signal link connects a signal line disposed in the display area and a signal pad disposed in the non-display area (see signal lines in fig. 1 connecting to pads).
Regarding claim 18, Tsai teaches a display device according to claim 1, further comprising a cathode (42) disposed on the light-emitting stack, the cathode being electrically connected with a low potential supply line (see fig. 2 and par. 31).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai as applied to claim 1 above, and further in view of Kim (20160218305).
Regarding claim 9, Tsai teaches a display device of claim 1.
Tsai fails to teach:
a color filter disposed on the light-emitting stack, which overlaps with the first transistor and the second transistor
Kim teaches a bending OLED device with a color filter placed atop the pixels, pixels which includes the transistors. Kim goes on to teach that the addition of color filters allows for the implementing of colored images (Kim, par. 76 and 77). Such a motivation would lead a PHOSITA to add these teachings of Kim to primary reference Tsai.
Thus, it would have been obvious to a PHOSITA, at the time of filing, to utilize aforementioned teachings of the prior art(s) in the primary prior art(s) due to aforementioned reason(s).
Allowable Subject Matter
Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 7 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 8 is objected to based on its dependency on claim 7.
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 19 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CALEB E HENRY/Primary Examiner, Art Unit 2818
Prosecution Insights