DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Preliminary amendment filed 27 September 2024 is acknowledged. Claim 1 has been amended. Claims 19 and 20 have been canceled. Claims 21 and 22 have been added. Claims 1-18, 21, and 22 are pending.
Information Disclosure Statement
Information disclosure statements filed 22 July 2024, 13 March 2025, and 18 June 2025 have been fully considered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 6-11 are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka (US Patent Application Publication 2005/0282306, hereinafter Yamanaka ‘306) in view of Eikyu et al. (US Patent Application Publication 2015/0130009, hereinafter Eikyu ‘009), both of record.
With respect to claim 1, Yamanaka ‘306 teaches (FIG. 5) an integrated chip substantially as claimed, comprising:
a sensor semiconductor layer (12) having a first doping type (p-type) ([0095]);
a photodetector (12a) along a frontside of the sensor semiconductor layer (12) ([0140]);
a backside semiconductor layer (22) along a backside of the sensor semiconductor layer (12), opposite the frontside and having a first doping type ([0095]); and
a diffusion barrier structure (23) between the sensor semiconductor layer (12) and the backside semiconductor layer (22) ([0100]).
Thus, Yamanaka ‘306 is shown to teach all the features of the claim with the exception of:
wherein the sensor semiconductor layer is doped with a first dopant;
wherein the backside semiconductor layer is doped with a second dopant; and
wherein the diffusion barrier structure is doped with a third dopant different from the first dopant and the second dopant.
However, Yamanaka ‘306 teaches boron as an art-recognized p-type dopant ([0083-0085, 0301]). Both of the sensor semiconductor layer (12) and the backside semiconductor layer (22) are doped p-type. Therefore, it would have been obvious to one of ordinary skill in the art to have formed the p-type sensor semiconductor layer (12) and the p-type backside semiconductor layer (22) of Yamanaka ‘306 with a first dopant and with a second dopant, respectively, of boron to rely on a well-known and art-recognized p-type dopant material.
Further, Eikyu ‘009 teaches (FIG. 4) an imaging device comprising a diffusion barrier structure (PE1) comprising a semiconductor doped with oxygen to enhance the function of said diffusion barrier structure as a potential barrier ([0159]). The diffusion barrier structure (23) of Yamanaka ‘306 is an oxidized silicon dioxide film ([0101]). A silicon dioxide film may be characterized as a semiconductor film (i.e. silicon) heavily doped with oxygen (i.e. oxide). One of ordinary skill in the art could substitute the oxygen-doped semiconductor diffusion barrier structure (PE1) of Eikyu ‘009 with the silicon dioxide diffusion barrier structure (23) of Yamanaka ‘306 with a reasonable expectation of success.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the sensor semiconductor layer and the backside semiconductor layer of Yamanaka ‘306 doped with a first dopant and doped with a second dopant respectively as taught by Yamanaka ‘306 to rely on a well-known and art-recognized p-type dopant material; and to have formed the diffusion barrier structure of Yamanaka ‘306 doped with a third dopant different from the first dopant and the second dopant as taught by Eikyu ‘009 to enhance the function of said diffusion barrier layer as a potential barrier.
With respect to claim 6, Yamanaka ‘306 teaches wherein the diffusion barrier structure (23) comprises a first diffusion barrier layer (23a and 23b) that is arranged between the sensor semiconductor layer (12) and the backside semiconductor layer (22), and a spacer layer (23c) that is arranged between the first diffusion barrier layer and the sensor semiconductor layer ([0122]).
With respect to claim 7, Yamanaka ‘306 teaches wherein the diffusion barrier structure (23) comprises a first diffusion barrier layer (23b and 23c) that is arranged between the sensor semiconductor layer (12) and the backside semiconductor layer (22), and a spacer layer (23a) that is arranged between the first diffusion barrier layer and the backside semiconductor layer.
With respect to claims 8 and 9, Yamanaka ‘306 teaches (see FIGs. 4B and 23A) wherein the diffusion barrier structure comprises a first diffusion barrier layer (23c) that is arranged between the sensor semiconductor layer (12) and the backside semiconductor layer (22a), a second diffusion barrier layer (23a) between the first diffusion barrier layer and the backside semiconductor layer, and a first spacer layer (23b) between the first diffusion barrier layer and the second diffusion barrier layer; and wherein the diffusion barrier structure further comprises a second spacer layer (22b) between the second diffusion barrier layer and the backside semiconductor layer ([0122, 0301]).
With respect to claims 8 and 10, Yamanaka ‘306 teaches wherein the diffusion barrier structure comprises a first diffusion barrier layer (23b) that is arranged between the sensor semiconductor layer (12) and the backside semiconductor layer (22a), a second diffusion barrier layer (22b) between the first diffusion barrier layer and the backside semiconductor layer, and a first spacer layer (23a) between the first diffusion barrier layer and the second diffusion barrier layer; and wherein the diffusion barrier structure further comprises a second spacer layer (23c) between the first diffusion barrier layer and the sensor semiconductor layer ([0122, 0301]).
With respect to claim 11, Yamanaka ‘306 teaches wherein the first diffusion barrier layer (whether 23b or 23c) has a first thickness and the second diffusion barrier layer (whether 23a or 22b respectively) has a second thickness different from the first thickness ([0197, 0301]).
Claims 2-5 are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka ‘306 and Eikyu ‘009 as applied to claim 1 above, and further in view of Uya (US Patent Application Publication 2008/0217724, hereinafter Uya ‘724).
With respect to claim 2, Yamanaka ‘306 and Eikyu ‘009 teach the device as described in claim 1 above, with primary reference Yamanaka ‘306 teaching the additional limitation wherein the diffusion barrier structure (23) comprises a first diffusion barrier layer (any of 23a-23c) that is arranged between the sensor semiconductor layer (12) and the backside semiconductor layer (22), wherein the sensor semiconductor layer has a first dopant concentration, and wherein the backside semiconductor layer has a second dopant concentration ([0095, 0100]).
Thus, Yamanaka ‘306 is shown to teach all the features of the claim with the exception of:
wherein the second dopant concentration is greater than the first dopant concentration; and
wherein the first diffusion barrier layer comprises a semiconductor doped with the third dopant.
However, Uya ‘724 teaches (FIG. 2) a backside second semiconductor layer (25) having a second dopant concentration (p++) greater than a first dopant concentration (p+) of a sensor first semiconductor layer (38) ([0085, 0089]) to suppress noise ([0117]).
Further, Eikyu ‘009 teaches (FIG. 4) an imaging device comprising a diffusion barrier structure (PE1) comprising a semiconductor doped with oxygen to enhance the function of said diffusion barrier structure as a potential barrier ([0159]). The diffusion barrier structure (23) of Yamanaka ‘306 is an oxidized silicon dioxide film ([0101]). A silicon dioxide film may be characterized as a semiconductor film (i.e. silicon) heavily doped with oxygen (i.e. oxide). One of ordinary skill in the art could substitute the oxygen-doped semiconductor diffusion barrier structure (PE1) of Eikyu ‘009 with the silicon dioxide diffusion barrier structure (23) of Yamanaka ‘306 with a reasonable expectation of success.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the second dopant concentration of Yamanaka ‘306 and Eikyu ‘009 greater than the first dopant concentration as taught by Uya ‘724 to suppress noise; and to have formed the first diffusion barrier layer of Yamanaka ‘306 and Eikyu ‘009 comprising a semiconductor doped with the third dopant as taught by Eikyu ‘009 to enhance the function of said diffusion barrier layer as a potential barrier.
With respect to claim 3, Yamanaka ‘306 teaches wherein the second dopant (boron) is the same as the first dopant (boron) ([0083-0085, 0301]).
With respect to claim 4, Yamanaka ‘306 teaches (FIG. 22B) wherein the backside semiconductor layer (22) is further doped with a fourth dopant (22b; phosphorus) different from the first dopant (boron) and the second dopant (boron) ([0301]).
With respect to claim 5, Yamanaka ‘306 teaches wherein the fourth dopant (phosphorus) is different from the third dopant (oxygen) ([0301]).
Claims 12, 13, 15-18, 21, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka ‘306 in view of Uya ‘724 and Eikyu ‘009.
With respect to claim 12, Yamanaka ‘306 teaches (FIG. 5) an integrated chip substantially as claimed, comprising:
a sensor semiconductor layer (12) having a first doping type (p-type), wherein the sensor semiconductor layer has a first dopant concentration ([0095]);
a photodetector (12a) within the sensor semiconductor layer (12) and arranged along a frontside of the sensor semiconductor layer ([0140]);
a backside semiconductor layer (22) having the first doping type (p-type) over the sensor semiconductor layer (12) and along a backside of the sensor semiconductor layer, opposite the frontside, wherein the backside semiconductor layer has a second dopant concentration ([0095]); and
a first diffusion barrier layer (23) between the sensor semiconductor layer (12) and the backside semiconductor layer (22) ([0100]).
Thus, Yamanaka ‘306 is shown to teach all the features of the claim with the exception of:
wherein the sensor semiconductor layer is doped with a first dopant;
wherein the backside semiconductor layer is doped with a second dopant;
wherein the second dopant concentration is greater than the first dopant concentration; and
wherein the first diffusion barrier layer comprises a semiconductor doped with a third dopant different from the first dopant and the second dopant.
However, Yamanaka ‘306 teaches boron as an art-recognized p-type dopant ([0083-0085, 0301]). Both of the sensor semiconductor layer (12) and the backside semiconductor layer (22) are doped p-type. Therefore, it would have been obvious to one of ordinary skill in the art to have formed the p-type sensor semiconductor layer (12) and the p-type backside semiconductor layer (22) of Yamanaka ‘306 with a first dopant and with a second dopant, respectively, of boron to rely on a well-known and art-recognized p-type dopant material.
However, Uya ‘724 teaches (FIG. 2) a backside second semiconductor layer (25) having a second dopant concentration (p++) greater than a first dopant concentration (p+) of a sensor first semiconductor layer (38) ([0085, 0089]) to suppress noise ([0117]).
Still further, Eikyu ‘009 teaches (FIG. 4) an imaging device comprising a first diffusion barrier layer (PE1) comprising a semiconductor doped with oxygen to enhance the function of said diffusion barrier layer as a potential barrier ([0159]). The first diffusion barrier layer (23) of Yamanaka ‘306 is an oxidized silicon dioxide film ([0101]). A silicon dioxide film may be characterized as a semiconductor film (i.e. silicon) heavily doped with oxygen (i.e. oxide). One of ordinary skill in the art could substitute the oxygen-doped semiconductor first diffusion barrier layer (PE1) of Eikyu ‘009 with the silicon dioxide first diffusion barrier layer (23) of Yamanaka ‘306 with a reasonable expectation of success.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the sensor semiconductor layer and the backside semiconductor layer of Yamanaka ‘306 doped with a first dopant and doped with a second dopant respectively as taught by Yamanaka ‘306 to rely on a well-known and art-recognized p-type dopant material; to have formed the second dopant concentration of Yamanaka ‘306 greater than the first dopant concentration as taught by Uya ‘724 to suppress noise; and to have formed the first diffusion barrier layer of Yamanaka ‘306 comprising a semiconductor doped with a third dopant different from the first dopant and the second dopant as taught by Eikyu ‘009 to enhance the function of said diffusion barrier layer as a potential barrier.
With respect to claim 13, Yamanaka ‘306, Uya ‘724, and Eikyu ‘009 teach the device as described in claim 12 above, with primary reference Yamanaka ‘306 teaching the additional limitation wherein the sensor semiconductor layer (12) comprises a boron doped semiconductor, and wherein the backside semiconductor layer (22) comprises a boron doped semiconductor ([0083-0085, 0301]).
Thus, Yamanaka ‘306 is shown to teach all the features of the claim with the exception of wherein a boron concentration of the sensor semiconductor layer is less than a boron concentration of the backside semiconductor layer, and wherein the first diffusion barrier layer comprises an oxygen doped semiconductor layer or a carbon doped semiconductor layer.
However, Uya ‘724 teaches (FIG. 2) a backside second semiconductor layer (25) having a second dopant concentration (p++) greater than a first dopant concentration (p+) of a sensor first semiconductor layer (38) ([0085, 0089]) to suppress noise ([0117]).
Still further, Eikyu ‘009 teaches (FIG. 4) an imaging device comprising a first diffusion barrier layer (PE1) comprising a semiconductor doped with oxygen to enhance the function of said diffusion barrier layer as a potential barrier ([0159]). The first diffusion barrier layer (23) of Yamanaka ‘306 is an oxidized silicon dioxide film ([0101]). A silicon dioxide film may be characterized as a semiconductor film (i.e. silicon) heavily doped with oxygen (i.e. oxide). One of ordinary skill in the art could substitute the oxygen-doped semiconductor first diffusion barrier layer (PE1) of Eikyu ‘009 with the silicon dioxide first diffusion barrier layer (23) of Yamanaka ‘306 with a reasonable expectation of success.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed a boron concentration of the sensor semiconductor layer of Yamanaka ‘306, Uya ‘724, and Eikyu ‘009 less than a boron concentration of the backside semiconductor layer as taught by Uya ‘724 to suppress noise; and to have formed the first diffusion barrier layer of Yamanaka ‘306, Uya ‘724, and Eikyu ‘009 comprising an oxygen doped semiconductor layer or a carbon doped semiconductor layer as taught by Eikyu ‘009 to enhance the function of said diffusion barrier layer as a potential barrier.
With respect to claim 15, Yamanaka ‘306, Uya ‘724, and Eikyu ‘009 teach (see FIGs. 4B and 23A) the device as described in claim 12 above, with primary reference Yamanaka ‘306 teaching the additional limitation further comprising: a spacer layer (23b) between the first diffusion barrier layer (23a) and the sensor semiconductor layer (12) or between the first diffusion barrier layer (23c) and the backside semiconductor layer (22) ([0122, 0301]).
Thus, Yamanaka ‘306 is shown to teach all the features of the claim with the exception of wherein the spacer layer comprises a doped semiconductor doped with the first dopant, the second dopant, or a fourth dopant different from the first dopant and the second dopant.
However, Eikyu ‘009 teaches (FIG. 4) an imaging device comprising a diffusion barrier structure (PE1) comprising a semiconductor doped with oxygen to enhance the function of said diffusion barrier layer as a potential barrier ([0159]). The diffusion barrier structure (23) of Yamanaka ‘306 is an oxidized silicon dioxide film ([0101]). A silicon dioxide film may be characterized as a semiconductor film (i.e. silicon) heavily doped with oxygen (i.e. oxide). One of ordinary skill in the art could substitute the oxygen-doped semiconductor diffusion barrier structure (PE1) of Eikyu ‘009 with the silicon dioxide diffusion barrier structure (23) including the spacer layer (23b) of Yamanaka ‘306 with a reasonable expectation of success.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the spacer layer of Yamanaka ‘306, Uya ‘724, and Eikyu ‘009 comprising a doped semiconductor doped with the first dopant, the second dopant, or a fourth dopant different from the first dopant and the second dopant as taught by Eikyu ‘009 to enhance the function of said diffusion barrier layer as a potential barrier.
With respect to claims 16-18, Yamanaka ‘306, Uya ‘724, and Eikyu ‘009 teach (see FIGs. 4B and 23A) the device as described in claim 12 above, with primary reference Yamanaka ‘306 teaching the additional limitations further comprising: a second diffusion barrier layer (22b) between the first diffusion barrier layer (23b) and the backside semiconductor layer (22a); further comprising: a first spacer layer (23a) between the first diffusion barrier layer and the second diffusion barrier layer; and further comprising: a second spacer layer (23c) between the first diffusion barrier layer and the sensor semiconductor layer (12) or between the second diffusion barrier layer and the backside semiconductor layer ([0122, 0301]).
Thus, Yamanaka ‘306 is shown to teach all the features of the claim with the exception of wherein the second diffusion barrier layer comprises a semiconductor doped with the third dopant; wherein the first spacer layer comprises a semiconductor doped with the first dopant, the second dopant, or a fourth dopant different from the first dopant and the second dopant; and wherein the second spacer layer comprises a semiconductor doped with the first dopant, the second dopant, or the fourth dopant.
However, Eikyu ‘009 teaches (FIG. 4) an imaging device comprising a diffusion barrier structure (PE1) comprising a semiconductor doped with oxygen to enhance the function of said diffusion barrier layer as a potential barrier ([0159]). The diffusion barrier structure (23) of Yamanaka ‘306 is an oxidized silicon dioxide film ([0101]). A silicon dioxide film may be characterized as a semiconductor film (i.e. silicon) heavily doped with oxygen (i.e. oxide). One of ordinary skill in the art could substitute the oxygen-doped semiconductor diffusion barrier structure (PE1) of Eikyu ‘009 with the silicon dioxide diffusion barrier structure (23) including the second diffusion barrier layer (22b), the first spacer layer (23a), and the second spacer layer (23c) of Yamanaka ‘306 with a reasonable expectation of success.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the second diffusion barrier layer, the first spacer layer, and the second spacer layer of Yamanaka ‘306, Uya ‘724, and Eikyu ‘009 comprising a semiconductor doped with the third dopant; a semiconductor doped with the first dopant, the second dopant, or a fourth dopant different from the first dopant and the second dopant; and a semiconductor doped with the first dopant, the second dopant, or the fourth dopant respectively as taught by Eikyu ‘009 to enhance the function of said diffusion barrier layer as a potential barrier.
With respect to claim 21, Yamanaka ‘306 teaches (FIGs. 5 and 22B) an integrated chip substantially as claimed, comprising:
a first semiconductor layer (12) having a first doping type (p-type), having a first dopant concentration ([0095]);
a first semiconductor region (12a) in the first semiconductor layer (12), the first semiconductor region having a second doping type (n-type) different than the first doping type (p-type) ([0140]); and
a second semiconductor layer (22) spaced over the first semiconductor layer (12) and the first semiconductor region (12a), the second semiconductor layer having the first doping type (p-type), and having a second dopant concentration ([0095]).
Thus, Yamanaka ‘306 is shown to teach all the features of the claim with the exception of:
wherein the first semiconductor layer is doped with a first dopant;
wherein the second semiconductor layer is doped with a second dopant;
wherein the second dopant concentration is greater than the first dopant concentration; and
a third semiconductor layer separating the first semiconductor layer from the second semiconductor layer, the third semiconductor layer doped with a second dopant different than the first dopant.
However, Yamanaka ‘306 teaches boron as an art-recognized p-type dopant ([0083-0085, 0301]). Both of the first semiconductor layer (12) and the second semiconductor layer (22) are doped p-type. Therefore, it would have been obvious to one of ordinary skill in the art to have formed the p-type first semiconductor layer (12) and the p-type second semiconductor layer (22) of Yamanaka ‘306 with a first dopant and with a second dopant, respectively, of boron to rely on a well-known and art-recognized p-type dopant material.
Further, Uya ‘724 teaches (FIG. 2) a backside second semiconductor layer (25) having a second dopant concentration (p++) greater than a first dopant concentration (p+) of a sensor first semiconductor layer (38) ([0085, 0089]) to suppress noise ([0117]).
Still further, Eikyu ‘009 teaches (FIG. 4) an imaging device comprising a diffusion barrier structure (PE1) comprising a third semiconductor doped with oxygen to enhance the function of said diffusion barrier structure as a potential barrier ([0159]). The diffusion barrier structure (23) of Yamanaka ‘306 is an oxidized silicon dioxide film ([0101]). A silicon dioxide film may be characterized as a semiconductor film (i.e. silicon) heavily doped with oxygen (i.e. oxide). One of ordinary skill in the art could substitute the oxygen-doped semiconductor diffusion barrier structure (PE1) of Eikyu ‘009 with the silicon dioxide diffusion barrier structure (23) of Yamanaka ‘306 with a reasonable expectation of success.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the first semiconductor layer and the second semiconductor layer of Yamanaka ‘306 doped with a first dopant and doped with a second dopant respectively as taught by Yamanaka ‘306 to rely on a well-known and art-recognized p-type dopant material; to have formed the second dopant concentration of Yamanaka ‘306 greater than the first dopant concentration as taught by Uya ‘724 to suppress noise; and to have formed the integrated chip of Yamanaka ‘306 further comprising a third semiconductor layer separating the first semiconductor layer from the second semiconductor layer, the third semiconductor layer doped with a second dopant different than the first dopant as taught by Eikyu ‘009 to enhance a diffusion barrier layer as a potential barrier.
With respect to claim 22, Yamanaka ‘306 teaches (FIG. 22B) wherein the second semiconductor layer (22) is further doped with a third dopant (22b; phosphorus) different than the first dopant (boron) ([0301]).
Allowable Subject Matter
Claim 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record fails to teach the integrated chip of claim 14 in the combination of limitations as claimed, noting particularly the limitation, “wherein the backside semiconductor layer further comprises carbon doping.” Yamanaka ‘306 in view of Uya ‘724 and Eikyu ‘009 represent the closest prior art of record as set forth in the 35 U.S.C. 103 rejection of claims 12 and 13 above. However, both of these references are silent to wherein the backside semiconductor layer further comprises carbon. Wu et al. (US Patent Application Publication 2019/0148570) of record teaches backside semiconductor layers (218 and 220) comprising carbon. However, neither of these layers also comprise the first dopant (boron). None of the other prior art references made of record cure this deficiency in combination with the other elements of the claim.
Conclusion
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/C.M.R./Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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