Prosecution Insights
Last updated: April 19, 2026
Application No. 18/781,521

DISPLAY DEVICE HAVING BENDABLE AREA

Non-Final OA §DP
Filed
Jul 23, 2024
Examiner
DANG, HUNG Q
Art Unit
2841
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
68%
Grant Probability
Favorable
1-2
OA Rounds
3y 1m
To Grant
87%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allow Rate
1257 granted / 1841 resolved
At TC average
Strong +18% interview lift
Without
With
+18.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
95 currently pending
Career history
1936
Total Applications
across all art units

Statute-Specific Performance

§101
4.2%
-35.8% vs TC avg
§103
54.1%
+14.1% vs TC avg
§102
23.6%
-16.4% vs TC avg
§112
11.6%
-28.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1841 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This communication is in response to the claims dated 7/23/2024. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Current Application: 1. An electronic device comprising: a pen; and a display device that sense input of the pen, wherein the display device comprises: a display panel comprising a first area, a second area, and a bendable area between the first area and the second area, wherein the bendable area is bent so that the second area is disposed below the first area; a driving integrated circuit disposed below the second area; a window disposed on the first area; and a window protection layer disposed on the window; wherein, one side of the window protection layer and one side of the window are spaced apart from a first boundary between the first area and the bendable area in a horizontal direction, and a gap between the one side of the window protection layer and the first boundary is smaller than a gap between the one side of the window protection layer and the one side of the window. 2. The electronic device of claim 1, further comprising: a first panel protection layer disposed below the first area, an impact absorption layer disposed between the window and the first area; and an anti-reflection layer disposed between the impact absorption layer and the first area, wherein the one side of the window protection layer protrudes closer to the first boundary than the one side of the window in the horizontal direction, when viewed in plan, one side of the impact absorption layer overlaps with the one side of the window, and one side of the anti-reflection layer is further spaced apart from the first boundary than the one side of the impact absorption layer. 3. The electronic device of claim 2, further comprising: a first coating layer applied on a top surface of the window protection layer; and a second coating layer applied on a bottom surface of the impact absorption layer. 4. The electronic device of claim 2, further comprising: a first adhesion layer disposed between the window protection layer and the window; a second adhesion layer disposed between the window and the impact absorption layer; a third adhesion layer disposed between the impact absorption layer and the anti-reflection layer; and a fourth adhesion layer disposed between the anti-reflection layer and the first area. 5. The electronic device of claim 4, wherein, when viewed in plan, one side of the first adhesion layer overlaps with the one side of the window protection layer, one side of the second adhesion layer is disposed between the one side of the window and the one side of the anti-reflection layer, one side of the third adhesion layer is further spaced apart from the first boundary than the one side of the anti-reflection layer, and one side of the fourth adhesion layer overlaps with the one side of the anti-reflection layer. 6. The electronic device of claim 2, further comprising a protection layer spaced apart from the anti-reflection layer and disposed between the impact absorption layer and the first area and extending to the bendable area and a portion of the second area, which is adjacent to the bendable area. 7. The electronic device of claim 6, further comprising: a first step compensation layer disposed between the protection layer and the driving IC; and a second step compensation layer disposed below the first step compensation layer to extend below a portion of the protection layer, which is adjacent to the first step compensation layer, wherein the second step compensation layer is spaced apart from a second boundary between the bendable area and the second area. 8. The electronic device of claim 7, wherein the first step compensation layer has the same thickness as the protection layer in a direction perpendicular to a plane of the first area. 9. The electronic device of claim 7, wherein the sum of thicknesses of the first and second step compensation layers is the same as that of the driving IC in a direction perpendicular to a plane of the first area. 10. The electronic device of claim 7, further comprising: a first insulation tape disposed below the second step compensation layer to extend below the driving IC; a conductive layer disposed below the first insulation tape; and a second insulation tape disposed below the conductive layer. 11. The electronic device of claim 10, wherein, when viewed in plan, one side of the second step compensation layer, which is adjacent to the second boundary, one side of the first insulation tape, which is adjacent to the second boundary, and one side of the conductive layer, which is adjacent to the second boundary, are spaced apart from the second boundary to overlap with each other. 12. The electronic device of claim 11, wherein the second insulation tape does not overlap with a portion of the conductive layer, which is adjacent to the one side of the conductive layer. 13. The electronic device of claim 1, wherein, one side of the first panel protection layer protrudes closer to the first boundary than the one side of the window protection layer in the horizontal direction. 14. The electronic device of claim 13, further comprising a cover layer disposed between the first panel protection layer and the second area and spaced apart from the bendable area. 15. The electronic device of claim 14, wherein, when viewed in plan, one side of the cover layer is further spaced apart from the first boundary than the one side of the first panel protection layer. 16. The electronic device of claim 14, wherein, one side of the cover layer protrudes closer to the one side of window protection layer than the one side of the window in the horizontal direction. 17. The electronic device of claim 14, further comprising: a plate disposed between the cover layer and the second area; a spacer disposed between the plate and the second area; and a second panel protection layer disposed between the spacer and the second area. 18. The electronic device of claim 17, wherein, when viewed in plan, one side of the plate and one side of the spacer overlap with one side of the cover layer. 19. The electronic device of claim 17, wherein, when viewed in plan, one side of the second panel protection layer is disposed between the one side of the first panel protection layer and one side of the cover layer. 20. The electronic device of claim 17, further comprising a fifth adhesion layer disposed between the first area and the first panel protection layer, wherein the cover layer comprises: a barrier layer disposed below the first panel protection layer; a cushion layer disposed below the barrier layer; a sixth adhesion layer disposed between the first panel protection layer and the barrier layer; and a seventh adhesion layer disposed between the cushion layer and the plate, wherein one side of the fifth adhesion layer overlaps with the one side of the first panel protection layer, one side of the barrier layer, one side of the cushion layer, one side of the sixth adhesion layer, and one side of the seventh adhesion layer overlap with each other, and the cushion layer is disposed directly on a bottom surface of the barrier layer. U.S. patent 11,686,883: 1. A display device comprising: a display panel comprising a first area, a second area, and a bendable area between the first area and the second area, wherein the bendable area is bent so that the second area is disposed below the first area; a driving integrated circuit (IC) disposed below the second area; a window disposed on the first area; a window protection layer disposed on the window; and a first panel protection layer disposed below the first area, wherein, one side of the window protection layer and one side of the window are spaced apart from a first boundary between the first area and the bendable area in a horizontal direction, and the one side of the window protection layer protrudes closer to the first boundary than the one side of the window in the horizontal direction. 2. The display device of claim 1, further comprising: an impact absorption layer disposed between the window and the first area; and an anti-reflection layer disposed between the impact absorption layer and the first area, wherein, when viewed on the plane, one side of the impact absorption layer overlaps with the one side of the window, and one side of the anti-reflection layer is further spaced apart from the first boundary than the one side of the impact absorption layer. 3. The display device of claim 2, further comprising: a first coating layer applied on a top surface of the window protection layer; and a second coating layer applied on a bottom surface of the impact absorption layer. 4. The display device of claim 2, further comprising: a first adhesion layer disposed between the window protection layer and the window; a second adhesion layer disposed between the window and the impact absorption layer; a third adhesion layer disposed between the impact absorption layer and the anti-reflection layer; and a fourth adhesion layer disposed between the anti-reflection layer and the first area. 5. The display device of claim 4, wherein, when viewed on the plane, one side of the first adhesion layer overlaps with the one side of the window protection layer, one side of the second adhesion layer is disposed between the one side of the window and the one side of the anti-reflection layer, one side of the third adhesion layer is further spaced apart from the first boundary than the one side of the anti-reflection layer, and one side of the fourth adhesion layer overlaps with the one side of the anti-reflection layer. 6. The display device of claim 2, further comprising a protection layer spaced apart from the anti-reflection layer and disposed between the impact absorption layer and the first area and extending to the bendable area and a portion of the second area, which is adjacent to the bendable area. 7. The display device of claim 6, further comprising: a first step compensation layer disposed between the protection layer and the driving IC; and a second step compensation layer disposed below the first step compensation layer to extend below a portion of the protection layer, which is adjacent to the first step compensation layer, wherein the second step compensation layer is spaced apart from a second boundary between the bendable area and the second area. 8. The display device of claim 7, wherein the first step compensation layer has the same thickness as the protection layer in a direction perpendicular to a plane of the first area. 9. The display device of claim 7, wherein the sum of thicknesses of the first and second step compensation layers is the same as that of the driving IC in a direction perpendicular to a plane of the first area. 10. The display device of claim 7, further comprising: a first insulation tape disposed below the second step compensation layer to extend below the driving IC; a conductive layer disposed below the first insulation tape; and a second insulation tape disposed below the conductive layer. 11. The display device of claim 10, wherein, when viewed on the plane, one side of the second step compensation layer, which is adjacent to the second boundary, one side of the first insulation tape, which is adjacent to the second boundary, and one side of the conductive layer, which is adjacent to the second boundary, are spaced apart from the second boundary to overlap with each other. 13. The display device of claim 11, wherein the second insulation tape does not overlap with a portion of the conductive layer, which is adjacent to the one side of the conductive layer. 14. The display device of claim 1, wherein, one side of the first panel protection layer protrudes closer to the first boundary than the one side of the window protection layer in the horizontal direction. 15. The display device of claim 14, further comprising a cover layer disposed between the first panel protection layer and the second area and spaced apart from the bendable area. 16. The display device of claim 15, wherein, when viewed on the plane, one side of the cover layer is further spaced apart from the first boundary than the one side of the first panel protection layer. 18. The display device of claim 15, wherein, one side of the cover layer protrudes closer to the one side of window protection layer than the one side of the window in the horizontal direction. 20. The display device of claim 15, further comprising: a plate disposed between the cover layer and the second area; a spacer disposed between the plate and the second area; and a second panel protection layer disposed between the spacer and the second area. 21. The display device of claim 20, wherein, when viewed on the plane, one side of the plate and one side of the spacer overlap with one side of the cover layer. 24. The display device of claim 20, wherein, when viewed on the plane, one side of the second panel protection layer is disposed between the one side of the first panel protection layer and one side of the cover layer. 25. The display device of claim 20, further comprising a fifth adhesion layer disposed between the first area and the first panel protection layer, wherein the cover layer comprises: a barrier layer disposed below the first panel protection layer; a cushion layer disposed below the barrier layer; a sixth adhesion layer disposed between the first panel protection layer and the barrier layer; and a seventh adhesion layer disposed between the cushion layer and the plate, wherein one side of the fifth adhesion layer overlaps with the one side of the first panel protection layer, one side of the barrier layer, one side of the cushion layer, one side of the sixth adhesion layer, and one side of the seventh adhesion layer overlap with each other, and the cushion layer is disposed directly on a bottom surface of the barrier layer. Claims 1-20 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-11, 13-16, 18, 20-21, 24 and 25 of U.S. patent 11,686,883 in view of SHIN et al. U.S. Pub. 2016/0070306. Regarding claim 1, U.S. Patent 11,686,883 teaches an electronic device comprising all the claimed limitations (see above claim comparison table) of claim 1 of the current application except: a pen; and the display device that senses input of the pen. SHIN et al. teaches a similar electronic device, includes a pen (see par[0113]); and a display device (see par[0113]) that sense input of the pen. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to further provide the electronic device of claim 1 of U.S. patent 11,686,883 with a pen such that the display device would sense input of the pen, for inputting purposes. Regarding the claimed limitation of claim 1 of the current application: “a gap (see below annotated figure 10) between the one side of the window protection layer (WP; figure 10) and the first boundary (BP1; figure 10) is smaller than a gap (DT1; figure 10) between the one side (left side) of the window protection layer (WP; figure 10) and the one side of the window (WIN; figure 10)”. PNG media_image1.png 684 919 media_image1.png Greyscale Claim 1 of U.S. Patent 11,686,883 recites:”the one side (left side of WP; figure 10) of the window protection layer (WP; figure 10) protrudes closer (see above figure 10) to the first boundary (BP1; figure 10) than the one side (left side) of the window (WIN; figure 10) in the horizontal direction”, which is equivalent as “a gap (see below annotated figure 10) between the one side of the window protection layer (WP; figure 10) and the first boundary (BP1; figure 10) is smaller than a gap (DT1; figure 10) between the one side (left side) of the window protection layer (WP; figure 10) and the one side of the window (WIN; figure 10)” of claim 1 of the current application. Note: the “spaced apart” language in claim 1 of U.S. patent 11,686,883 is equivalent as “gap” in claim 1 of the current application. Regarding claim 2, claims 1-2 of U.S. Patent 11,686,883 teaches the limitations of claim 2 of the current application as shown in the above claim comparison chart. Regarding claims 3-11, claims 3-11 of U.S. Patent 11,686,883 teaches the limitations of claims 3-11 of the current application, respectively, as shown in the above claim comparison chart. Regarding claim 12, claim 13 of U.S. Patent 11,686,883 teaches the limitations of claim 12 of the current application as shown in the above claim comparison chart. Regarding claim 13, claim 14 of U.S. Patent 11,686,883 teaches the limitations of claim 13 of the current application as shown in the above claim comparison chart. Regarding claim 14, claim 15 of U.S. Patent 11,686,883 teaches the limitations of claim 14 of the current application as shown in the above claim comparison chart. Regarding claim 15, claim 16 of U.S. Patent 11,686,883 teaches the limitations of claim 15 of the current application as shown in the above claim comparison chart. Regarding claim 16, claim 18 of U.S. Patent 11,686,883 teaches the limitations of claim 16 of the current application as shown in the above claim comparison chart. Regarding claim 17, claim 20 of U.S. Patent 11,686,883 teaches the limitations of claim 17 of the current application as shown in the above claim comparison chart. Regarding claim 18, claim 21 of U.S. Patent 11,686,883 teaches the limitations of claim 18 of the current application as shown in the above claim comparison chart. Regarding claim 19, claim 24 of U.S. Patent 11,686,883 teaches the limitations of claim 19 of the current application as shown in the above claim comparison chart. Regarding claim 20, claim 25 of U.S. Patent 11,686,883 teaches the limitations of claim 20 of the current application as shown in the above claim comparison chart. Conclusion 5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUNG Q DANG whose telephone number is (571)272-3069. The examiner can normally be reached M-F 10-6PM.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Imani N Hayman can be reached at 571-270-5528. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. HUNG Q. DANG Examiner Art Unit 2835 /IMANI N HAYMAN/ Supervisory Patent Examiner, Art Unit 2841
Read full office action

Prosecution Timeline

Jul 23, 2024
Application Filed
Jan 21, 2026
Non-Final Rejection — §DP (current)

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Prosecution Projections

1-2
Expected OA Rounds
68%
Grant Probability
87%
With Interview (+18.3%)
3y 1m
Median Time to Grant
Low
PTA Risk
Based on 1841 resolved cases by this examiner. Grant probability derived from career allow rate.

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