DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-29 are present for examination.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 07/23/2024, 12/16/2024, 03/05/2025, respectively, are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-4 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
RE claim 1, the limitation of that “a trim circuit to receive a trim enable circuit” in line 3 is vague and rendering claim 1 indefinite. How can one circuit (i.e., a trim circuit) receive another circuit (i.e., a trim enable circuit)? Correction is required.
Claims 2-4 are depending on claim 1 and therefore are rejected on the same basis as claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-29 are rejected under 35 U.S.C. 103 as being unpatentable over Cho (US 2010/0278001) in view of Ide (US 2007/0268167).
RE claims 1, 5, 10 and 25, Cho discloses the invention substantially as claimed.
Cho discloses that a high voltage generation block and a method of using it (see figure 1 and sections [0020], [0025]; i.e., the charge pump circuit 20 to maintain the level of high voltage) comprising: a temperature sensor to sense an operating temperature and output a temperature output (see sections [0035], [0020]; i.e., the additional information offering unit 40 configured with temperature sensor to measure the working temperature of the semiconductor memory device depicted in figure 1); a trim circuit to receive a trim enable circuit (see figures 1&2 and section [0024] and for broadest interpretation; i.e., the trim circuit 15 to receive trim information read from the trim information area of the memory cell array 11); a charge pump oscillator to generate an oscillating signa in response to the oscillation trim bits and a feedback signal (see figures 1&2 and section [0039]; i.e., the charge pump oscillator 21 to generate an oscillating signal in response to the oscillation trim bits OSC_EN and a feedback signal Vpread); a charge pump to receive the oscillating signal and to generate a pumped voltage (see figures 1&2 and section [0039]; i.e., the charge pump 23 to receive the oscillating signal generated by oscillator 21 and to generate a pumped voltage Vpread); and a charge pump regulator to receive the pumped voltage and to generate the feedback signal and a high voltage output (see figures 1&2 and sections [0025], [0027], [0028]; i.e., the charge pump circuit 20 is the charge pump regulator to receive a standby voltage and to generate the feedback signal OSC_EN and a high voltage output Vpread), and a method comprising: setting an oscillation trim value to a first initial value; setting a voltage trim value to a second initial value; applying the oscillator trim value and a voltage trim value to a high voltage generation block comprising a charge pump; measuring a voltage output from the charge pump; if the voltage output is not at a target voltage, incrementing the voltage trim value and repeating the applying and measuring; if the voltage output is at the target voltage, setting the oscillator trim value to the voltage trim value; measuring a voltage output from the charge pump; if the voltage output is not at a target voltage, incrementing the oscillator trim value and repeating the applying and measuring; and if the voltage output if at the target voltage, storing the voltage trim value and the oscillator trim value; trimming, using oscillator trim bits, a frequency of a charge pump oscillator until an output of the charge pump receiving an oscillating signal from the charge pump oscillator reaches a peak value; and storing the oscillator trim bits; sensing a temperature, trimming a frequency of a signal generated by a charge pump oscillator in response to the temperature (see sections [0024] – [0033]).
However, Cho does not specifically disclose that a trim circuit to receive the temperature output and to generate oscillator trim bits.
Ide teaches that in order to trim the frequency of the oscillator built in the semiconductor integrated circuit on the basis of the temperature, a temperature detector and an A/D converter are provided, wherein a signal voltage indicating the temperature detected by the temperature detector is A/D converted, and the trimming is carried out in according with the output of the conversion (see section [0018]). The ring oscillator 9 including a trimming circuit 22 for compensating a frequency in response to a temperature compensating code S6 (see section [0045]). By controlling the ON/OFF of the transistor in the trimming circuit 22 in the ring oscillator 9 using the temperature compensation code, the frequency of the output clock of the ring oscillator 9 is compensated (see section [0063]). The motivation of Ide is to stabilize oscillation frequency in a semiconductor integrated circuit including a memory circuit 103 having temperature dependency (see sections [0010], [0005], [0011]).
Cho and Ide are combinable because they are from the same field of endeavor. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to modify Cho by including the teaching from Ide in order to stabilize oscillation frequency in a semiconductor integrated circuit including a memory circuit 103 having temperature dependency.
RE claim 2, Cho in view of Ide disclose that wherein the charge pump regulator receives voltage trim bits and where the pumped voltage is altered in response to the voltage trim bits to generate the high voltage output (see Cho, sections [0027], [0028]).
RE claims 3 and 6, Cho in view of Ide disclose that wherein the trim circuit comprises a lookup table that outputs the oscillator trim bits in response to the temperature output (see Ide, sections [0043], [0050, [0065]).
RE claims 4 and 8, Cho in view of Ide disclose that wherein the trim circuit comprises a lookup table that outputs the oscillator trim bits and the voltage trim bits in response to the temperature output (see Ide, sections [0043], [0050], [0065]).
RE claim 9, Cho in view of Ide disclose that receiving the voltage trim value and the oscillator trim value and using the voltage trim value and oscillator trim value during a program or erase operation (see Cho, figures 1&2 and its associated depictions).
RE claim 11, Cho in view of Ide disclose that retrieving the oscillator trim bits; using the oscillator trim bits to trim the charge pump oscillator; and generating, by the charge pump, an output voltage in response to an oscillating signal from the charge pump oscillator (see figures 1&2 and its associated depictions; i.e., the charge pump oscillator 21, charge pump 23, etc.).
RE claim 12, Cho in view of Ide disclose that applying the output voltage to an array of non-volatile memory cells to perform a program operation (see Cho, sections [0005], [0022], [0029]).
RE claim 13, Cho in view of Ide disclose that applying the output voltage to an array of non-volatile memory cells to perform an erase operation (see Cho, sections [0006], [0022], [0029]).
RE claims 14 and 15, Cho in view of Ide disclose that retrieving the oscillator trim bits; using the oscillator trim bits to trim the charge pump oscillator at a first and a second temperatures; and generating, by the charge pump, an output voltage in response to an oscillating signal from the charge pump oscillator (see Cho, sections [0024] – [0044]).
RE claims 16 and 22, Cho in view of Ide disclose that repeating the trimming and the storing at a plurality of operating temperatures (see Cho, sections [0024] – [0044]).
RE claims 17, 18, 23 and 24, Cho in view of Ide disclose that measuring an operating temperature; and retrieving oscillator trim bits associated with the measured operating temperature, or associated with a range of operating temperatures that includes the measured operating temperature (see Cho, sections [0024] – [0044]).
RE claim 19, Cho in view of Ide disclose that trimming, using voltage trim bits, a voltage of a charge pump until an output of the charge pump is equal to a target voltage; and storing the voltage trim bits (see Cho, sections [0024] – [0044]).
RE claims 20 and 21, Cho in view of Ide disclose that retrieving the voltage trim bits; using the voltage tri bits to trim the charge pump at a first/second temperature; and generating, by the charge pump, an output voltage in response to the voltage trim bits (see Cho, sections [0024] – [0044]).
RE claim 26, Cho in view of Ide disclose that generating, by a charge pump, a pumped voltage in response to the signal generated by the charge pump oscillator (see Cho, sections [0024] – [0044]).
RE claim 27, Cho in view of Ide disclose that generating, by a charge pump regulator, a high voltage in response to the pumped voltage (see Cho, sections [0024] – [0044]).
RE claim 28, Cho in view of Ide disclose that applying the high voltage to a memory cell during an erase operation (see Cho, sections [0006], [0022], [0029]).
RE claim 29, Cho in view of Ide disclose that applying the high voltage to a memory cell during a program operation (see Cho, sections [0005], [0022], [0029]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Setogawa (USPN 11,450,355)
Lee et al (US 2017/0162238)
Kwon et al (US 2018/0337663)
Edme (USPN 5,175,706)
Any inquiry concerning this communication from the examiner should be directed to FRED TZENG whose telephone number is 571-272-7565. The examiner can normally be reached on weekdays from 2:0 pm to 10:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached on 571-272-0666. The fax phone numbers for the organization where this application or proceeding is assigned are 571-273-8300 for regular communications and 571-273-7565 for After Final communications.
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/FRED TZENG/ Primary Examiner, Art Unit 2625
FFT
March 17, 2026