DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. This office action is in response to the Amendment filed on May 26, 2026.
Claims 1-3, 9, 12-14, and 19 are amended. Claim 8 is canceled. No claims are added; however, claim 9 has been rewritten in independent form.
Applicant’s amendments to the specification submitted on May 26, 2026 are acknowledged and objections to the specification are withdrawn.
Applicant’s amendments to claims overcome the objections and 112(b) rejection set forth in the previous office action and therefore the objections and 112(b) rejection are withdrawn.
Response to Arguments
3. Applicant’s arguments, see pages 11-13, filed May 26, 2026, with respect to independent claims 1, 12, and 19, have been fully considered and are persuasive. The rejection under 35 USC § 102 has been withdrawn.
Applicant submits that because independent claims 1, 12, and 19 have been amended to include subject matter from claim 8 indicated as allowable in the previous Office Action, the independent claims, as well as their respective dependent claims, are in condition for allowance. In view of the amended claims, the rejections set forth in the previous Office Action are withdrawn; however, new rejections under 35 USC § 112 are noted.
4. Applicant’s arguments, see page 10, filed May 26, 2026, with respect to claim 9, which has been rewritten in independent form, have been fully considered and are persuasive.
Applicant submits and Examiner agrees that because independent claim 9 includes subject matter indicated as allowable in the previous Office Action, it is in condition for allowance.
Claim Rejections - 35 USC § 112
5. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
6. Claims 1-7 and 10-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitations, “write a respective first logic state to each memory cell of each of the plurality of memory portions” in lines 8-9, and “read a second logic state from one or more memory cells of the first memory portion and the second memory portion based at least in part on applying the first read pulse to the first word line and the second read pulse to the second word line, wherein reading the second logic state is based on the quantity of memory portions” in lines 21-24.
¶[0061] indicates it is possible to have at least three memory portions and therefore, “plurality” in lines 8-9 may be at least “three.” Lines 21-22 seem to specify two memory portions of interest with respect to reading the second logic state, while reading the second logic state is based on the quantity of memory portions.
Together, it is unclear:
if there is one second logic state stored in both the first and second portions of memory,
if there is one second logic state stored in part in the first memory portion and in part in the second memory portion, or
if there are different second logic states, one stored in the first memory portion and the other in the second memory portion; and
if the “first and second memory portions” case is a specific embodiment that does not have three or more portions in total, and if so, if reading the second logic state always based on the constant “two.”
Claims 12 and 19 are unclear for the same reasons as outlined for claim 1.
Claim 2 recites the limitation, “increment a counter for each memory cell of the one or more memory cells that stores the second logic state that is the same as a logic state written to a respective memory cell of the one or more memory cells” in lines 3-5.
Examiner believes “the one or more memory cells” refers to “one or more memory cells of the first memory portion and the second memory portion” in claim 1. However, it is unclear if “a respective memory cell of the one or more memory cells” refers to the one or more memory cells of the first and second memory portion that store the second logic state (see claim 1), or if it refers to only the one or more memory cells that stores a specific instance of the second logic state (“that is the same as a logic state…”).
Claim 3 recites the limitation, “increment a counter for each memory cell of the one or more memory cells that stores the second logic state that is different than the respective first logic state written to a respective memory cell of the one or more memory cells.”
Examiner believes “the one or more memory cells” refers to “one or more memory cells of the first memory portion and the second memory portion” in claim 1. However, it is unclear if “each memory cell of the one or more memory cells” refers to the one or more memory cells of the first and second memory portion that store the second logic state (see claim 1), or if it refers to only the one or more memory cells that stores a specific instance of the second logic state (“that is different than the respective first logic state…”).
Claim 5 recites the limitation, “reading the second logic state from the one or more memory cells.” It is unclear if “the one or more memory cells” refers to the one or more memory cells of the first and second memory portion (claim 1, lines 20-21), or only the one or more memory cells of the first and second memory portion that store the second logic state (claim 1, lines 25-27 seems to leave open this possibility, especially in light of the wording used in non-antecedent claims 2-3).
Allowable Subject Matter
7. Claim 9 is allowed.
Claims 1, 12, and 19 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Claims 2-3 and 5 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
8. The following is a statement of reasons for the indication of allowable subject matter.
Regarding claim 1, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of receive signaling indicating a quantity of memory portions greater than one, wherein reading the second logic state is based on the quantity of memory portions. Claims 2-7 depend on claim 1.
Regarding claim 9, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of bias a first word line, a second word line, and a third word line of the plurality of word lines to a first voltage based at least in part on receiving the a command to validate a write operation, wherein the first word line corresponds to a first memory portion of the plurality of memory portions, the second word line corresponds to a second memory portion of the plurality of memory portions, and the third word line corresponds to a third memory portion of the plurality of memory portions; and
apply a third read pulse to the third word line based at least in part on biasing the third word line to the first voltage, wherein reading the second logic state from the one or more memory cells of the first memory portion and the second memory portion is based at least in part on applying the third read pulse to the third word line.
Regarding claim 12, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of receive signaling indicating a quantity of memory portions greater than one, wherein reading the second logic state is based on the quantity of memory portions. Claims 13-18 depend on claim 12.
Regarding claim 19, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of receive signaling indicating a quantity of memory portions greater than one, wherein reading the second logic state is based on the quantity of memory portions. Claim 20 depends on claim 19.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/B.S.C./Examiner, Art Unit 2827
/AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
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