Prosecution Insights
Last updated: July 17, 2026
Application No. 18/782,959

Transducer Device and Method of Manufacture

Non-Final OA §103
Filed
Jul 24, 2024
Priority
May 18, 2022 — divisional of 17/747,759
Examiner
ARMSTRONG, JONATHAN D
Art Unit
3645
Tech Center
3600 — Transportation & Electronic Commerce
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
54%
Grant Probability
Moderate
1-2
OA Rounds
1y 7m
Est. Remaining
57%
With Interview

Examiner Intelligence

Grants 54% of resolved cases
54%
Career Allowance Rate
232 granted / 434 resolved
+1.5% vs TC avg
Minimal +3% lift
Without
With
+3.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
40 currently pending
Career history
488
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
80.7%
+40.7% vs TC avg
§102
12.5%
-27.5% vs TC avg
§112
4.7%
-35.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 434 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant's election with traverse of claims 1-8 in the reply filed on 4/13/2026 is acknowledged. The traversal is on the ground(s) that the . This is not found persuasive because the arguments explain that Applicant's traverse is not directed to the issue of whether or not these species are patentably distinct. Rather, Applicant is respectfully asserting that the Restriction Requirement failed to properly demonstrate that the asserted inventions are distinct and/or that the search of all claims would be a serious burden. The. The Examiner has attempted to delineate all differences between the different claimed inventions, not merely a single different limitation. The requirement is still deemed proper and is therefore made FINAL. Claims 9-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 4/13/2026. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3-6, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Schmid (US 2020/0384503 A1) and Liu (US 2022/0280972 A1). Regarding claim 1, Schmid teaches a method of forming a transducer, the method comprising: depositing a first dielectric layer on a first electrode [[0018] FIGS. 1-1 through 1-9 there is shown a series of cross-sectional views illustrating an exemplary process flow for forming a micromachined ultrasound transducer device; [0019] FIG. 1-2, a first dielectric layer 106 is formed over the passivation layer 102 and patterned bottom electrode 104;]; patterning the first dielectric layer to form a plurality of first protrusions in a first region and a plurality of second protrusions in a second region, the second region being different from the first region [[0020] FIG. 1-2 and lithographically patterned and etched; [fig. 2-2] depicts protrusions #200 having different widths in the middle as compared with the outer perimeter of the transducer device; [0024] FIG. 2-2, the CMP support dielectric layer 200 is patterned as illustrated in preparation for a CMP operation on the sacrificial cavity material 108. In one embodiment, the CMP support dielectric layer 200 may be patterned so as to be completely removed directly above the sacrificial cavity material 108. Alternatively, selected portions (indicted by dashes in FIG. 2-1) of the CMP support dielectric layer 200 may remain over the sacrificial cavity material 108 after patterning], bonding the first dielectric layer to a second electrode using a second dielectric layer [[0020] a second dielectric layer 110 is formed over the first dielectric layer 106 and sacrificial cavity material 108. The second dielectric layer 110 may be formed from the same material and at the same thickness as the first dielectric layer 106. Then, as shown in FIG. 1-5, a patterned top electrode 112 is formed over the second dielectric layer 110], and wherein sidewalls of the second dielectric layer define a cavity disposed between the first electrode and the second electrode [[fig. 1-4][fig. 1-5 to 1-9]] shows that second dielectric layer #110 has both horizontal and vertical structure (i.e., a sidewall) with cavity #118; [0017] basic structure is a parallel plate capacitor with a rigid bottom electrode and a top electrode residing on or within a flexible membrane. Thus, a cavity is defined between the bottom and top electrodes]. Schmid does not explicitly teach and yet Liu teaches wherein a density of the plurality of first protrusions in the first region is different from a density of the plurality of second protrusions in the second region [[fig. 3] shows pedestals H having different density in the middle as compared with the outside perimeter of the ultrasonic transducer; [fig. 4b] shows another view and two regions having different densities], and wherein the plurality of first protrusions and the plurality of second protrusions are disposed in the cavity [[fig. 3] shows pedestals H with cavity above #312]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention with a reasonable expectation of success to modify the patterned dielectric layer as taught by Schmid, with the pedestals as taught by Liu so that the capacitive transducer may be operated in collapse mode (Liu) [[0059]]. Regarding claim 3, Schmid does not explicitly teach and yet Liu teaches the method of claim 1, wherein the first region is a central region of the first dielectric layer and the second region is an outer region of the first dielectric layer, and wherein the outer region surrounds the central region [[fig. 3] shows pedestals H having different density in the middle as compared with the outside perimeter of the ultrasonic transducer; [fig. 4b] shows another view and two regions having different densities where the regions are concentric circles]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention with a reasonable expectation of success to modify the patterned dielectric layer as taught by Schmid, with the pedestals as taught by Liu so that the capacitive transducer may be operated in collapse mode (Liu) [[0059]]. Regarding claim 4, Schmid does not explicitly teach and yet Liu teaches the method of claim 3, wherein the central region and the outer region have circular outer perimeters [[fig. 3] shows pedestals H having different density in the middle as compared with the outside perimeter of the ultrasonic transducer; [fig. 4b] shows another view and two regions having different densities where the regions are circular]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention with a reasonable expectation of success to modify the patterned dielectric layer as taught by Schmid, with the pedestals as taught by Liu so that the capacitive transducer may be operated in collapse mode (Liu) [[0059]]. Regarding claim 5, Schmid teaches the method of claim 1, further comprising: depositing the second dielectric layer over the first dielectric layer [[0020]]; and patterning the second dielectric layer to form the cavity [[fig. 1-2][fig. 2-2][0024]], wherein bonding the first dielectric layer to the second electrode comprises: forming a third dielectric layer on the second electrode [[0021] referring now to FIG. 1-6, a third dielectric layer 114 is formed over the second dielectric layer 110 and top electrode 112]; and bonding the second dielectric layer to the third dielectric layer using dielectric-to-dielectric bonding [[0021] the third dielectric layer 114 may be formed from the same material(s) as the first and second dielectric layers 106, 110 and, optionally, at a greater thickness the first and second dielectric layers 106, 110 (e.g., 1000 nm). As shown in FIG. 1-7, an access hole 116 is formed through the third and second dielectric layer 114, 110, such as by etching for example, to expose a portion of the sacrificial cavity material 108; [0036]]. Regarding claim 6, Schmid teaches the method of claim 1, wherein patterning the first dielectric layer comprises etching upper portions of the first dielectric layer [[0024] in FIG. 2-2, the CMP support dielectric layer 200 is patterned as illustrated in preparation for a CMP operation on the sacrificial cavity material 108. In one embodiment, the CMP support dielectric layer 200 may be patterned so as to be completely removed directly above the sacrificial cavity material 108. Alternatively, selected portions (indicted by dashes in FIG. 2-1) of the CMP support dielectric layer 200 may remain over the sacrificial cavity material 108 after patterning.]. Regarding claim 8, Schmid teaches the method of claim 1, wherein bonding the first dielectric layer to the second electrode using the second dielectric layer comprises bonding the second dielectric layer to the first dielectric layer using dielectric-to-dielectric bonding [[0020] as shown in FIG. 1-4, a second dielectric layer 110 is formed over the first dielectric layer 106; [0036] transducer cavities are formed on a CMOS wafer using a low thermal budget bondable material; that is, using a material where bonding temperatures and times of the material are compatible with other structures on the wafers, such as CMOS devices]. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Schmid (US 2020/0384503 A1) and Liu (US 2022/0280972 A1) as applied to claim 6 above, and further in view of Akiyama (US 2019/0366382 A1). Regarding claim 2, Schmid does not explicitly teach and yet Akiyama teaches the method of claim 1, wherein each of the first protrusions and the second protrusions has a circular shape in a top-down view [[fig. 1a, 3, 4, 5] depict circular shaped capacitive transducers], and wherein a diameter of each of the first protrusions and the second protrusions is in a range from 0.5 μm to 10 μm [[0081] the protrusion 14 on the surface at the bottom of the air gap 10 is formed on a position facing the concave portion 7 via the air gap 10. The protrusion 14 has a height larger than the depth of the concave portion 7 and a width smaller than the width of the concave portion 7. According to the present exemplary embodiment, the protrusion 14 has a height of about 30 nanometers and a width of about 3 micrometers]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention with a reasonable expectation of success to modify the patterned dielectric layer as taught by Schmid, with the three micrometer width of protrusions as taught by Akiyama because reducing reduce a contact area between the vibrating membrane and the fixed part reduces a charge transfer amount (Akiyama) [[0003]]. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Schmid (US 2020/0384503 A1) and Liu (US 2022/0280972 A1) as applied to claim 6 above, and further in view of Gattere (US 2020/0156114 A1). Regarding claim 7, Schmid does not explicitly teach and yet Gattere teaches the method of claim 6, wherein etching the upper portions of the first dielectric layer comprises a wet etch process that includes etching with ammonium fluoride (NH4F), hydrofluoric acid (HF), or a combination thereof [[0084] mask on the second surface 432B of the wafer 700 is removed, and the portions of the dielectric layer 470 and of the definition layer 575 exposed by the previous etching step are removed in a per se known manner (for example, by wet etching with hydrofluoric acid, HF), to release the membrane 445. The wafer 700 is diced so as to obtain the transducer 430 of FIG. 12]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention with a reasonable expectation of success to pattern and etch patterned dielectric layer as taught by Schmid, with the wet etching of dielectric layer as taught by Gattere because wet etching with hydrofluoric acid is a known manner of wet etching (Gattere) [[0084]]. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN D ARMSTRONG whose telephone number is (571)270-7339. The examiner can normally be reached M - F 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Isam Alsomiri can be reached at 571-272-6970. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONATHAN D ARMSTRONG/ Examiner, Art Unit 3645
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Prosecution Timeline

Jul 24, 2024
Application Filed
Jun 30, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
54%
Grant Probability
57%
With Interview (+3.3%)
3y 7m (~1y 7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 434 resolved cases by this examiner. Grant probability derived from career allowance rate.

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