DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The response filed 09/19/2024 is accepted, in which, claims 1-15 are canceled and claims 21-35 are newly added. Claims 1, 25, and 33 are independent with claims 16-35 awaiting an action on the merits as follows.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 16, 20-23, 25, and 29-32 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chou (US 9738516 B2).
Regarding claim 16, Chou teaches a method (method, [Abs.]) for forming an integrated chip (IC) (100A, Fig 1A), the method (method) comprising:
forming a first plurality of stopper bumps (114) on (shown on) a substrate (104);
forming a plurality of adhesive structures (112; facilitates bonding to substrate, [Col 7, Ln 19-20]) on (shown on) the substrate (104);
attaching a microelectromechanical systems (MEMS) structure (120) to the adhesive structures (112);
forming a second plurality of stopper bumps (134) over (shown over) the MEMS structure (120); and
attaching a housing structure (HS: 130/142) to the substrate (104), wherein
the second plurality of stopper bumps (134) is disposed between (shown between) the MEMS structure (120) and a lower surface (133aB: bottom surface of 133a) of the housing structure (HS).
Regarding claim 20, Chou teaches the method of claim 16 and goes on to teach wherein the second plurality of stopper bumps (134, Fig 1A) is formed on (shown on) and directly contacts (shown in direct contact) a top surface (120T: top surface of 120) of the MEMS structure (120).
Regarding claim 21, Chou teaches the method of claim 16 and goes on to teach wherein the MEMS structure (120, Fig 1A) comprises a movable element (122a) suspended over (shown over) the substrate (104) and metal pads (138) disposed over (shown over) a peripheral region (122b) of the MEMS structure (120), wherein
the second plurality of stopper bumps (134) is formed on (shown on) a top surface (122aT: top of 122a) of the movable element (122a), and wherein
a height (H1: height of 134 from top surface of a22a to top of 134) of the second plurality of stopper bumps (134) is greater (shown greater) than a height (H2: maximum height of 138 from 142 to 140) of the metal pads (138).
Regarding claim 22, Chou teaches the method of claim 21 and goes on to teach further comprising:
wire (142, Fig 1) bonding (shown bonding; electrical coupling, [Col 8, Ln 14-15]) the metal pads (138) to lower metal pads (110) on (shown on) the substrate (104).
Regarding claim 23, Chou teaches the method of claim 16 and goes on to teach wherein the second plurality of stopper bumps (134, Fig 1A) comprises one or more lower stopper bumps (134M: 134 in middle of Fig 1A) contacting (shown contacting) the MEMS structure (120) and one or more upper stopper bumps (134R: 134 on right side of 124) contacting (shown in indirect contact) a surface (133aB: bottom surface of 133a) of the housing structure (HS) facing (shown facing) the MEMS structure (120), wherein
the one or more lower stopper bumps (134R) are laterally offset (shown laterally offset) from the one or more upper stopper bumps (134M).
Regarding claim 25, Chou teaches a method (method, [Abs.]) for forming an integrated chip (IC) (100A, Fig 1A), the method (method) comprising:
forming a first plurality of stopper structures (114) over (shown over) a substrate (Sub: 104/108);
forming a first plurality of attachment structures (112; facilitates bonding to substrate, [Col 7, Ln 19-20]) on (shown on) the substrate (Sub);
attaching a microelectromechanical systems (MEMS) structure (116) to the substrate (Sub) by way of the first plurality of attachment structures (112), wherein
the MEMS structure (116) comprises a movable element (122a; deflectable element, [Col 4, Ln 42]) suspended over (shown over) the substrate (Sub), wherein
the first plurality of stopper structures (114) is arranged between (shown between) the substrate (Sub) and the MEMS structure (116); and
forming a housing structure (HS: 130/142) over (shown over) the MEMS structure (116).
Regarding claim 29, Chou teaches the method of claim 25 and goes on to teach wherein the first plurality of stopper structures (114, Fig 3) are formed by patterning (shown patterned) a capping structure (102), wherein
the capping structure (102) is bonded (shown bonded, Fig 6) to a bottom surface (126B: bottom of 126) of the MEMS structure (116) before attaching (shown before attaching) the MEMS structure (116) to the substrate (Sub).
Regarding claim 30, Chou teaches the method of claim 29 and goes on to teach wherein forming the movable element (122a, Fig 7) comprises etching (702; plasma etching, [Col 7, Ln 24]) the MEMS structure (116) while the MEMS structure (116) is disposed on (shown on) the capping structure (102).
Regarding claim 31, Chou teaches the method of claim 29 and goes on to teach further comprising:
forming a second plurality of stopper structures (134, Fig 1A) over (shown over) the MEMS structure (116),
wherein the first plurality of stopper structures (114) comprises a first material (silicon dioxide, [Col 3, Ln 48-50]) different (different) from a second material (metal, [Col 5, Ln 6-8]) of the second plurality of stopper structures (134).
Regarding claim 32, Chou teaches the method of claim 31 and goes on to teach wherein a height (H5: height from middle of 114 to top of 114) of the first plurality of stopper structures (114) is less (shown less) than a height (H6: maximum height of 134 from surface parallel to top surface of 112a to top of 134) of the second plurality of stopper structures (134).
Claims 33 and 35 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liu (US 9695039 B1).
Regarding claim 33, Liu teaches a method (1900, Fig 19) for forming an integrated chip (IC) (100, Fig 1), the method (1900) comprising:
etching (etching, [Col 4, Ln 33035]) a substrate (112, Fig 5) to form a plurality of openings (207) in the substrate (112), wherein
the plurality of openings (207) have a first height (h1);
depositing a first plurality of stopper structures (120, Fig 7) in the plurality of openings (207),
wherein a vertical distance (H7: height of 120 from the top surface of 112 at arrow d1 to the top of 120, Fig 1) between (shown between) a top surface (112T: top surface of 112 at d1 arrow) of the substrate (112) and a top surface (120T: top of 120) of the first plurality of stopper structures (120) is greater (shown greater) than the first height (h1); and
bonding (shown bonded, Fig 9) a microelectromechanical systems (MEMS) structure (130) to the substrate (112), wherein
the MEMS structure (130) overlies (shown over) the first plurality of stopper structures (120) and comprises a movable element (108), wherein
a material (silicon, [Col 6, Ln 4-5]; moveable element 108 is part of the MEMS 130) of the movable element (108) is different (different) from a material (GAAs, [Col 4, Ln 19-24]; 120 is comprised of the same material as substrate 112) of the first plurality of stopper structures (120).
Regarding claim 35, Liu teaches the method of claim 33 and goes on to teach further comprising:
attaching a housing structure (104, Fig 1) to the substrate (112); and
forming a second plurality of stopper structures (222a) between (shown between) the housing structure (104) and the MEMS structure (130), wherein
the second plurality of stopper structures (222a) is formed after (shown after, Fig 14) bonding (shown bonding, Fig 9) the MEMS structure (130) to the substrate (112) and before (shown before) attaching (shown attaching, Fig 16) the housing structure (104) to the substrate (112).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 17-18 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Chou (US 9738516 B2) as applied to claims 16, 20-23, 25, and 29-32 above, and further in view of Mao (US 11923331 B2).
Regarding claim 17, Chou teaches the method of claim 16, the first plurality of stopper bumps (114, Fig 1A), and the substrate (104).
Chou fails to explicitly teach forming the first plurality of stopper bumps comprises: forming openings in a top surface of the substrate; depositing a polymer in the openings; and curing the polymer.
However, Mao teaches wherein forming (forming adhesive structures 108, Fig 6D, [Col 15, Ln 33-35]) the first plurality of stopper bumps comprises:
forming openings (OP: opening between the two 610 components of the top of substrate comprising 102/110/610) in a top surface (610lT: top surface of 610l) of the substrate;
depositing a polymer (Poly: liquid of adhesive structure; squeezing a liquid, [Col 15, Ln 34]; well known in the art that a liquid that goes on to be cured is a polymer) in the openings (OP); and
curing (cured so the liquid hardens, [Col 15, Ln 45-46]) the polymer (Poly).
Chou and Mao are considered analogous to the claimed invention because both are from the same field of endeavor of semiconductor integrated chip package devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of Chou with the features of Mao to create a method wherein forming the first plurality of stopper bumps comprises: forming openings in a top surface of the substrate; depositing a polymer in the openings; and curing the polymer because the addition of stopper bumps allows for stacked devices to have better gap control and better leveling (Mao, {Col 3, Ln 10-12]); motion sensors may need to control zero-gravitation offset, which is caused by an accelerometer being misaligned. The addition of stopper bumps allows for the accelerometer in the motion sensor to be properly aligned after the packaging process, and additional time and materials are not required to realign the semiconductor die, thus controlling zero-gravitation offset (Mao, [Col 3, Ln 16-23]).
Regarding claim 18, the combination of Chou and Mao discloses the method of claim 17. Chou teaches the MEMS structure (120, Fig 1A) and the adhesive structures (112).
Mao goes on to teach wherein after (after attaching the first die to the first adhesive structures, [Col 23, Ln 46-49]) the MEMS structure is attached (shown attached; die 104 attached to adhesive structures 108, Fig 3) to the adhesive structures a curing process (curing the first adhesive structure, [Col 23, Ln 49]) is performed.
Regarding claim 24, Chou teaches the method of claim 16, the MEMS structure (120, Fig 1A), the lower surface (133aB) of the housing structure (HS), and the second plurality of stopper bumps (134).
Chou fails to explicitly teach forming a plurality of upper adhesive structures on the MEMS structure; and disposing a semiconductor die on the plurality of upper adhesive structures, wherein the semiconductor die is arranged between the MEMS structure and the lower surface of the housing structure, wherein the second plurality of stopper bumps is arranged between the MEMS structure and the semiconductor die.
However, Mao teaches further comprising:
forming a plurality of upper adhesive structures (306, Fig 3) on (shown on) the MEMS structure; and
disposing a semiconductor die (304) on (shown on) the plurality of upper adhesive structures (306),
wherein the semiconductor die (304) is arranged between (shown between) the MEMS structure and the lower surface of the housing structure, wherein
the second plurality of stopper bumps is arranged between (shown between; stopper bumps 308 are between MEMS 104 and semiconductor die 304) the MEMS structure and the semiconductor die (304).
Chou and Mao are considered analogous to the claimed invention because both are from the same field of endeavor of semiconductor integrated chip package devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of Chou with the features of Mao to create a method wherein forming a plurality of upper adhesive structures on the MEMS structure; and disposing a semiconductor die on the plurality of upper adhesive structures, wherein the semiconductor die is arranged between the MEMS structure and the lower surface of the housing structure, wherein the second plurality of stopper bumps is arranged between the MEMS structure and the semiconductor die because the addition of stopper bumps allows for stacked devices to have better gap control and better leveling (Mao, {Col 3, Ln 10-12]); motion sensors may need to control zero-gravitation offset, which is caused by an accelerometer being misaligned. The addition of stopper bumps allows for the accelerometer in the motion sensor to be properly aligned after the packaging process, and additional time and materials are not required to realign the semiconductor die, thus controlling zero-gravitation offset (Mao, [Col 3, Ln 16-23]).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Chou (US 9738516 B2) as applied to claims 16, 20-23, 25, and 29-32 above, and further in view of Liu (US 9695039 B1).
Regarding claim 19, Chou teaches the method of claim 16, the second plurality of stopper bumps (134, Fig 1A), and the lower surface (133aB) of the housing structure (HS).
Chou fails to explicitly teach the second plurality of stopper bumps is formed on and directly contacts the lower surface of the housing structure.
However, Liu teaches wherein the second plurality of stopper bumps is formed on (shown on; stoppers 222a shown directly contacting the lower surface of housing 104, Fig 1) and directly contacts (shown in direct contact) the lower surface of the housing structure.
Chou and Liu are considered analogous to the claimed invention because both are from the same field of endeavor of semiconductor integrated chip package devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of Chou with the features of Liu to create a method wherein the second plurality of stopper bumps is formed on and directly contacts the lower surface of the housing structure because by forming cavities with different depths and stoppers within the cavities, varied vacuum levels can be achieved for multiple MEMS devices, and over movement or stiction of the MEMS devices can be reduced by the stoppers (Liu, [Col 2, Ln 44-47]).
Claims 26-27 are rejected under 35 U.S.C. 103 as being unpatentable over Chou (US 9738516 B2) as applied to claims 16, 20-23, 25, and 29-32 above, and further in view of Bryzek (US 20130270660 A1).
Regarding claim 26, Chou teaches the method of claim 25, the first plurality of attachment structures (112), and the first plurality of stopper structures (114).
Chou goes on to teach wherein the first plurality of stopper structures (114, Fig 1A) directly contacts (shown in direct contact) the substrate (Sub).
Chou fails to explicitly teach forming the first plurality of attachment structures comprises depositing an individual attachment structure directly on a corresponding stopper structure in the first plurality of stopper structures.
However, Bryzek teaches wherein forming the first plurality of attachment structures comprises depositing an individual attachment structure (1804, Fig 18A) directly on (shown directly on) a corresponding stopper structure (1806) in the first plurality of stopper structures.
Chou and Bryzek are considered analogous to the claimed invention because both are from the same field of endeavor of semiconductor integrated chip package devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of Chou with the features of Bryzek to create a method wherein forming the first plurality of attachment structures comprises depositing an individual attachment structure directly on a corresponding stopper structure in the first plurality of stopper structures which reduces or minimizes the required footprint of the overall system, improves performance, and introduces fewer or no components for packaging purposes only. These advantages enable new applications, and improve existing applications by making them smaller and lowering their cost (Bryzek, [0055]).
Regarding claim 27, the combination of Chou and Bryzek discloses the method of claim 26. Chou goes on to teach wherein an initial height (H1: maximum height of 112 before attaching 120, Fig 3) of the first plurality of attachment structures (112) is greater (shown greater) than a height (H2: maximum height of 114) of the first plurality of stopper structures (114), and wherein
after attaching the MEMS structure (116, Fig 7) to the substrate (Sub) the first plurality of attachment structures (112) has a second height (H3: height of protruding section of 112 that directly contacts the top surface of 108 to the top surface of the protruding section in direct contact with 118) less (shown less) than the initial height (H1).
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Chou (US 9738516 B2) in view of Bryzek (US 20130270660 A1), and further in view of Liu (US 9695039 B1).
Regarding claim 28, the combination of Chou and Bryzek discloses the method of claim 26. Chou teaches the MEMS structure (116, Fig 1A), the substrate (Sub), and the first plurality of stopper structures (114).
The combination fails to explicitly teach a distance between a bottom surface of the MEMS structure and a top surface of the substrate is equal to a height of the first plurality of stopper structures over the top surface of the substrate.
However, Liu teaches wherein a distance (d2, Fig 1) between (shown between; distance between bottom surface of MEMS structure 130 to top of substrate 112) a bottom surface (130B: bottom of 130) of the MEMS structure and a top surface (112T: top of substrate 112 at arrow for d2) of the substrate is equal (shown equal) to a height (H4: height of stopper 120 from a line extended horizontally from surface 128s to the top of 120) of the first plurality of stopper structures over (shown over) the top surface (112T) of the substrate.
Chou, Bryzek, and Liu are considered analogous to the claimed invention because all are from the same field of endeavor of semiconductor integrated chip package devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of Chou and Bryzek with the features of Liu to create a method wherein a distance between a bottom surface of the MEMS structure and a top surface of the substrate is equal to a height of the first plurality of stopper structures over the top surface of the substrate because by forming cavities with different depths and stoppers within the cavities, varied vacuum levels can be achieved for multiple MEMS devices, and over movement or stiction of the MEMS devices can be reduced by the stoppers (Liu, [Col 2, Ln 44-47]).
Claim 34 is rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 9695039 B1) as applied to claims 33 and 35 above, and further in view of Singh (US 20120080753 A1).
Regarding claim 34, Liu teaches the method of claim 33 and the first plurality of stopper structures (120, Fig 1).
Liu fails to explicitly teach the first plurality of stopper structures is deposited by a screen printing process, a syringe dispensing process, or an ink-jet process.
However, Liu teaches that the first stopper structures are comprised of GaAs (120 is part of substrate 112, [Col 2, Ln 57-59]; substrate 112 is comprised of GaAs, [Col 4, Ln 18-19]).
Singh teaches a GaAs layer formed through wet deposition process, [0048].
Therefore, when Singh is combined with Chou, Singh teaches wherein the first plurality of stopper structures is deposited (deposited; GaAs layer formed through wet deposition process, [0048]) by a screen printing process, a syringe dispensing process, or an ink-jet process (ink-jet, [0048]).
Liu and Singh are considered analogous to the claimed invention because both are from the same field of endeavor of Gallium Arsenide based semiconductor devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of Liu with the features of Singh to create a method wherein the first plurality of stopper structures is deposited by a screen printing process, a syringe dispensing process, or an ink-jet process thereby forming a semiconductor layer with improved film qualities to provide a stable and reliable device performance (Singh, [0009]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Schmid (US 20100290199 A1) - SiO2 stoppers.
Yamanaka (US 20130241013 A1) - Silicon rubber sheet between chips to reduce vibration.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeremy D Watts whose telephone number is (703)756-1055. The examiner can normally be reached M-R 8:00am-4:30pm, F 8:00-3pm EST.
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/JEREMY DANIEL WATTS/Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
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