DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
2. The information disclosure statement (IDS) submitted on August 15, 2024 has been fully considered by the examiner.
Drawings
3. The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims.
Regarding claim 17, the one or more multiplexers connecting the drivers to the wordlines must be shown or the feature(s) canceled from the claim(s) (see, e.g., ¶ [0095] of the present application: “In one embodiment, this arrangement is implemented using one or more multiplexers (not shown) connecting the drivers to the wordlines.”). No new matter should be entered.
Regarding claims 7 and 20, “access devices” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Interpretation
4. The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
5. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
6. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a first driver applies at least one voltage to the first and second wordlines to turn on access devices” in claim 7, and “the second and third drivers discharge the third and fourth wordlines to disable access devices” in claim 20.
7. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
8. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
9. Claims 6-7 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
10. Claim 6 recites the limitation "the access lines are bitlines or digit lines.” There is insufficient antecedent basis for this limitation in the claim.
While ¶ [0109] offers support for applying techniques of the disclosure to bitlines or digit lines, claim 1 identifies “the access lines” as providing access to rows of memory cells, and bitlines (or digit lines) are identified throughout the specification as being selected by a column decoder (FIG. 2, 240; ¶ [0059]) and coupled to sense amplifiers (FIG. 2, 220..222). Within the context of the overall disclosure and system architecture, wordlines and bitlines are not interchangeable with one another, nor are rows and columns (e.g., FIGS. 1 and 2) as they do not simply describe direction, but structural or architectural features. In addition, bitline (or digit line) drivers, which would be necessary for the access lines of claim 1 to be the bitlines or digit lines of claim 6, are not clearly disclosed.
For the purpose of this examination, the limitation, “the access lines are bitlines or digit lines,” shall be interpreted as “other access lines are bitlines or digit lines” (see ¶ [0026]).
11. Regarding claim 7, the claim limitation “a first driver applies at least one voltage to the first and second wordlines to turn on access devices” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function.
Support for this limitation is found in ¶ [0022] and [0110] of the specification. However, no definition or description is given for the “access devices” and neither these devices nor their structural relationship to the wordline drivers appear in the drawings.
Therefore, claim 7 is indefinite and rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph.
12. Regarding claim 20, the claim limitation “the second and third drivers discharge the third and fourth wordlines to disable access devices” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function.
Support for this limitation is found in ¶ [0022-0023], [0033], and [0123] of the specification. However, no definition or description is given for the “access devices” and neither these devices nor their structural relationship to the wordline drivers appear in the drawings.
Therefore, claim 20 is indefinite and rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph.
13. Regarding claims 7 and 20, Applicant may:
(a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph;
(b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)).
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claim Rejections - 35 USC § 103
14. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
15. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
16. Claims 1-2, 4-6, 8-10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Min, et al (US 5155700 A), hereinafter Min.
Regarding independent claim 1, Chong teaches a system comprising:
a plurality of access lines configured to provide access to rows of memory cells (FIG. 1A, WL; FIG. 1C, 126, 128); and
driver circuitry (FIG. 1A, 104), wherein pairs of the access lines are driven to access respective rows (¶ [0017]), and wherein access lines of each pair are not aligned with each other (FIG. 1E, e.g., WLL1 in the left array and WLR1021 in the right array; ¶ [0029]).
Chong does not teach the driver circuitry is configured to drive voltages on the access lines.
Min further teaches applying voltages to the access lines when accessing a memory array (Col. 1, ll. 45-55; Col. 2, ll. 6-22).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Min into the method of Chong to include using word line drivers to apply voltages to the access lines when accessing a memory array. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of providing each transistor an access voltage as required by its own threshold voltage to be operated (Min, Col. 1, ll. 53-54).
Regarding claim 2, Chong as modified by Min teaches the limitations of claim 1.
Chong further teaches the access lines are wordlines (FIG. 1C, 126, 128; ¶ [0017]).
Regarding claim 4, Chong as modified by Min teaches the limitations of claim 1.
Chong further teaches first access lines of a first pair are not in linear alignment with each other across a first driver of the driver circuitry (FIG. 1E, e.g., WLL1 in the left array and WLR1021 in the right array are not “in linear alignment” across any driver among wordline drivers 104; ¶ [0029]).
Regarding claim 5, Chong as modified by Min teaches the limitations of claim 1.
Chong further teaches the two access lines of each pair are on opposite sides of the driver circuitry (e.g., FIG. 1F, WLL1 in the left array and WLR1 in the right array are on opposite sides of wordline drivers 104).
Regarding claim 6, Chong as modified by Min teaches the limitations of claim 1.
Min further teaches the access lines are bitlines or digit lines (FIG. 2, BL1..BLk).
Regarding claim 8, Chong as modified by Min teaches the limitations of claim 1.
Chong further teaches the memory cells are configured in a random access memory (¶ [0017]).
Regarding independent claim 9, Chong teaches an apparatus ¶ [0043] comprising:
a plurality of drivers (FIG. 1A, 104); and
a plurality of access lines (FIG. 1A, WL; FIG. 1C, 126, 128).
Chong does not teach a plurality of crossovers connecting outputs of the drivers to the plurality of access lines.
Min teaches a plurality of crossovers in the word line layouts (FIGS. 2, 3A; Abstract).
Therefore, Chong as modified by Min teaches a plurality of crossovers connecting outputs of the drivers to the plurality of access lines.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Min into the method of Chong to include an array method of the word line drivers, for example, arranging word lines in a group to provide a cross-over or to twist the word lines (Abstract). The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of reducing the pitch between the word line drivers and so that the layout of the semiconductor memory array may be easily accomplished (Min, Abstract).
Regarding claim 10, Chong as modified by Min teaches the limitations of claim 9.
Chong further teaches a controller (FIG. 1A, 115; ¶ [0016]) configured to control an address decoder (FIG. 1A, 108; ¶ [0017]), which in turn controls wordline drivers (FIG. 1A, 104; ¶ [0017]).
Min further teaches applying voltages to the access lines when accessing a memory array (Col. 1, ll. 45-55; Col. 2, ll. 6-22).
Therefore, Chong as modified by Min teaches a controller configured to cause the drivers to apply voltages to the access lines when accessing a memory array.
Regarding claim 12, Chong as modified by Min teaches the limitations of claim 9.
Chong further teaches two of the access lines are driven to access a first row, and the two access lines are located on opposite sides of the drivers (Chong teaches in FIG. 1F and ¶ [0030] two word lines on opposite sides of the drivers (WLL1 and WLR1) to access a “first row” in each array).
17. Claims 3, 11, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Min, et al (US 5155700 A), hereinafter Min, and further in view of Higgins, et al (US 20150347229 A1), hereinafter Higgins.
Regarding claim 3, Chong as modified by Min teaches the limitations of claim 1.
Chong further teaches in FIG. 1E and ¶ [0029] different word lines may be selected in left and right arrays.
Chong does not teach a logical address order of access lines.
Higgins teaches logical-to-physical address mapping at the page or word line level (FIG. 2A, 236; ¶ [0141]).
Therefore, Chong as modified by Min and Higgins teaches a logical address order of access lines (Higgins) on a first side of the driver circuitry is different (Chong) from a logical address order of access lines (Higgins) on an opposite second side of the driver circuitry (Chong).
Regarding claim 11, Chong as modified by Min teaches the limitations of claim 9.
Chong further teaches in FIG. 1E and ¶ [0029] different word lines may be selected in left and right arrays.
Chong does not teach a logical address ordering of first and second access lines used to access first and second portions of corresponding rows.
Higgins teaches logical-to-physical address mapping at the page or word line level (FIG. 2A, 236; ¶ [0141]).
Therefore, Chong as modified by Min and Higgins teaches a logical address ordering of first access lines (Higgins) used to access a first portion of rows is different (Chong) relative to a logical address ordering of second access lines (Higgins) used to access a second portion of the corresponding rows (Chong).
Regarding claim 14, Chong as modified by Min teaches the limitations of claim 9.
Chong further teaches in FIG. 1E and ¶ [0029] different word lines may be selected in left and right arrays.
Chong does not teach a logical row ordering of access lines.
Higgins teaches logical-to-physical address mapping at the page or word line level (FIG. 2A, 236; ¶ [0141]).
Therefore, Chong as modified by Min and Higgins teaches a logical row ordering of access lines (Higgins) on a first side of the drivers is different (Chong) from a logical row ordering of access lines (Higgins) on a second opposite side of the drivers (Chong).
Regarding claims 3, 11, and 14, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Higgins into the method of Chong to include logical-to-physical addressing of word lines in a memory array. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of wear leveling (Higgins, ¶ [0045-0053]).
18. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Min, et al (US 5155700 A), hereinafter Min, and further in view of Houston, et al (US 4980860 A), hereinafter Houston.
Regarding claim 13, Chong as modified by Min teaches the limitations of claim 9.
Chong does not teach each crossover comprises at least one via or bridge and permits a first access line to physically cross at least one second access line.
Houston teaches using vias to allow complementary pairs to cross over one another (FIG. 5, vias 88, 90; Col. 5, l. 58 – Col. 6, l. 3). Therefore, Chong as modified by Min and Houston teaches each crossover comprises at least one via or bridge and permits a first access line to physically cross at least one second access line.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Houston into the method of Chong to include using vias to create signal crossover routings. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of routing signals in a crossed manner without an electrical connection between them (Houston, Col. 6, ll. 4-9).
19. Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Higgins, et al (US 20150347229 A1), hereinafter Higgins.
Regarding independent claim 15, Chong teaches a memory device (FIG. 1A, including macro 100) comprising:
a plurality of drivers (FIG. 1A, 104) connected to wordlines (FIG. 1A, WL; FIG. 1C, 126, 128); and
two portions of memory cells configured for access using the drivers (FIG. 1A, arrays 102a, 102b; ¶ [0014], [0017]), wherein each driver powers a respective wordline in each portion (FIGS. 1A, 1E; ¶ [0015]).
Chong does not explicitly teach the wordlines are configured with non-aligned logical-to-physical addressing.
Higgins teaches logical-to-physical address mapping at the page or word line level (FIG. 2A, 236; ¶ [0141]).
Chong further teaches in FIG. 1E and ¶ [0029] different word lines may be selected in left (WLL1) and right (WLR1021) arrays.
Therefore, Chong as modified by Higgins teaches the wordlines are configured with non-aligned logical-to-physical addressing.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Higgins into the method of Chong to include logical-to-physical addressing of word lines in a memory array. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of wear leveling (Higgins, ¶ [0045-0053]).
Regarding claim 16, Chong as modified by Higgins teaches the limitations of claim 15.
Chong further teaches when a first logical row having first and second wordlines is activated using a first driver of the drivers, each of the other drivers is configured to power no more than a single one of the wordlines adjacent to the first and second wordlines (FIG. 1C and ¶ [0026] illustrate the mappings of address bits to word lines and associated drivers; FIGS. 1E and 1F illustrate that a single bit-string-array may reference wordlines that are in the same or in different numbered rows of memory arrays 102a and 102b (¶ [0031]); the methods of FIGS. 2-4 each select no more than one wordline at a time in each of arrays 102a and 102b; therefore, no more than “a single one of the wordlines adjacent to the first and second wordlines” are selected).
20. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Higgins, et al (US 20150347229 A1), hereinafter Higgins, and further in view of Bode (US 20090027972 A1).
Regarding claim 17, Chong as modified by Higgins teaches the limitations of claim 15.
Chong does not teach the non-aligned logical-to-physical addressing is implemented using one or more multiplexers connecting the drivers to the wordlines.
Bode teaches multiple wordlines may be multiplexed onto the output of a single wordline driver (¶ [0077]).
Therefore, Chong as modified by Higgins and Bode teaches the non-aligned logical-to-physical addressing is implemented using one or more multiplexers connecting the drivers to the wordlines.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Bode into the method of Chong to include multiplexing multiple wordlines onto the output of a single wordline driver. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of enabling wordline driver reuse (Bode, ¶ [0077]).
21. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Higgins, et al (US 20150347229 A1), hereinafter Higgins, and further in view of Lee, et al (US 20220277778 A1), hereinafter Lee.
Regarding claim 18, Chong as modified by Higgins teaches the limitations of claim 15.
Chong does not teach the memory device of claim 15 further comprises a controller configured to activate a first row in response to receiving a command from a host device, wherein first and second wordlines of the first row are charged by a first driver.
Lee teaches a controller (FIG. 1, 160; ¶ [0038]) configured to activate a first row (FIG. 2, e.g., row coupled to WL1) in response to receiving a command from a host device (FIG. 1, CMD), wherein wordlines of the first row are charged by a first driver (¶ [0006] teaches “In response to receiving a first row address together with a first command, the row decoder is configured to precharge a first wordline corresponding to the first row address from among the wordlines.”).
Chong teaches a first row may include “first” and “second” wordlines corresponding to a first row address (FIG. 1F, WLL1, WLR1; ¶ [0030]).
Therefore, Chong as modified by Higgins and Lee teaches the memory device of claim 15 further comprises a controller configured to activate a first row in response to receiving a command from a host device, wherein first and second wordlines of the first row are charged by a first driver.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lee into the method of Chong to include a controller configured to receive commands from a host device. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of enabling the memory macro of Chong to be used in an embedded system (Lee, FIG. 15, ¶ [0156-0159]).
22. Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Higgins, et al (US 20150347229 A1), hereinafter Higgins, further in view of Lee, et al (US 20220277778 A1), hereinafter Lee, and further in view of Kim, et al (US 20060044921 A1), hereinafter Kim.
Regarding claim 19, Chong as modified by Higgins and Lee teaches the limitations of claim 18.
Chong does not teach a third wordline adjacent to the first wordline is discharged by a second driver, and a fourth wordline adjacent to the second wordline is discharged by a third driver.
Kim teaches drivers associated with wordlines adjacent (FIG. 7, driver 24E of unselected wordline WL1) to the selected wordline (FIG. 7, driver 24A of selected wordline WL0) are used to create a discharge path both for the adjacent wordlines and the selected wordline (FIG. 7, through transistor 38E, which is coupled directly to adjacent wordline WL1 and capacitively coupled to selected wordline WL0; see ¶ [0030-0031]).
Chong as modified by Higgins, Lee, and Kim would use the drivers associated with adjacent wordlines in the left and right memory arrays to create a discharge path for the adjacent wordlines. Therefore, Chong as modified by Higgins, Lee, and Kim teaches a third wordline adjacent to the first wordline is discharged by a second driver, and a fourth wordline adjacent to the second wordline is discharged by a third driver.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Kim into the method of Chong to include creating a discharge path for adjacent and selected wordlines through the “large transistor” of the associated wordline driver. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of providing a stronger path to ground such that increases in the coupling noise between active and inactive wordlines can be more effectively reduced and/or eliminated (Kim, FIG. 7, ¶ [0031]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY COON whose telephone number is (571)270-0740. The examiner can normally be reached M-F 8am-5pm (Eastern).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, AMIR ZARABIAN can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/B.S.C./Examiner, Art Unit 2827
/AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827