DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. This office action is in response to the Amendment filed on April 20, 2026.
Claims 6-7 are amended. Claims 17 and 20 are canceled. No claims are added.
Objections to the drawings are withdrawn because Applicant has canceled claims 17 and 20 related to the objections.
Applicant’s amendments to claims 6-7 overcome the 112(b) rejection set forth in the previous office action and therefore the 112(b) rejection of claims 6-7 is withdrawn. The 112(b) rejection of claim 20 is withdrawn because Applicant has canceled claim 20.
Response to Arguments
3. Applicant’s arguments, see pages 1-3, filed April 20, 2026, with respect to claim 1, have been fully considered and are persuasive. The rejection of claim 1 under 35 USC § 103 has been withdrawn.
Applicant asserts instead of teaching per-row non-alignment (e.g., using driver-output crossover routing), Chong (US 20200133850 A1) depicts non-alignment only when two different rows are selected in the left and right arrays (not a single-row pair). Examiner concurs and therefore the rejections of claim 1 and its dependent claims are withdrawn.
4. Applicant’s arguments, see pages 3-5, filed April 20, 2026, with respect to claim 9, have been fully considered but they are not persuasive.
Applicant asserts Min’s (US 5155700 A) “cross-over” and twisting occur “in the middle area” (strapping area) of the array routing and are intended to change adjacency within the wordline group to reduce coupling and that Min does not disclose or suggest, for example, reordering logical-to-physical connections across patches so that each row’s left and right wordlines are not aligned with each other.
Crossovers (e.g., vias and bridges) are common design elements used to facilitate layout (see, e.g., Min, Abstract). Also, according to MPEP § 2145(X)(C), a teaching, suggestion, or motivation to combine references that is found in the prior art is an appropriate rationale for determining obviousness. That Applicant’s motivation may differ from the prior art’s motivation to combine does not render the prior art’s motivation inappropriate. Therefore, Applicant’s argument is unpersuasive and the rejections of claim 9 and its dependent claims are maintained.
5. Applicant’s arguments, see pages 5-8, filed April 20, 2026, with respect to claim 15, have been fully considered and are persuasive. The rejection of claim 15 under 35 USC § 103 has been withdrawn.
Examiner’s previous understanding of “non-aligned logical-to-physical addressing” was that the logical and physical addresses need not be “aligned” (or the same – e.g., a logical word line may be assigned to different physical left and right word lines). However, Applicant’s arguments clarify “The claimed ‘non-aligned logical-to-physical addressing’ is, for example, a structural arrangement at the level of driver-to-wordline routing (e.g., driver-output crossovers) that enforces, for the logical row pairs accessed across the two portions, that the left and right wordlines used for the same logical row are not aligned (e.g., across the driver bank).”
Applicant further submits Chong discloses that a single address string may select wordlines in the same or different numbered rows, but its “not aligned” embodiment arises only when different rows are selected in the two arrays (not the claimed per-row pair for the same logical row), and nothing in Chong teaches or suggests re-mapping driver outputs so that, for each logical row pair, the left and right wordlines are not aligned across the driver bank. Examiner concurs and therefore the rejections of claim 15 and its dependent claims are withdrawn.
Claim Rejections - 35 USC § 103
6. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
7. Claims 9-10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Min, et al (US 5155700 A), hereinafter Min.
Regarding independent claim 9, Chong teaches an apparatus (¶ [0043]) comprising:
a plurality of drivers (FIG. 1A, 104); and
a plurality of access lines (FIG. 1A, WL; FIG. 1C, 126, 128).
Chong does not teach a plurality of crossovers connecting outputs of the drivers to the plurality of access lines.
Min teaches a plurality of crossovers in the word line layouts (FIGS. 2, 3A; Abstract).
Therefore, Chong as modified by Min teaches a plurality of crossovers connecting outputs of the drivers to the plurality of access lines.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Min into the method of Chong to include an array method of the word line drivers, for example, arranging word lines in a group to provide a cross-over or to twist the word lines (Min, Abstract). The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of reducing the pitch between the word line drivers and so that the layout of the semiconductor memory array may be easily accomplished (Min, Abstract).
Regarding claim 10, Chong as modified by Min teaches the limitations of claim 9.
Chong further teaches a controller (FIG. 1A, 115; ¶ [0016]) configured to control an address decoder (FIG. 1A, 108; ¶ [0017]), which in turn controls wordline drivers (FIG. 1A, 104; ¶ [0017]).
Min further teaches applying voltages to the access lines when accessing a memory array (Col. 1, ll. 45-55; Col. 2, ll. 6-22).
Therefore, Chong as modified by Min teaches a controller configured to cause the drivers to apply voltages to the access lines when accessing a memory array.
Regarding claim 12, Chong as modified by Min teaches the limitations of claim 9.
Chong further teaches two of the access lines are driven to access a first row, and the two access lines are located on opposite sides of the drivers (Chong teaches in FIG. 1F and ¶ [0030] two word lines on opposite sides of the drivers (WLL1 and WLR1) to access a “first row” in each array).
8. Claims 11 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Min, et al (US 5155700 A), hereinafter Min, and further in view of Higgins, et al (US 20150347229 A1), hereinafter Higgins.
Regarding claim 11, Chong as modified by Min teaches the limitations of claim 9.
Chong further teaches in FIG. 1E and ¶ [0029] different word lines may be selected in left and right arrays.
Chong does not teach a logical address ordering of first and second access lines used to access first and second portions of corresponding rows.
Higgins teaches logical-to-physical address mapping at the page or word line level (FIG. 2A, 236; ¶ [0141]).
Therefore, Chong as modified by Min and Higgins teaches a logical address ordering of first access lines (Higgins) used to access a first portion of rows is different (Chong) relative to a logical address ordering of second access lines (Higgins) used to access a second portion of the corresponding rows (Chong).
Regarding claim 14, Chong as modified by Min teaches the limitations of claim 9.
Chong further teaches in FIG. 1E and ¶ [0029] different word lines may be selected in left and right arrays.
Chong does not teach a logical row ordering of access lines.
Higgins teaches logical-to-physical address mapping at the page or word line level (FIG. 2A, 236; ¶ [0141]).
Therefore, Chong as modified by Min and Higgins teaches a logical row ordering of access lines (Higgins) on a first side of the drivers is different (Chong) from a logical row ordering of access lines (Higgins) on a second opposite side of the drivers (Chong).
Regarding claims 11 and 14, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Higgins into the method of Chong to include logical-to-physical addressing of word lines in a memory array. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of wear leveling (Higgins, ¶ [0045-0053]).
9. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Chong, et al (US 20200133850 A1), hereinafter Chong, in view of Min, et al (US 5155700 A), hereinafter Min, and further in view of Houston, et al (US 4980860 A), hereinafter Houston.
Regarding claim 13, Chong as modified by Min teaches the limitations of claim 9.
Chong does not teach each crossover comprises at least one via or bridge and permits a first access line to physically cross at least one second access line.
Houston teaches using vias to allow complementary pairs to cross over one another (FIG. 5, vias 88, 90; Col. 5, l. 58 – Col. 6, l. 3). Therefore, Chong as modified by Min and Houston teaches each crossover comprises at least one via or bridge and permits a first access line to physically cross at least one second access line.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Houston into the method of Chong to include using vias to create signal crossover routings. The ordinary artisan would have been motivated to modify Chong in the above manner for the purpose of routing signals in a crossed manner without an electrical connection between them (Houston, Col. 6, ll. 4-9).
Allowable Subject Matter
10. Claims 1 and 15 are allowed.
11. The following is a statement of reasons for the indication of allowable subject matter.
Regarding claim 1, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of wherein access lines of each pair are not aligned with each other. Claims 2-8 depend on claim 1.
Regarding claim 15, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of wherein the wordlines are configured with non-aligned logical-to-physical addressing. Claims 16 and 18-19 depend on claim 15.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY COON whose telephone number is (571)270-0740. The examiner can normally be reached M-F 8am-5pm (Eastern).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, AMIR ZARABIAN can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/B.S.C./Examiner, Art Unit 2827
/AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
Prosecution Insights