DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I in the reply filed on 8/11/26 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-8, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al US 2024/0107767 and further in view of Lim US 2021/0280599.
Pertaining to claim 1, Kim teaches a semiconductor device, comprising:
an array region I see Figures 1, 2, 4 and [0033];
a connection region II see Figures 1, 2, 4 and [0033];
a stack of conductive layers 752/754/756 and insulating layers 315 alternating with each other along a first direction D1 See Figure 4;
a gate line structure 625 comprising at least a first segment and a second segment, wherein the gate line structure extends along a second direction D2 perpendicular to the first direction D1 [0073] see Figure 2; and
an isolation structure 330 separating the first segment 625 from the second segment 625 see Figure 2,
Kim fails to teach wherein a size of the isolation structure in a third direction is same as a size of the first segment in the third direction, the third direction being perpendicular to the first direction and the second direction. Lim teaches in an analogous art wherein a size of the isolation structure IP1 in a third direction X is same as a size of the first segment WT1 in the third direction [0074], the third direction being perpendicular to the first direction Z and the second direction Y see Figure 2 [0074]. It would have been within the scope of one of ordinary skill in the art at the time the invention was filed to combine the teachings of Kim and Lim to enable the isolation step of Kim to be performed according to the teachings of Lim because one of ordinary skill in the art at the time the invention was filed would have been motivated to look to alternative suitable methods of performing the disclosed isolation step of Kim and art recognized suitability for an intended purpose has been recognized to be motivation to combine. MPEP § 2144.07.
Pertaining to claim 2, Kim in view of Lim teaches the semiconductor device of claim 1, wherein a size of the isolation structure IP1 in the second direction is smaller than a size of the first segment in the second direction (Y), the size of the isolation structure in the third direction is the same as a size of the second segment in the third direction (X). Lim teaches, in [0074], that the isolation structure IP1 has a dimension that is the same as the second segment (W12 = W11) and W22 is smaller than the length of WT1 in the Y direction. See Figure 2 of Lim marked up below
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626
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Pertaining to claim 3, Kim in view of Lim teaches the semiconductor device of claim 2, wherein the isolation structure 330 (Kim) extends through the stack along the first direction D1 see Figure 2, the isolation structure 330 is between dummy channel structures 464 along the third direction, a part of at least one insulating layer 315 of the stack separates the isolation structure and the dummy channel structures from each other along the third direction D3, the gate line structure extends through the stack along the first direction, and the gate line structure 625extends into the array region I and the connection region II along the second direction D2 see Figure 2.
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808
636
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Pertaining to claim 3, Kim in view of Lim teaches the semiconductor device of claim 1, wherein the isolation structure comprises a first sidewall in contact with the first segment and a second sidewall in contact with the second segment, the first sidewall and the second sidewall each have a concave surface extending along the first direction, the isolation structure comprises a third sidewall and a fourth sidewall in contact with the stack along the third direction, and the third sidewall and the fourth sidewall each comprise a series of curved portions.
See Figure 3 of Lim
Pertaining to claim 5, Kim in view of Lim teaches the semiconductor device of claim 1, wherein a bottom of the isolation structure comprises a series of bases arranged in a line along the second direction, a size of a first cross section of each base of the series of bases is greater than a size of a second cross section of the base, the first cross section and the second cross section are perpendicular to the first direction, and the first cross section is closer to the stack than the second cross section along the first direction. “base” is far too broad such that the bottom of the isolation structure can be subdivided to include portions that can be called a “base” in the shape as described. It is suggested that “base” be defined such that it imparts a specific shape or configuration. Since Lim and Kim both teach isolation structures, they both teach the limitations found in this claim, namely, an isolation structure with a series of bases arranged along the second direction.
Pertaining to claim 6, Kim in view of Lim teaches the semiconductor device of claim 1, wherein the first segment is in the array region, the second segment and the isolation structure are in the connection region. See Kim Figure 2, 625 extends in both regions I and II (II being the connection region where the isolation structure 330 is located)
Pertaining to claim 7, Kim in view of Lim teaches the semiconductor device of claim 1, wherein the first segment, the second segment, and the isolation structure are in the array region. Lim teaches in Figure 2 that the isolation structure and the first/second line segments can be present in both regions (EXT / CAR)
Pertaining to claim 8, Kim in view of Lim teaches the semiconductor device of claim 1, wherein the isolation structure comprises a dielectric material. Both Kim (330 [0074]) and Lim (IP1 [0065]) teach that the isolation structure is dielectric
Pertaining to claim 20, Kim in view of Lim teaches a memory system, comprising:
a memory device Lim teaches a memory device (see Title, Abstract and Summary) Kim also teaches a memory device (See Abstract); and
a memory controller coupled to the memory device and configured to control the memory device See Kim element 1200 [0211] and also Lim [0119], wherein the memory device comprises:
See the rejection of claim 1 above for the remaining limitations and motivation to combine
an array region;
a connection region;
a stack of conductive layers and insulating layers alternating with each other along a first direction;
a gate line structure comprising at least a first segment and a second segment, wherein the gate line structure extends along a second direction perpendicular to the first direction; and
an isolation structure separating the first segment from the second segment, wherein a size of the isolation structure in a third direction is same as a size of the first segment in the third direction, the third direction being perpendicular to the first direction and the second direction.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim/Lim as applied to claim 1 above and further in view of Lee US 2018/0130814.
Pertaining to claim 9, Kim/Lim teaches the semiconductor device of claim 1, but fail to teach wherein the isolation structure comprises an inner structure and an outer layer surrounding the inner structure, and the inner structure and the outer layer comprise different materials. Lee teaches an isolation structure in an analogous art that comprises an inner structure 133 and an outer layer 121 surrounding the inner structure See Figure 1. It would have been within the scope of one of ordinary skill in the art at the time the invention was filed to combine the teachings of Kim/Lim and Lee to enable the isolation formation step of Kim/Lim to be performed according to the teachings of Lee because one of ordinary skill in the art at the time the invention was filed would have been motivated to look to alternative suitable methods of performing the disclosed isolation step of Kim/Lim and art recognized suitability for an intended purpose has been recognized to be motivation to combine. MPEP § 2144.07.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS J TOBERGTE whose telephone number is (571)272-6458. The examiner can normally be reached M-F 7:30-4:30.
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/NICHOLAS J TOBERGTE/Primary Examiner, Art Unit 2817
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