DETAILED ACTION
This action is in response to the application filed 07/25/2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 1 objected to because of the following informalities:
Regarding claim 1, it appears “each of the plurality of switch components” (line 4) should read “the plurality of switch components”.
Regarding claim 1, it appears that “the number of switch components in the buck-boost mode” should read “a number of switch components in the buck-boost mode”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4 are rejected under 35 U.S.C. 102(A)(1) & (2) as being anticipated by US Doc ID US20120049816A1 (Hereinafter Hester).
Regarding claim 1, Hester discloses a power converter [e.g. Fig. 3, element 300] having an on-time compensation mechanism [e.g. paragraph 0007, “wherein the control circuitry adjusts phase relationships between corresponding boost switches and buck switching in bridge mode to reduce ripple current in the buck-boost switching regulator”], comprising: a switch circuit [e.g. Fig. 3, element 100] including a plurality of switch components [e.g. Fig. 3, elements S1-S4], wherein each of the plurality of switch components includes: a first switch [e.g. Fig. 3, element S1], wherein a first terminal of the first switch [e.g. Fig. 3, connection between S1 and Vin] as an input node is coupled with an input voltage [e.g. Fig. 3, element Vin]; a second switch [e.g. Fig. 3, element S2], wherein a first terminal of the second switch is connected to a second terminal of the first switch [e.g. Fig. 3, connection between S1 and S2], a node between the first terminal of the second switch and the second terminal of the first switch is connected to a first terminal of an inductor [e.g. Fig. 3, connection between S1, S2, and element L], and a second terminal of the second switch is grounded [e.g. Fig. 3, connection between ground and S2]; and a third switch [e.g. Fig. 3, element S4], wherein a first terminal of the third switch as an output node is connected to an output terminal of the power converter [e.g. Fig. 3, connection between Vout and S4], and a voltage at the output node is used as an output voltage of the power converter [e.g. Fig. 3, element Vout]; and a fourth switch [e.g. Fig. 3, element S3], wherein a first terminal of the fourth switch is connected to a second terminal of the third switch [e.g. Fig. 3, connection between S3 and S4], a node between the first terminal of the fourth switch and the second terminal of the third switch is connected to a second terminal of the inductor [e.g. Fig. 3, connection between S3, S4, and L], and a second terminal of the fourth switch is grounded [e.g. Fig. 3, connection between ground and S3]; and a control circuit [e.g. Fig. 3, elements R1, R2, 308, 304, and 306] connected to a control terminal of each of the plurality of switch components [e.g. Fig. 3, connection between 304 and the control terminals of S1-S4], the input node [e.g. Fig. 3, connection between Vin and 304] and the output node [e.g. Fig. 3, connection between Vout and R1]; wherein the control circuit switches the switch circuit to change the input voltage and the output voltage such that the power converter switches between a buck mode, a buck-boost mode and a boost mode [e.g. paragraph 0007, “buck-boost switching regulator is adapted to operate in a buck mode, boost mode, and bridge mode”; paragraph 0004, “bridge mode or buck-boost mode”]; wherein the control circuit compensates on-times [e.g. paragraph 0028, “For conventional bridge switching or buck-boost operation modes, pairs of switches S 1 /S 3 or S 2 /S 4 are switched on and off at about the same time”] of a number of the plurality of switch components [e.g. Fig. 1, elements S1 & S2] operating in the buck mode according to an on-time of one of the plurality of switch components [e.g. Fig. 3, elements S3 & S4] operating in the boost mode [e.g. Fig. 3, elements S3 & S4], and the control circuit controls on-times of the number of the plurality of switch components [e.g. Fig. 3, elements S1-S4] in the buck-boost mode to equal to the on-times that are compensated, respectively [The on-time of S2 is determined by the on-time of S3 as they are turned on and off at the same time.].
Regarding claim 2, Hester discloses the power converter according to claim 1 [e.g. Fig. 3, element 300], wherein, in the buck mode, the control circuit complementarily switches the first switch and the second switch, continually turns on the third switch, and continually turns off the fourth switch [e.g. paragraph 0003, “In buck mode, switches S 4 and S 3 are closed and open, respectively, while pulse width modulation (PWM) signals are provided to switches S 1 and S 2”].
Regarding claim 3, Hester discloses the power converter according to claim 1 [e.g. Fig. 3, element 300], wherein, in the boost mode, the control circuit complementarily switches the third switch and the fourth switch, continually turns on the first switch, and continually turns off the second switch [e.g. paragraph 0003, “in boost mode, switches S 1 and S 2 are closed and open, respectively, while PWM signals are provided to switches S 3 and S 4”].
Regarding claim 4, Hester discloses the power converter according to claim 1 [e.g. Fig. 3, element 300], wherein, in the buck-boost mode, the control circuit complementarily switches the first switch, the second switch, the third switch and the fourth switch [e.g. paragraph 0028, “For conventional bridge switching or buck-boost operation modes, pairs of switches S 1 /S 3 or S 2 /S 4 are switched on and off at about the same time”].
Allowable Subject Matter
Claim 5-19 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
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US20100019745A1 - Keskar; Neeraj Arun - Multiple switch node power converter control scheme that avoids switching sub-harmonics
US20180041125A1 - Vinciarelli; Patrizio - REDUCING SWITCHING LOSSES IN POWER CONVERTERS
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/MONICA LEWIS/Supervisory Patent Examiner, Art Unit 2838
/JARED RAYMOND HAUSMAN/Examiner, Art Unit 2838