Prosecution Insights
Last updated: October 04, 2026
Application No. 18/785,386

MIM CAPACITOR STRUCTURE OF IMAGE SENSOR AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103
Filed
Jul 26, 2024
Priority
May 27, 2024 — RE 10-2024-0068308
Examiner
FOX, BRANDON C
Art Unit
Tech Center
Assignee
Db Hitek Co. Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
703 granted / 821 resolved
+25.6% vs TC avg
Moderate +10% lift
Without
With
+10.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
22 currently pending
Career history
839
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
60.5%
+20.5% vs TC avg
§102
30.8%
-9.2% vs TC avg
§112
5.9%
-34.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 821 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This is a Non-Final office action based on application 18/785,386 filed July 26, 2024. Claims 1-20 are currently pending and have been considered below. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-9, 11-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhou (Pre-Grant Publication 2015/0357397). Regarding claim 1, Zhou discloses a capacitor structure comprising: a first capacitor metal layer (Fig. 3a, 31); a first intermetallic insulating film (71) disposed on the first capacitor metal layer; a second capacitor metal layer (32) disposed on the first intermetallic insulating film; a second intermetallic insulating film (72) disposed on the second capacitor metal layer to cover the second capacitor metal layer; and a third capacitor metal layer (33) disposed on the second intermetallic insulating film, wherein at least one side of the third capacitor metal layer is extending longer than a corresponding side of the second capacitor metal layer (Fig. 3a & 3b). Regarding claim 2, Zhou further discloses: the third capacitor metal layer (33) has a larger area than an area of the second capacitor metal layer (32) (Fig. 3b). Regarding claim 3, Zhou further discloses: all sides of the third capacitor metal layer are respectively extending longer than corresponding sides of the second capacitor metal layer (Fig. 3b). Regarding claim 4, Zhou further discloses: the third capacitor metal layer (33) comprises a bent portion extending downward on the at least one side of the third capacitor metal layer so that the bent portion at least partially surrounds the corresponding side of the second capacitor metal layer (32) (Fig. 3a) Regarding claim 5, Zhou further discloses: the bent portion has a vertical length to laterally overlap the corresponding side of the second capacitor metal layer (Fig. 3a) Regarding claim 6, Zhou further discloses: the bent portion is spaced apart from the corresponding side of the second capacitor metal layer facing the bent portion by the second intermetallic insulating film (72). Regarding claim 7, Zhou further discloses: top metal layers (M2) connected to the first capacitor metal layer, the second capacitor metal layer, and the third capacitor metal layer, respectively. Regarding claim 8, Zhou discloses a capacitor structure comprising: a first capacitor metal layer (Fig. 4a, 41); a first intermetallic insulating film (71) disposed on the first capacitor metal layer; a second capacitor metal layer (42) disposed on the first intermetallic insulating film; a second intermetallic insulating film (72) disposed on the second capacitor metal layer; a third capacitor metal layer (43) disposed on the second intermetallic insulating film; a third intermetallic insulating film (73) disposed on the third capacitor metal layer to cover the third capacitor metal layer; and a fourth capacitor metal layer (44) disposed on the third intermetallic insulating film, wherein at least one side of the fourth capacitor metal layer is extending longer than a corresponding side of the third capacitor metal layer (Fig. 4a/4d). Regarding claim 9, Zhou further discloses: the second capacitor metal layer (42) has a smaller width than a width of the first capacitor metal layer (41)(Fig. 4d). Regarding claim 11, Zhou further discloses: each of the at least one side of the fourth capacitor metal layer (44) covers one side of the third capacitor metal layer (43) (Fig. 4a/4d) Regarding claim 12, Zhou further discloses: the fourth capacitor metal layer has a portion extending downward from a lower side of each of the at least one side of the fourth capacitor metal layer and facing the one side of the third capacitor metal layer adjacent thereto (Fig. 4a) Regarding claim 13, Zhou further discloses: the fourth capacitor metal layer covers all sides of the third capacitor metal layer (Fig. 4d) Regarding claim 14, Zhou further discloses: a plurality of top metal layers (M2) spaced apart from each other above the fourth capacitor metal layer, wherein each of the first, second, third, and fourth capacitor metal layers is electrically connected to each of the plurality of top metal layers by each contact (V1, V2, V3, & V4). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhou (Pre-Grant Publication 2015/0357397). Regarding claim 10, Zhou disclose all of the limitations of claim 9 (addressed above). Although Zhou does not explicitly the third capacitor metal layer has a smaller width than a width of the second capacitor layer. Zhou discloses several different configurations of widths/sizes of the first-fourth metal layer (See Fig. 4b-4e) therefore it would have been obvious to form a configuration wherein the third capacitor metal has a width smaller than the second capacitor metal layer since widths/sizes of the inner metal layer may improve capacitance density (Paragraph [0006 & 0067]). Claim(s) 15-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhou (Pre-Grant Publication 2015/0357397) in view of Kageyama (Pre-Grant Publication 2012/0199946). Regarding claim 15, 18 & 19, Zhou discloses a capacitor structure comprising: depositing a first insulating film (Fig. 4a, 41) on a first metal layer (41), a second metal layer (42), on the first insulating film, a second insulating film (72) on the second metal layer, and a third metal layer (43) on the second insulating film; the third metal layer (43) forming a first capacitor layer depositing a third insulating film (73) on the second insulating film to cover the first capacitor metal layer, and depositing a fourth metal layer (44) on the third insulating film; and the fourth metal layer (44) forming a second capacitor layer, wherein one side of the second capacitor metal layer is extending longer than a corresponding side of the first capacitor metal layer (Fig. 4a/4d). Zhou does not explicitly disclose etching the stack of metal layers to form the first, second, third, and fourth capacitor layers. However Kageyama discloses a capacitor structure comprising: depositing a first insulating film (Fig. 6a-6n., 4) on a first metal layer (3), a second metal layer (33) on the first insulating film, a second insulating film (6) on the second metal layer, and a third metal layer (34) on the second insulating film; forming a first capacitor metal layer (Fig. 6g, 40) by etching the third metal layer (34); depositing a third insulating film (Fig. 6h, 41) on the second insulating film to cover the first capacitor metal layer, and depositing a fourth metal layer (47) on the third insulating film; and forming a second capacitor metal layer (Fig. 6j, 42) on the third insulating film by etching the fourth metal layer (47), wherein one side of the second capacitor metal layer is extending longer than a corresponding side of the first capacitor metal layer. Kageyama further discloses forming a first intermetallic insulating film (41), a second intermetallic insulating film (6), and a third capacitor metal layer (5) by etching the second insulating film (6), the third insulating film (41), and the second metal layer (5) (Fig. 6j-6k; Paragraph [0144]). Forming a third intermetallic insulating film (4) and a fourth capacitor metal layer (3) by etching the first insulating film (4) and the first metal layer (3)(Fig. 6j-6k; Paragraph [0144]). It would have been obvious to those having ordinary skill in the art at the time of invention to etching the metal layers and insulating layer because the etching process will serve to form a MIM capacitor structure having high capacitance capable of withstanding high voltage (Paragraph [0025]). Regarding claim 16, Zhou further discloses: the third insulating film (73) has a step shape (Fig. 4a). Regarding claim 17, Zhou further discloses: the second capacitor metal layer (44) is formed to cover one side of the first capacitor metal layer (43) (Fig. 4a/4d). Regarding claim 20, Zhou further discloses: The fourth capacitor metal layer (41) has a larger width than a width of the third capacitor metal layer (42) (Fig. 4d). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Jo (Pre-Grant Publication 2023/0012211) discloses a method of forming a trench capacitor including multiple stacked capacitor electrodes. Park (Pre-Grant Publication 2020/0258976) discloses a semiconductor device comprising a multilayer capacitor including a capacitor electrode extending beyond sidewalls of other electrodes and forming stepped electrodes. Kwong (US Patent 9,082,555) disclose a staircase capacitor structure comprising a stacked of first-fourth capacitor electrodes forming multiple capacitors. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRANDON C FOX whose telephone number is (571)270-5016. The examiner can normally be reached M-F 9:00AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff W Natalini can be reached at 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRANDON C FOX/Examiner, Art Unit 2818 /DAVID VU/Primary Examiner, Art Unit 2818
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Prosecution Timeline

Jul 26, 2024
Application Filed
Sep 10, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
96%
With Interview (+10.1%)
2y 4m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 821 resolved cases by this examiner. Grant probability derived from career allowance rate.

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