Prosecution Insights
Last updated: July 17, 2026
Application No. 18/785,912

MANAGING COMPENSATION FOR CELL-TO-CELL COUPLING AND LATERAL MIGRATION IN MEMORY DEVICES USING SEGMENTATION

Non-Final OA §DP
Filed
Jul 26, 2024
Priority
Aug 09, 2022 — continuation of 12/087,374
Examiner
TRAN, MICHAEL THANH
Art Unit
Tech Center
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
96%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 96% — above average
96%
Career Allowance Rate
1445 granted / 1509 resolved
+35.8% vs TC avg
Minimal +0% lift
Without
With
+0.4%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 7m
Avg Prosecution
30 currently pending
Career history
1531
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
19.7%
-20.3% vs TC avg
§102
48.2%
+8.2% vs TC avg
§112
1.6%
-38.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1509 resolved cases

Office Action

§DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION In response to the Communications dated July 26, 2024, claims 1-20 are active in this application. Specification If there are cross-reference to related applications, please include the respective patent numbers, if known. Information Disclosure Statement The information disclosure statements filed January 30, 2025 have been considered. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claims 1 -8 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 -8 of U.S. Patent No. 12087374 [‘374]. Although the claims at issue are not identical, they are not patentably distinct from each other because of the following reason. The subject matter claimed in the instant application is fully disclosed in the patent and is covered by the patent since the patent and the application are claiming common subject matter, as follows. Present Application Patent ‘374 1. A system comprising: a memory device comprising a plurality of memory cells each associated with corresponding wordlines of a plurality of wordlines on a block of the memory device, wherein each wordline has a corresponding default program verify (PV) voltage for each respective programming level of a memory cell; and a processing device, operatively coupled with the memory device, to perform operations comprising: determining, for each wordline group of one or more wordline groups of the plurality of wordlines, a target adjustment to a parameter of a memory access operation that is performed with respect to a memory cell associated with a wordline of the wordline group; and responsive to determining that an aggregate read window budget (RWB) increase for the block satisfies a threshold range associated with a target RWB increase, modifying the parameter of the memory access operation according to the target adjustment, wherein the target RWB increase is determined using a different PV voltage offset for each respective programming level of the memory cell associated with the wordline of the wordline group. 1. A system comprising: a memory device comprising a plurality of memory cells each associated with corresponding wordlines of a plurality of wordlines on a block of the memory device, wherein each wordline has a corresponding default program verify (PV) voltage for each respective programming level of a memory cell; and a processing device, operatively coupled with the memory device, to perform operations comprising: determining, for a wordline of the plurality of wordlines, a target read window budget (RWB) increase, wherein the target RWB increase corresponds to a maximum RWB increase associated with using a different PV voltage offset for each respective programming level of a memory cell; segmenting the plurality of wordlines into one or more wordline groups, wherein each wordline group comprises one or more wordlines; determining, for each wordline group, a target adjustment to a parameter of a memory access operation that is performed with respect to a memory cell associated with a wordline of the wordline group; determining an aggregate RWB increase for the block in view of the target adjustment to the parameter of the memory access operation; determining that the aggregate RWB increase for the block satisfies a threshold range associated with the target RWB increase; and modifying the parameter of the memory access operation according to the target adjustment. 2. The system of claim 1, wherein the operations further comprise: responsive to determining that the aggregate RWB increase for the block does not satisfy the threshold range associated with the target RWB increase, segmenting the one or more wordline groups into one or more sub-wordline groups; determining, for each sub-wordline group, a second target adjustment to the parameter of the memory access operation that is performed with respect to a memory cell connected to a wordline of the sub-wordline group; and responsive to determining that a second aggregate RWB increase for the block satisfies the threshold range associated with the target RWB increase, modifying the parameter of the memory access operation according to the second target adjustment. 2. The system of claim 1, wherein the processing device is to perform operations further comprising: determining that the aggregate RWB increase for the block does not satisfy the threshold range associated with the target RWB increase; responsive to determining that the aggregate RWB increase for the block does not satisfy the threshold range associated with the target RWB increase, segmenting the one or more wordline groups into one or more sub-wordline groups; determining, for each sub-wordline group, a second target adjustment to the parameter of the memory access operation that is performed with respect to a memory cell connected to a wordline of the sub-wordline group; determining a second aggregate RWB increase for the block in view of the second target adjustment to the parameter of the memory access operation; determining that the second aggregate RWB increase for the block satisfies the threshold range associated with the target RWB increase; and modifying the parameter of the memory access operation according to the second target adjustment. 3. The system of claim 1, wherein the operations further comprise: determining the aggregate RWB increase for the block, wherein determining the aggregate RWB increase for the block comprises: determining, for each wordline group, a respective maximum RWB increase; and computing, using the respective maximum RWB increase for each wordline group, a median RWB increase for the block. 3. The system of claim 1, wherein determining the aggregate RWB increase for the block comprises: determining, for each wordline group, a respective maximum RWB increase; and computing, using the respective maximum RWB increase for each wordline group, a median RWB increase for the block. 4. The system of claim 1, wherein the target adjustment to the parameter of the memory access operation compensates for an aggressor memory cell programming level, wherein the aggressor memory cell is adjacent to the memory cell. 4. The system of claim 1, wherein the target adjustment to the parameter of the memory access operation compensates for an aggressor memory cell programming level, wherein the aggressor memory cell is adjacent to the memory cell. 5. The system of claim 1, wherein the target adjustment to the parameter of the memory access operation comprises an adjustment of one or more voltages applied to the memory cell. 5. The system of claim 1, wherein the target adjustment to the parameter of the memory access operation comprises an adjustment of one or more voltages applied to the memory cell. 6. The system of claim 5, wherein determining the target adjustment to the parameter of the memory access operation is based on one or more pre-determined voltage values. 6. The system of claim 5, wherein determining the target adjustment to the parameter of the memory access operation is based on one or more pre-determined voltage values. 7. The system of claim 1, wherein modifying the parameter of the memory access operation comprises adjusting a PV voltage with respect to the memory cell. 7. The system of claim 1, wherein modifying the parameter of the memory access operation comprises adjusting a PV voltage with respect to the memory cell. 8. The system of claim 1, wherein the operations further comprise: segmenting the plurality of wordlines into the one or more wordline groups by associating each wordline group with one or more wordlines based on one or more physical characteristics of the one or more wordlines. 8. The system of claim 1, wherein segmenting the plurality of wordlines into the one or more wordline groups comprises associating each wordline group with the one or more wordlines based on one or more physical characteristics of the one or more wordlines. As can be seen from the above table, both claims, claim 1 of the application and claim 1 of the patent, describe the exact same underlying logic for memory cells and wordlines: Targeting RWB Increases: Both calculate an aggregate Read Window Budget (RWB) increase to satisfy a threshold. Granularity: Both operate at the wordline group level. Parameter Adjustment: Both adjust a parameter for a memory access operation based on achieving this threshold. PV Voltage Offset: Both incorporate the use of a different program verify (PV) voltage offset for respective programming levels. They differ, in that, there are slight semantic differences in how the process steps are recited, however, they represent the same inventive concept presented from a different chronological perspective. The patent describes the method step-by-step: Calculate RWB increase → Segment wordlines into groups → Determine group adjustments → Determine aggregate increase → Verify against threshold → Modify parameter. The application shifts the language to a "conditional" or "responsive" format: Determine adjustments → Respond to threshold verification by modifying parameter → Where the RWB was determined using PV voltage offsets. It is noted that rearranging the dependencies of method steps or adding "wherein" clauses that merely state the inherent result or property of an already defined step does not make the claims patentably distinct. The application is an obvious variation (if not identical) to the patent. Therefore, the patent protections have been granted to the earlier filed patent application. For similar reasons, claims 2-8 are rejected over claims 1-8 of patent ‘374. Claims 9-16 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 9-16 of U.S. Patent No. 12087374 [‘374]. Although the claims at issue are not identical, they are not patentably distinct from each other because of the following reason. The subject matter claimed in the instant application is fully disclosed in the patent and is covered by the patent since the patent and the application are claiming common subject matter, as follows. Present Application Patent ‘374 9. A method comprising: determining, by a processing device operatively coupled with a memory device comprising a plurality of memory cells each associated with corresponding wordlines of a plurality of wordlines on a block of the memory device, for each wordline group of one or more wordline groups of the plurality of wordlines, a target adjustment to a parameter of a memory access operation that is performed with respect to a memory cell associated with a wordline of the wordline group, wherein each wordline has a corresponding default program verify (PV) voltage for each respective programming level of a memory cell; and responsive to determining that an aggregate read window budget (RWB) increase for the block satisfies a threshold range associated with a target RWB increase, modifying the parameter of the memory access operation according to the target adjustment, wherein the target RWB increase is determined using a different PV voltage offset for each respective programming level of the memory cell associated with the wordline of the wordline group. 9. A method comprising: determining, by a processing device operatively coupled with a memory device comprising a plurality of memory cells each associated with corresponding wordlines of a plurality of wordlines on a block of the memory device, for a wordline of the plurality of wordlines, a target read window budget (RWB) increase, wherein each wordline has a corresponding default program verify (PV) voltage for each respective programming level of a memory cell, and wherein the target RWB increase corresponds to a maximum RWB increase associated with using a different PV voltage offset for each respective programming level of a memory cell; segmenting the plurality of wordlines into one or more wordline groups, wherein each wordline group comprises one or more wordlines; determining, for each wordline group, a target adjustment to a parameter of a memory access operation that is performed with respect to a memory cell associated with a wordline of the wordline group; determining an aggregate RWB increase for the block in view of the target adjustment to the parameter of the memory access operation; determining that the aggregate RWB increase for the block satisfies a threshold range associated with the target RWB increase; and modifying the parameter of the memory access operation according to the target adjustment. 10. The method of claim 9, further comprising: responsive to determining that the aggregate RWB increase for the block does not satisfy the threshold range associated with the target RWB increase, segmenting the one or more wordline groups into one or more sub-wordline groups; determining, for each sub-wordline group, a second target adjustment to the parameter of the memory access operation that is performed with respect to a memory cell connected to a wordline of the sub-wordline group; and responsive to determining that a second aggregate RWB increase for the block satisfies the threshold range associated with the target RWB increase, modifying the parameter of the memory access operation according to the second target adjustment. 10. The method of claim 9, further comprising: determining that the aggregate RWB increase for the block does not satisfy the threshold range associated with the target RWB increase; responsive to determining that the aggregate RWB increase for the block does not satisfy the threshold range associated with the target RWB increase, segmenting the one or more wordline groups into one or more sub-wordline groups; determining, for each sub-wordline group, a second target adjustment to the parameter of the memory access operation that is performed with respect to a memory cell associated with a wordline of the sub-wordline group; determining a second aggregate RWB increase for the block in view of the second target adjustment to the parameter of the memory access operation; determining that the second aggregate RWB increase for the block satisfies the threshold range associated with the target RWB increase; and modifying the parameter of the memory access operation according to the second target adjustment. 11. The method of claim 9, further comprising: determining the aggregate RWB increase for the block, wherein determining the aggregate RWB increase for the block comprises: determining, for each wordline group, a respective maximum RWB increase; and computing, using the respective maximum RWB increase for each wordline group, a median RWB increase for the block. 11. The method of claim 9, wherein determining the aggregate RWB increase for the block comprises: determining, for each wordline group, a respective maximum RWB increase; and computing, using the respective maximum RWB increase for each wordline group, a median RWB increase for the block. 12. The method of claim 9, wherein the target adjustment to the parameter of the memory access operation compensates for an aggressor memory cell programming level, wherein the aggressor memory cell is adjacent to the memory cell. 12. The method of claim 9, wherein the target adjustment to the parameter of the memory access operation compensates for an aggressor memory cell programming level, wherein the aggressor memory cell is adjacent to the memory cell. 13. The method of claim 9, wherein the target adjustment to the parameter of the memory access operation comprises an adjustment of one or more voltages applied to the memory cell. 13. The method of claim 9, wherein the target adjustment to the parameter of the memory access operation comprises an adjustment of one or more voltages applied to the memory cell. 14. The method of claim 13, wherein determining the target adjustment to the parameter of the memory access operation is based on one or more pre-determined voltage values. 14. The method of claim 13, wherein determining the target adjustment to the parameter of the memory access operation is based on one or more pre-determined voltage values. 15. The method of claim 9, wherein modifying the parameter of the memory access operation comprises adjusting a PV voltage with respect to the memory cell. 15. The method of claim 9, wherein modifying the parameter of the memory access operation comprises adjusting a PV voltage with respect to the memory cell. 16. The method of claim 9, further comprising: segmenting the plurality of wordlines into the one or more wordline groups by associating each wordline group with one or more wordlines based on one or more physical characteristics of the one or more wordlines. 16. The method of claim 9, wherein segmenting the plurality of wordlines into the one or more wordline groups comprises associating each wordline group with the one or more wordlines based on one or more physical characteristics of the one or more wordlines. As can be seen from the above table, both claims, claim 9 of the application and claim 9 of the patent, describe the exact same underlying logic for memory cells and wordlines: Targeting RWB Increases: Both calculate an aggregate Read Window Budget (RWB) increase to satisfy a threshold. Granularity: Both operate at the wordline group level. Parameter Adjustment: Both adjust a parameter for a memory access operation based on achieving this threshold. PV Voltage Offset: Both incorporate the use of a different program verify (PV) voltage offset for respective programming levels. They differ, in that, there are slight semantic differences in how the process steps are recited, however, they represent the same inventive concept presented from a different chronological perspective. The patent describes the method step-by-step: Calculate RWB increase → Segment wordlines into groups → Determine group adjustments → Determine aggregate increase → Verify against threshold → Modify parameter. The application shifts the language to a "conditional" or "responsive" format: Determine adjustments → Respond to threshold verification by modifying parameter → Where the RWB was determined using PV voltage offsets. It is noted that rearranging the dependencies of method steps or adding "wherein" clauses that merely state the inherent result or property of an already defined step does not make the claims patentably distinct. The application is an obvious variation (if not identical) to the patent. Therefore, the patent protections have been granted to the earlier filed patent application. For similar reasons, claims 10-16 are rejected over claims 9-16 of patent ‘374. Claims 17-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 17-20 of U.S. Patent No. 12087374 [‘374]. Although the claims at issue are not identical, they are not patentably distinct from each other because of the following reason. The subject matter claimed in the instant application is fully disclosed in the patent and is covered by the patent since the patent and the application are claiming common subject matter, as follows. Present Application Patent ‘374 17. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device operatively coupled with a memory device, cause the processing device to perform operations comprising: determining, for each wordline group of one or more wordline groups of a plurality of wordlines, a target adjustment to a parameter of a memory access operation that is performed with respect to a memory cell associated with a wordline of the wordline group, wherein the memory device comprises a plurality of memory cells each associated with corresponding wordlines of the plurality of wordlines on a block of the memory device, and wherein each wordline has a corresponding default program verify (PV) voltage for each respective programming level of a memory cell; and responsive to determining that an aggregate read window budget (RWB) increase for the block satisfies a threshold range associated with a target RWB increase, modifying the parameter of the memory access operation according to the target adjustment, wherein the target RWB increase is determined using a different PV voltage offset for each respective programming level of the memory cell associated with the wordline of the wordline group. 17. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: determining, for a wordline of a plurality of wordlines on a block of a memory device, a target read window budget (RWB) increase, wherein the target RWB increase corresponds to a maximum RWB increase associated with using a different program verify (PV) voltage offset for each respective programming level of a memory cell; segmenting the plurality of wordlines into one or more wordline groups, wherein each wordline group comprises one or more wordlines; determining, for each wordline group, a first target adjustment to a parameter of a memory access operation that is performed with respect to a memory cell associated with a wordline of the wordline group; determining a first aggregate RWB increase for the block in view of the first target adjustment to the parameter of the memory access operation; determining that the first aggregate RWB increase for the block does not satisfy a threshold range associated with the target RWB increase; segmenting the one or more wordline groups into one or more sub-wordline groups; determining, for each of the sub-wordline groups, a second target adjustment to the parameter of the memory access operation that is performed with respect to the memory cell; determining a second aggregate RWB increase for the block in view of the second target adjustment to the parameter of the memory access operation; determining that the second aggregate RWB increase for the block satisfies the threshold range associated with the target RWB increase; and modifying the parameter of the memory access operation according to the second target adjustment. 18. The non-transitory computer-readable storage medium of claim 17, wherein the target adjustment to the parameter of the memory access operation compensates for an aggressor memory cell programming level, wherein the aggressor memory cell is adjacent to the memory cell. 18. The non-transitory computer-readable storage medium of claim 17, wherein, to determine the first aggregate RWB increase, the processing device is to perform operations further comprising: determining, for each wordline group, a respective maximum RWB increase; and computing, using the respective maximum RWB increase for each wordline group, a median RWB increase for the block. 19. The non-transitory computer-readable storage medium of claim 17, wherein the target adjustment to the parameter of the memory access operation comprises an adjustment of one or more voltages applied to the memory cell, and wherein determining the target adjustment to the parameter of the memory access operation is based on one or more pre-determined voltage values. 19. The non-transitory computer-readable storage medium of claim 17, wherein the target adjustment to the parameter of the memory access operation compensates for an aggressor memory cell programming level, wherein the aggressor memory cell is adjacent to the memory cell. 20. The non-transitory computer-readable storage medium of claim 17, wherein modifying the parameter of the memory access operation comprises adjusting a PV voltage with respect to the memory cell. See claim 17. As can be seen from the above table, both claims, claim 17 of the application and claim 17 of the patent, describe the exact same underlying logic for memory cells and wordlines: • Targeting RWB Increases: Both calculate an aggregate Read Window Budget (RWB) increase to satisfy a threshold. • Granularity: Both operate at the wordline group level. • Parameter Adjustment: Both adjust a parameter for a memory access operation based on achieving this threshold. • PV Voltage Offset: Both incorporate the use of a different program verify (PV) voltage offset for respective programming levels. They differ, in that, there are slight semantic differences in how the process steps are recited, however, they represent the same inventive concept presented from a different chronological perspective. • The patent describes the method step-by-step: Calculate RWB increase → Segment wordlines into groups → Determine group adjustments → Determine aggregate increase → Verify against threshold → Modify parameter. • The application shifts the language to a "conditional" or "responsive" format: Determine adjustments → Respond to threshold verification by modifying parameter → Where the RWB was determined using PV voltage offsets. It is noted that rearranging the dependencies of method steps or adding "wherein" clauses that merely state the inherent result or property of an already defined step does not make the claims patentably distinct. The application is an obvious variation (if not identical) to the patent. Therefore, the patent protections have been granted to the earlier filed patent application. For similar reasons, claims 18-20 are rejected over claims 17-20 of patent ‘374. Conclusion For applicant’s benefit portions of the cited reference(s) have been cited to aid in the review of the rejection(s). While every attempt has been made to be thorough and consistent within the rejection it is noted that the PRIOR ART MUST BE CONSIDERED IN ITS ENTIRETY, INCLUDING DISCLOSURES THAT TEACH AWAY FROM THE CLAIMS. See MPEP 2141.02 VI. When responding to the Office action, Applicants are advised to provide the Examiner with line and page numbers of the application and/or references cited to assist the Examiner in the prosecution of this case. Any inquiry concerning this communication or earlier communications from the Examiner should be directed to Michael T. Tran whose telephone number is (571) 272-1795. Interview agendas may be emailed to Michael.tran@uspto.gov. The Examiner can normally be reached on Monday-Thursday from 6:00AM-4:30 P.M. Any inquiry of a general nature or relating to the status of this application. should be directed to the Group receptionist whose telephone number is (571) 272-1650. /MICHAEL T TRAN/Primary Examiner, Art Unit 2827 June 5, 2026
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Prosecution Timeline

Jul 26, 2024
Application Filed
Jun 10, 2026
Non-Final Rejection mailed — §DP (current)

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Prosecution Projections

1-2
Expected OA Rounds
96%
Grant Probability
96%
With Interview (+0.4%)
1y 7m (~0m remaining)
Median Time to Grant
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