DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “second reflective mirror formed inside of the first semiconductor layer” of claim 19 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-27 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the claim recites the limitation "the second semiconductor" in line 9. There is insufficient antecedent basis for this limitation in the claim.
It is indefinite whether the second semiconductor refers to the second semiconductor layer of claim 1, line 5 or some other material. For the purposes of examination, the former interpretation will be used.
Claims 2-27 depend upon claim 1 and do not rectify the problem. Therefore, they are rejected on at least the same basis as claim 1.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5-8, 14-15, 18, 20-21, 23-24, and 27 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chong (US 20210351226 A1).
Regarding claim 1, Fig. 2A of Chong discloses a micro light emitting diode (LED) structure (Fig. 2A, first LED unit 108, ¶ [0031]), comprising:
a mesa structure (Fig. 2A, first semiconductor layer 104, ¶ [0031]), comprising:
a first semiconductor layer (Fig. 2A, first doping semiconductor layer 114, ¶ [0033]) having a first conductive type (“first doping semiconductor layer 114 may include p-type”, ¶ [0033]);
a light emitting layer (Fig. 2A, first multiple quantum well (MQW) layer 116, ¶ [0033]) formed on the first semiconductor layer (114); and
a second semiconductor layer (Fig. 2A, second doping semiconductor layers 118, first ion-implanted material 120, ¶ [0036]) formed on the light emitting layer (116),
the second semiconductor layer (118, 120) having a second conductive type different from the first conductive type (“second doping semiconductor layer 118 may be a n-type semiconductor layer”, ¶ [0035]);
wherein a top surface area of the second semiconductor layer (118, 120) is greater than each of:
a bottom surface area of the first semiconductor layer (114), a top surface area of the first semiconductor layer (114), and a bottom surface area of the second semiconductor (118, 120); and
wherein the second semiconductor layer (118, 120) comprises:
a semiconductor region (118); and
an ion implantation region (120) formed around the semiconductor region (118) (“first ion-implanted material 120 may be formed by implanting ion materials in second doping semiconductor layers 118”, ¶ [0036]).
Regarding claim 5, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Fig. 2A of Chong further discloses wherein the mesa structure (104) comprises a flat sidewall or un-flat sidewall (shown in Fig. 2A).
Regarding claim 6, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Fig. 2A of Chong further discloses wherein the ion implantation region (120) comprises at least one type of implanted ions (“first ion-implanted material 120 may be formed by implanting ion materials in second doping semiconductor layers 118”, ¶ [0036]).
Regarding claim 7, Fig. 2A of Chong discloses the micro LED structure according to claim 6 as applied above, and Fig. 2A of Chong further discloses wherein the implanted ions are selected from one or more of the following ions: hydrogen, nitrogen, fluorine, oxygen, carbon, argon, phosphorus, boron, silicon, sulfur, arsenic, chlorine, and metal ions (“first ion-implanted material 120 may be formed by implanting H.sup.+”, ¶ [0036]).
Regarding claim 8, Fig. 2A of Chong discloses the micro LED structure according to claim 7 as applied above, and Fig. 2A of Chong further discloses wherein the metal ions are selected from one or more of zinc, copper, indium, aluminum, nickel, titanium, magnesium, chromium, gallium, tin, antimony, tellurium, tungsten, tantalum, germanium, molybdenum, and platinum (“first ion-implanted material 120 may be formed by implanting… Mg.sup.+”, ¶ [0036]).
Regarding claim 14, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Fig. 2A of Chong further discloses wherein a thickness of the light emitting layer (116) is less than a thickness of the first semiconductor layer (114).
Regarding claim 15, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Fig. 2A of Chong further discloses wherein the light emitting layer (116) is formed by a quantum well layer (“first multiple quantum well (MQW) layer 116”, ¶ [0033]) located between the first semiconductor layer (114) and the second semiconductor layer (118, 120).
Regarding claim 18, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Fig. 2A of Chong further discloses comprising a first reflective mirror (Fig. 2A, first reflective layer 124, ¶ [0039]) formed on the bottom surface of the first semiconductor layer (114).
Regarding claim 20, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Fig. 2A of Chong further discloses wherein the ion implantation region (120) having a resistance higher than a resistance of the semiconductor region (118) (“First ion-implanted material 120 has the physical properties of electrical insulation. By implanting an ion material in a defined area of second doping semiconductor layer 118, the material of second doping semiconductor layers 118 in the defined area may be transformed to first ion-implanted material 120, which electrically isolates second doping semiconductor layers 118”, ¶ [0036]).
Regarding claim 21, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Chong further discloses a micro display panel (“Micro-LED displays have arrays of micro-LEDs forming the individual pixel elements”, ¶ [0004]), comprising:
a micro light emitting diode (LED) array (Fig. 2A, LED structure 100, ¶ [0033]), comprising:
a first micro LED structure (108) according to claim 1, the first micro LED structure comprising a first mesa structure (104); and
an integrated circuit (IC) back plane (Fig. 2A, first substrate 102, ¶ [0031]) formed under the first micro LED structure, wherein the first micro LED structure is electrically connected to IC back plane (“first substrate 102 may have driving circuits formed therein, and first substrate 102 may be CMOS backplane or TFT glass substrate. The driving circuit provides the electronic signals to LED structure 100”, ¶ [0032]).
Regarding claim 23, Fig. 2A of Chong discloses the micro LED structure according to claim 21 as applied above, and Fig. 2A of Chong further discloses wherein:
a second micro LED structure (Fig. 2A, second LED unit 110, ¶ [0031]) according to claim 1, the second micro LED structure comprising a second mesa structure (104); and
a dielectric layer (Fig. 2A, passivation layer 140, ¶ [0047]),
wherein the second mesa structure (104) is located adjacent to the first mesa structure (104), and
wherein the dielectric layer (140) is not conductive (“passivation layer 140 may include SiO.sub.2, Al.sub.2O.sub.3, SiN or other suitable materials for isolation”, ¶ [0076]) and is formed between the first and second mesa structures (104).
Regarding claim 24, Fig. 2A of Chong discloses the micro LED structure according to claim 23 as applied above, and Fig. 2A of Chong further discloses wherein material of the dielectric layer (140) is at least one of SiO2, Si3N4, A1203, AlN, HfO2, TiO2, and ZrO2 (“passivation layer 140 may include SiO.sub.2, Al.sub.2O.sub.3, SiN or other suitable materials for isolation”, ¶ [0076]).
Regarding claim 27, Fig. 2A of Chong discloses the micro LED structure according to claim 23 as applied above, and Fig. 2A of Chong further discloses wherein top surfaces of the first and second mesa structures (104) are separated by a distance less than or equal to 200nm (Fig. 2A shows that the mesa structures are the same height. Therefore, the top surfaces are separated by a distance less than 200 nm).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-4, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Chong (US 20210351226 A1) in view of Yoo (US 20030080344 A1).
Regarding claim 2, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Fig. 2A of Chong further discloses comprising:
a top contact (Fig. 2A, electrode layer 142, ¶ [0047]) formed on the top surface of the second semiconductor layer (118, 120),
a bottom contact (Fig. 2A, contacts 138, ¶ [0047]).
Chong fails to explicitly disclose the top contact having the second conductivity type,
the bottom contact formed on the bottom surface of the first semiconductor layer, the bottom contact having the first conductive type.
In the similar field of endeavor of light emitting diodes, Fig. 9 of Yoo discloses comprising:
a top contact (Fig. 9, transparent conductive layer 220, ¶ [0009]) formed on the top surface of the second semiconductor layer (Fig. 9, cladding layer 170, p-GaN layer 180, ¶ [0038]), the top contact (220) having the second conductive type (Fig. 9, “a p-transparent contact between the p-electrode and the p-GaN layer”, claim 10); and
a bottom contact (Fig. 9, n-contact 500, ¶ [0028]), formed on the bottom surface of the first semiconductor layer (Fig. 9, buffer layer 120, n-GaN 140, ¶ [0033]), the bottom contact (500) having the first conductive type (“n-contact 500”, ¶ [0028]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the micro LED structure of Chong with the electrodes as disclosed by Yoo, to obtain the desired electrical and light transmission properties and size (see Yoo, ¶ [0029-0030]).
Regarding claim 3, Chong and Yoo together disclose the micro LED structure according to claim 2 as applied above, and Fig. 2A of Chong further discloses a center of the top contact (142), and a center of the semiconductor region (118) are aligned along a same axis perpendicular to the top surface of the second semiconductor layer (118, 120), and
wherein a diameter of the ion implantation region (120) is greater than or equal to a diameter of the top contact (142) (Fig. 2A shows that the outer edge of the implantation region extends beyond the outer edge of the top contact).
Chong fails to disclose a center of the bottom contact, a center of the top contact, and a center of the semiconductor region are aligned along a same axis perpendicular to the top surface of the second semiconductor layer.
In the similar field of endeavor of light emitting diodes, Fig. 9 of Yoo discloses a center of the bottom contact (500), a center of the top contact (220), and a center of the semiconductor region (170) are aligned along a same axis perpendicular to the top surface of the second semiconductor layer (170, 180).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the micro LED structure of Chong with the electrodes as disclosed by Yoo, to obtain the desired electrical and light transmission properties and size (see Yoo, ¶ [0029-0030]).
Regarding claim 4, Chong and Yoo together disclose the micro LED structure according to claim 2 as applied above, but Chong fails to disclose comprising a top conductive layer, formed on the second semiconductor layer and the top contact.
In the similar field of endeavor of light emitting diodes, Fig. 9 of Yoo discloses comprising a top conductive layer (Fig. 9, electrode 240, ¶ [0009]), formed on the second semiconductor layer (170, 180) and the top contact (220).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the micro LED structure of Chong with the top conductive layer as disclosed by Yoo, to allow for subsequent interconnection (see Yoo, ¶ [0040]).
Regarding claim 17, Fig. 2A of Chong discloses the micro LED structure according to claim 15 as applied above, but Chong fails to explicitly disclose wherein the quantum well layer comprises three or less than three pairs of quantum wells.
In the similar field of endeavor of light emitting diodes, Fig. 9 of Yoo discloses wherein the quantum well layer (160) comprises three or less than three pairs of quantum wells (“The active layer 160 may be of any suitable structure including a single quantum well layer”, ¶ [0034]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to employ the number of quantum wells disclosed by Yoo because the number of quantum wells is a result-effective variable that may be selected according to the desired device performance. Selecting a single quantum well, as disclosed by Yoo, would have been an obvious matter of routine optimization and yielded the predictable result of creating an LED structure with desired characteristics. See KSR International Co. V. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claims 9-13, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chong (US 20210351226 A1).
Regarding claim 9, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, but Chong fails to explicitly disclose wherein a thickness of the first semiconductor layer is greater than a thickness of the second semiconductor layer.
However, it has been held that where the only different between the prior art and the claims was a recitation of relative dimensions of the claimed element, and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP 2144.04).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention that a mere change in thickness of the semiconductor layers was within the level of ordinary skill in the art and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Regarding claim 10, Chong discloses the micro LED structure according to claim 9 as applied above, but Chong fails to explicitly disclose wherein the thickness of the first semiconductor layer ranges from 700nm to 2µm and the thickness of the second type semiconductor layer ranges from 100nm to 200nm.
However, it has been held that where the only different between the prior art and the claims was a recitation of relative dimensions of the claimed element, and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP 2144.04).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention that a mere change in thickness of the semiconductor layers was within the level of ordinary skill in the art and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Regarding claim 11, Fig. 2A of Chong discloses the micro LED structure according to claim 1 as applied above, and Fig. 2A of Chong further discloses wherein a thickness of the semiconductor region (118) is greater than or equal to a thickness of the ion implantation region (120),
and a diameter of the ion implantation region (120) is greater than the diameter of the semiconductor region (118).
Chong fails to explicitly disclose a diameter of the semiconductor region is greater than or equal to a diameter of the top contact.
However, it has been held that where the only different between the prior art and the claims was a recitation of relative dimensions of the claimed element, and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP 2144.04).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention that a mere change in the diameter of the top contact was within the level of ordinary skill in the art and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Regarding claim 12, Chong disclose the micro LED structure according to claim 11 as applied above, but Chong fails to explicitly disclose wherein the diameter of the semiconductor region is less than or equal to three times of the diameter of the top contact; and the diameter of the ion implantation region is greater than two times of the semiconductor region.
However, it has been held that where the only different between the prior art and the claims was a recitation of relative dimensions of the claimed element, and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP 2144.04).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention that a mere change in the diameter of the top contact, semiconductor region and implantation region was within the level of ordinary skill in the art and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Regarding claim 13, Chong disclose the micro LED structure according to claim 11 as applied above, but Chong fails to explicitly disclose wherein the thickness of the semiconductor region ranges from 100nm to 200nm,
the thickness of the ion implantation region ranges from 100nm to 150 nm,
the diameter of the ion implantation region ranges from 100nm to 1200 nm, and
the diameter of the top contact ranges from 20nm to 50nm.
However, it has been held that where the only different between the prior art and the claims was a recitation of relative dimensions of the claimed element, and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP 2144.04).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention that a mere change in the thicknesses was within the level of ordinary skill in the art and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Regarding claim 16, Fig. 2A of Chong discloses the micro LED structure according to claim 15 as applied above, but Chong fails to explicitly disclose wherein a thickness of the quantum well layer is less than or equal to 30nm.
However, it has been held that where the only different between the prior art and the claims was a recitation of relative dimensions of the claimed element, and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP 2144.04).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention that a mere change in the thicknesses was within the level of ordinary skill in the art and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Chong (US 20210351226 A1) in view of Futagawa et al. (US 20150044795 A1) herein after “Futagawa”.
Regarding claim 19, Fig. 2A of Chong discloses the micro LED structure according to claim 18 as applied above, but Chong fails to explicitly disclose comprising a second reflective mirror formed inside of the first semiconductor layer.
In the similar field of endeavor of light emitting elements, Fig. 23 of Futagawa discloses a second reflective mirror (Fig. 23, light reflecting layer 41, ¶ [0096]) formed inside of the first semiconductor layer (Fig. 23, first compound semiconductor layer 21, ¶ [0144]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the micro LED structure of Chong with the reflective mirror as disclosed by Futagawa, to improve manufacturing (see Futagawa, ¶ [0140]).
Claims 22, and 25-26 are rejected under 35 U.S.C. 103 as being unpatentable over Chong (US 20210351226 A1) in view of Lu et al. (US 20180342492 A1) herein after “Lu”.
Regarding claim 22, Fig. 2A of Chong discloses the micro LED structure according to claim 21 as applied above, and Chong discloses driving circuits in the IC back plane (¶ [0032]), but fails to explicitly disclose wherein the first micro LED structure further comprises:
a connected hole,
wherein a first side of the connected hole is connected to the bottom contact, and a second side of the connected hole is connected to the IC back plane.
In the similar field of endeavor of micro LED displays, Fig. 15 of Lu discloses wherein the first micro LED structure (Fig. 15, micro light-emitting-diode 200, ¶ [0067]) further comprises:
a connected hole (Fig. 15, electrode contact 44, ¶ [0068]),
wherein a first side of the connected hole (44) is connected to the bottom contact (Fig. 15, bottom electrode 6, ¶ [0067]), and a second side of the connected hole (44) is connected to the IC back plane (Fig. 15, TFT layer 42, ¶ [0068]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the micro LED structure of Chong with the interconnections as disclosed by Lu, to electrically connect the components (see Lu, ¶ [0068]) and/or as part of the driving circuits disclosed by Chong (see Chong, ¶ [0032]).
Regarding claim 25, Fig. 2A of Chong discloses the micro LED structure according to claim 23 as applied above, but Chong fails to disclose comprising a reflective structure formed in the dielectric layer and between the first and second mesa structures, wherein the reflective structure does not contact the first and second mesa structures.
In the similar field of endeavor of micro LED displays, Fig. 15 of Lu discloses comprising a reflective structure (Fig. 15, pixel definition layer 45, ¶ [0069]) formed in the dielectric layer (Fig. 15, protective layer 16, ¶ [0069]) and between the first and second mesa structures (Fig. 15, LED semiconductor layer 2, ¶ [0071]), wherein the reflective structure (45) does not contact the first and second mesa structures (2).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the micro LED structure of Chong with the reflective structure as disclosed by Lu, to improve light extraction (see Lu, ¶ [0070]).
Regarding claim 26, Chong and Lu together disclose the micro display panel according to claim 25 as applied above, but Chong fails to disclose wherein the reflective structure has:
a top surface aligned with top surfaces of the first and second mesa structures; and
a bottom surface aligned with bottom surfaces of the first and second mesa structures.
In the similar field of endeavor of micro LED displays, Fig. 15 of Lu discloses the reflective structure (45).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the micro LED structure of Chong with the reflective structure as disclosed by Lu, to improve light extraction (see Lu, ¶ [0070]).
Lu fails to explicitly disclose a top surface aligned with top surfaces of the first and second mesa structures; and
a bottom surface aligned with bottom surfaces of the first and second mesa structures.
However, it has been held that where the only different between the prior art and the claims was a recitation of relative dimensions of the claimed element, and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP 2144.04).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention that a mere change in the height of the reflective structure was within the level of ordinary skill in the art and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Conclusion
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/C.A.N./ Examiner, Art Unit 2893
/YARA B GREEN/ Supervisor Patent Examiner, Art Unit 2893