DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 5 and 6 are objected to because of the following informalities:
Regarding claim 5, “the sidewall” should read “the sidewall of the mesa structure”.
Regarding claim 6, “the sidewall” should read “the sidewall of the mesa structure”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 4, 9 and 30 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4 recites the limitation “the second light emitting layer”. There is not enough antecedent basis for this limitation. Claims 1 and 2, on which claim 4 is dependent on, do not teach a second light emitting layer. For the purpose of examination, claim 4 will be interpreted as: The micro LED structure according to claim 2, further comprising a top conductive layer, formed on the secondsemiconductor layer and the top contact.
Regarding claim 9, it is unclear as to whether applicant intends to further require the implanted ions to be a metal ion, or as to if it is intended to be a conditional limitation, merely required if the metal ions are found in the preceding claim 8. For the purpose of examination claim 9 will be interpreted as a conditional limitation, where the condition applies only if a metal ion is disclosed in a reference that satisfies the limitation of claim 8.
Claim 30 recites the limitation “the sidewalls reflective layers of the first and second mesa structures”. The claim does not specify whether the sidewall reflective layers are connected to each other at the top surfaces, connected to the respective top surfaces of the mesa structures, or connected by another intervening structure. As a result, the claim is indefinite. For the purpose of examination claim 30 will be interpreted as: The micro display panel according to claim 27, wherein the sidewall reflective layers of the first and second mesa structures are connected to one another at top surfaces of the first and second mesa structures.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 7-9, 12, 16, 19-22 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (United States Patent Number, US 11,296,254 B2) hereinafter referenced as Lin, in view of Park et al., (United States Patent Application Publication Number, US 2012/0069161 A1) hereinafter referenced as Park, and in view of Hu et al., (United States Patent Application Publication Number, US 2019/0280157 A1) hereinafter referenced as Hu.
Regarding claim 1, Lin teaches a micro light emitting diode (LED) structure, comprising: a mesa structure (structure of Fig.2R), comprising: a first semiconductor layer having a first conductive type (Fig.2R, element #101); a light emitting layer formed on the first semiconductor layer (Fig.2R, element #103); a second semiconductor layer formed on the light emitting layer (Fig.2R, element #102), the second semiconductor layer having a second conductive type different from the first conductive type (column 17, rows 40-43).
Lin does not teach a sidewall protective layer formed on a sidewall of the mesa structure and a sidewall reflective layer formed on a surface of the sidewall protective layer. Park teaches a sidewall protective layer formed on a sidewall of the mesa structure (Fig.5, element #130). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Park and disclose a sidewall protective layer formed on a sidewall of the mesa structure. The passivation layer offers protection from environmental degradation, such as moisture and other contaminants, that can cause corrosion and reduce the performance of the device.
The combination of Lin and Park does not teach a sidewall reflective layer formed on a surface of the sidewall protective layer. Hu teaches teach a sidewall protective layer formed on a sidewall of the mesa structure; and a sidewall reflective layer formed on a surface of the sidewall protective layer (Fig.6, elements #212 and #210). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Hu and disclose a sidewall protective layer formed on a sidewall of the mesa structure and a sidewall reflective layer formed on a surface of the sidewall protective layer. As disclosed by Hu, the reflective layer may prevent light leakage, which increases light extraction efficiency (paragraph [0040], rows 1-6), while the passivation layer may reduce the probability of current flowing through the sidewall of the layers and prevent other conductive elements from contacting the transporting layer (paragraph [0049], rows 11-14 and paragraph [0053], rows 4-7).
Lin further teaches wherein a top surface area of the second semiconductor layer is greater than each of: a bottom surface area of the first semiconductor layer, a top surface area of the first semiconductor layer and a bottom surface area of the second semiconductor layer (Fig.2J); and wherein, the second semiconductor layer comprises: a semiconductor region; and an ion implantation region formed around the semiconductor region (Fig.2R, element #201,column 19, rows 15-18).
Regarding claim 2, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 1, further comprising: a top contact formed on the top surface of the second semiconductor layer (Fig.2R, element #302), and a bottom contact, formed on the bottom surface of the first semiconductor layer (Fig.2R, element #304). Lin does not teach the top contact having the second conductive type and the bottom contact having the first conductive type. Park teaches a top contact formed on the top surface of the second semiconductor layer (Fig.7, element #108 formed on the top surface of second semiconductor layer, element #107), the top contact having the second conductive type (paragraph [0079], rows 3-9); and a bottom contact, formed on the bottom surface of the first semiconductor layer, the bottom contact having the first conductive type (paragraph [0077], rows 9-16). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Park and disclose the micro LED further comprising: a top contact formed on the top surface of the second semiconductor layer, the top contact having the second conductive type; and a bottom contact, formed on the bottom surface of the first semiconductor layer, the bottom contact having the first conductive type. This provides ohmic contacts between the top and bottom contacts and the semiconductor layers, which provide low resistance and ensure efficient current flow and reliable device operation.
Regarding claim 3, the combination of Lin, Park and Hu teaches the micro LED structure according to claims 1 and 2 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 2, wherein a center of the bottom contact, a center of the top contact, and a center of the semiconductor region are aligned along a same axis perpendicular to the top surface of the second semiconductor layer (Fig.2R, the centers of elements #302, #304 and #102 are aligned along vertical direction) and wherein a diameter of the ion implantation region is greater than or equal to a diameter of the top contact (Fig.2Q and 2R).
Regarding claim 4, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 2, further comprising a top conductive layer, formed on the secondsemiconductor layer and the top contact (Fig.2R, element #301, is formed on top of the second semiconductor layer, element #102, and on the sides of top contact, element #302).
Regarding claim 5, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 1, wherein the sidewall of the mesa structure is flat (Fig.2R).
Regarding claim 7, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 1, wherein the ion implantation region comprises at least one type of implanted ions (column 44, rows 1-4).
Regarding claim 8, the combination of Lin, Park and Hu teaches the micro LED structure according to claims 1 and 7 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 7, wherein the implanted ions are selected from one or more of the following ions: hydrogen, nitrogen, fluorine, oxygen, carbon, argon, phosphorus, boron, silicon, sulfur, arsenic, chlorine, and metal ions (column 44, rows 1-4).
Regarding claim 9, the combination of Lin, Park and Hu teaches the micro LED structure according to claims 1, 7 and 8 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 8, wherein the metal ions are selected from one or more of zinc, copper, indium, aluminum, nickel, titanium, magnesium, chromium, gallium, tin, antimony, tellurium, tungsten, tantalum, germanium, molybdenum, and platinum (titanium column 44, rows 1-4).
Regarding claim 12, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 1, wherein a thickness of the semiconductor region is greater than or equal to a thickness of the ion implantation region (Fig.2R, the thickness of semiconductor region, element #102, along the vertical center of the image, is greater than the thickness of ion implantation regions #201), a diameter of the semiconductor region is greater than or equal to a diameter of the top contact (Fig.2R, diameter of the region #102 located between elements #201 is larger than the diameter of element #302), and a diameter of the ion implantation region is greater than the diameter of the semiconductor region (Fig.2Q, ion implanted region #201 surrounds semiconductor region #102 from top view and therefore, a diameter of region #201 is larger than a diameter of the semiconductor region, both measured from one outer edge to the opposite outer edge of the regions).
Regarding claim 16, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 1, wherein the light emitting layer is formed by a quantum well layer located between the first semiconductor layer and the second semiconductor layer (column 32, rows 63-64).
Regarding claim 19, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin does not teach the micro LED structure according to claim 1, wherein the sidewall protective layer comprises the same material as the semiconductor layers, without conductive property; wherein the sidewall protective layer is bonded with the sidewall of the mesa structure via atomic bonds. Lin teaches the semiconductor layers may comprise AlGaAs of AlGaInP (column 44, rows 37-40). Park teaches the semiconductor layers may comprise AlGaInP (Fig.6, element #107 and #103, paragraph [0089], rows 3-6) and the sidewall protective layer comprises the same material as the semiconductor layers (Fig.6, element #130, may comprise AlGaAs, paragraph [0102] rows 5-7), without conductive property (paragraph [0102] rows 1-2); wherein the sidewall protective layer is bonded with the sidewall of the mesa structure via atomic bonds (deposition is atomic layer deposition which implies atomic bonds, paragraph [0101], rows 12-14). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Park and disclose wherein the sidewall protective layer comprises the same material as the semiconductor layers, without conductive property; wherein the sidewall protective layer is bonded with the sidewall of the mesa structure via atomic bonds. Having the passivation layer comprise the same material as the semiconductor layers and deposited to form atomic bonds with the sidewall of the mesa structure, reduces the interface states between the sidewall of the mesa structure and the passivation layer and therefore reduces non-radiative sidewall recombination, which improves the optical performance and efficiency of the micro-LED device.
Regarding claim 20, the combination of Lin, Park and Hu teaches the micro LED structure according to claims 1 and 19 as set forth in the obviousness rejection. As noted in the obviousness rejection of claim 19, Park teaches the micro LED structure according to claim 19, wherein the material of the sidewall protective layer comprises InP or GaAs (Fig.6, element #130, comprises GaAs, paragraph [0102] rows 5-7).
Regarding claim 21, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Hu further teaches the micro LED structure according to claim 1, wherein the material of the sidewall reflective layer comprises Au and Ag, or a dielectric material combined with Au and Ag (paragraph [0041], rows 4-6). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Hu and disclose the material of the sidewall reflective layer comprises Au and Ag, or a dielectric material combined with Au and Ag. Au and Ag are metal with good reflective properties, and compatible with u-LED technology process.
Regarding claim 22, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 1, further comprising a first reflective mirror formed on the bottom surface of the first semiconductor layer (column 19, rows 12-15).
Regarding claim 24, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 1, wherein the ion implantation region has a resistance higher than a resistance of the semiconductor region (column 52, rows 1-10).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Park, Hu and in view of Lutgen et al., (United States Patent Application Publication Number, US 2020/0357972 A1) hereinafter referenced as Lutgen.
Regarding claim 6, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. The combination of Lin, Park and Hu does not teach the micro LED structure according to claim 1, wherein the sidewall is not flat. Lutgen teaches the micro LED structure according to claim 1, wherein the sidewall is not flat (Fig.11A, parabolic sidewalls are not flat). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Lutgen and disclose the micro LED wherein the sidewall is not flat. As disclosed by Lutgen, this improves light extraction efficiency and reduces optical loss.
Claims 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Park, Hu and in view of Hagino et al., (United States Patent Application Publication Number, US 2011/0298006 A1) hereinafter referenced as Hagino.
Regarding claim 10, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin shows the micro LED structure according to claim 1, wherein a thickness of the first semiconductor layer is greater than a thickness of the second semiconductor layer (Fig.2R, the thickness of element #101, is greater than the thickness of element #102). Hagino also teaches wherein a thickness of the first semiconductor layer is greater than a thickness of the second semiconductor layer (Fig.14, first semiconductor, element #111, is 2000nm thick and the second semiconductor, element #116, is 480nm thick paragraph [0058], rows 7-8 and 13-16). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Hagino and disclose wherein a thickness of the first semiconductor layer is greater than a thickness of the second semiconductor layer. A thicker first semiconductor layer provides mechanical support and improves device reliability while maintaining a relatively thinner second semiconductor layer, thereby yielding predictable improvements in device performance.
Claims 11 is rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Park, Hu, Hagino and in view of Tomoda et al., (United States Patent Application Publication Number, US 2008/0017873 A1) hereinafter referenced as Tomoda.
Regarding claim 11, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection and the combination of Lin, Park, Hu and Hagino teaches the micro LED structure according to claim 10 as set forth in the obviousness rejection. Lin further teaches the micro LED structure according to claim 10, wherein the thickness of the first semiconductor layer and the thickness of the second semiconductor layer is less than 10um (column 43, rows 5-8). Hagino teaches the thickness of the first semiconductor layer is 2um and the thickness of the second semiconductor layer is 480nm (Fig.14, first semiconductor, element #111, is 2000nm thick and the second semiconductor, element #116, is 480nm thick paragraph [0058], rows 7-8 and 13-16). The claimed range for the thickness of the first semiconductor overlaps with the value disclosed by Hagino and therefore a prima facie case of obviousness exists (MPEP 2144.05). Tomoda teaches wherein the thickness of the first semiconductor layer is 2.6um and the thickness of the second semiconductor layer is 200nm (Fig.16, paragraph [0126], rows 4-7). The claimed range for the thickness of the second semiconductor overlaps with the value disclosed by Tomoda and therefore a prima facie case of obviousness exists (MPEP 2144.05). In would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to optimize the thickness values of the first and second semiconductor layers through routine experimentation. The thickness of the semiconductor layers is a result effective variable because they determine the properties of the micro LEDs, where thinner layers can reduce voltage drop but may increase leakage current, while thicker layers can increase heat generation and electro-optical capacitance and reduce internal quantum efficiency.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Park, Hu, and in view of Toda et al., (United States Patent Application Publication Number, US 2006/0011946 A1) hereinafter referenced as Toda.
Regarding claim 13, the combination of Lin, Park and Hu teaches the micro LED structure according to claims 1 and 12 as set forth in the obviousness rejection. The combination of Lin, Park and Hu does not teach the micro LED structure according to claim 12, wherein the diameter of the semiconductor region is less than or equal to three times of the diameter of the top contact; and the diameter of the ion implantation region is greater than two times of the semiconductor region. Toda teaches wherein the diameter of the semiconductor region is less than or equal to three times of the diameter of the top contact (Fig.10, the diameter of the semiconductor region, diameter of region 18, is 2.8um and the diameter of the top contact, diameter of element #19, is 2um, paragraph [00277], rows 19-24); and the diameter of the ion implantation region is greater than two times of the semiconductor region (Fig.10, the diameter the implanted region, measured from outer left edge to outer right egged is greater than two time the diameter of region 18). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Toda and disclose, wherein the diameter of the semiconductor region is less than or equal to three times of the diameter of the top contact; and the diameter of the ion implantation region is greater than two times of the semiconductor region. The ratios of the diameters can be optimized through routine experimentation. The ratio between the diameter of the semiconductor region and the diameter of the top contact is a result effective variable because: the diameter of the semiconductor region, which is also the diameter of the current passing region, has to be large enough so that the current can be transported unimpeded, while the diameter of the top contact has to be large enough relative to current passing region, in order to collect the current from the entire region. The ratio between the diameter of the semiconductor region and the implanted region is a result effective variable because: the diameter of the semiconductor region, which is also the diameter of the current passing region, needs to be large enough so that the current can be transported unimpeded, while the implanted region has to extend from the sidewalls of the mesa structure toward its center, so that it passivates the sidewalls and prevent leakage current and function as a current narrowing barrier due to its high resistance, while being limited by the fact that it absorbs light due to crystal defects created during implantation (paragraph [0250], rows 1-5).
Claim 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Park, Hu, and in view of Tomoda.
Regarding claim 14, the combination of Lin, Park and Hu teaches the micro LED structure according to claims 1 and 12 as set forth in the obviousness rejection. Tomoda teaches wherein the thickness of the thickness of the second semiconductor layer is 200nm (Fig.16, paragraph [0126], rows 4-7). The claimed range for the thickness of the second semiconductor, between 100nm to 200nm overlaps with the value disclosed by Tomoda, and therefore a prima facie case of obviousness exists (MPEP 2144.05). Hu teaches the thickness of the ion implantation region is ½ or ¾ the thickness of the second semiconductor layer (paragraph [0045], rows 19-20), which in combination with Tomoda teaches the thickness of the ion implantation region ranges from 100nm or 150 nm. The claimed range for the thickness of the second semiconductor, between 100nm to 200nm overlaps with the value disclosed by Tomoda, and therefore a prima facie case of obviousness exists (MPEP 2144.05). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Tomoda and Hu and disclose, wherein the thickness of the semiconductor region ranges from 100nm to 200nm and the thickness of the ion implantation region ranges from 100nm to 150 nm. The values can be optimized through routine experimentation. The thickness of the second semiconductor layer is a result effective variable because it determines the properties of the micro LEDs, where thinner layers can reduce the voltage drop but may increase leakage current, while thicker layers can increase heat generation and electro-optical capacitance and reduce internal quantum efficiency. The thickness of implantation region is a result effective variable because, where thicker layers reduce the probability of the current flowing through the sidewalls and reduce leakage current, but they require higher energy implants which create implant defects which are known to absorb light and reduce internal quantum efficiency.
Regarding claim 15, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. Lin shows the micro LED structure according to claim 1, wherein a thickness of the light emitting layer is less than a thickness of the first semiconductor layer (Fig.2R, the thickness of element #103, is less than the thickness of element #101). Tomoda also teaches the light emitting layer is less than a thickness of the first semiconductor layer (Fig.16, paragraph [0126], rows 19-23). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Tomoda and disclose wherein a thickness of the light emitting layer is less than a thickness of the first semiconductor layer. A thicker first semiconductor layer provides mechanical support and improves device reliability while maintaining a thinner active layer determines the emission characteristics, the radiative recombination efficiency, and the total quantum efficiency of the micro LED.
Claims 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Park, Hu, and in view of Leatherdale et al., (United States Patent Application Publication Number, US 2012/0119237 A1) hereinafter referenced as Leatherdale.
Regarding claim 17, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection. The combination of Lin, Park and Hu does not teach the micro LED structure according to claim 16, wherein a thickness of the quantum well layer is less than or equal to 30nm. Leatherdale teaches that a quantum well generally has a thickness of about 100 nm or less, or about 10 nm or less (paragraph [0041], row 8-10). Leatherdale further teaches that a quantum well has a thickness ranging from about 2 nm to about 35 nm (paragraph [0048], row 13-15). The claimed value for the thickness of the quantum well layer overlaps with the range disclosed by Leatherdale, and therefore a prima facie case of obviousness exists (MPEP 2144.05). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to employ the quantum well layer thickness taught by Leatherdale because optimizing the thickness of a quantum well to improve carrier confinement, radiative recombination efficiency, and emission characteristics was well known in the art and would have yielded predictable results.
Regarding claim 18, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection and the combination of Lin, Park, Hu and Leatherdale teaches the micro LED structure according to claim 17 as set forth in the obviousness rejection. Leatherdale further teaches wherein the quantum well layer comprises
a single quantum well (paragraph [0041], rows 7-10, paragraph [0048], rows 7-9). Thus, Leatherdale teaches wherein the quantum well layer comprises three or less than three pairs of quantum wells. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Leatherdale and disclose wherein the quantum well layer comprises three or less than three pairs of quantum wells. The number of quantum well pairs is a result-effective variable that may be selected according to the desired emission wavelength, carrier confinement, light-emission efficiency, and other device performance characteristics. Selecting a single quantum well or another small number of quantum well pairs would have been an obvious matter of routine optimization yielding predictable results.
Claims 23, 25 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Park, Hu, and in view of Huang et al., (United States Patent Application Publication Number, US 2012/0050694 A1) hereinafter referenced as Huang.
Regarding claim 23, the combination of Lin, Park and Hu teaches the micro LED structure according to claims 1 and 22 as set forth in the obviousness rejection. The combination of Lin, Park and Hu does not teach the micro LED structure according to claim 22, further comprising a second reflective mirror formed inside of the first semiconductor layer. Huang teaches the micro LED comprising a second reflective mirror formed inside of the first semiconductor layer (Fig.4f, element #224 is a Bragg reflector inside the first semiconductor layer, element #222, paragraph [0031], rows 1-2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Huang and disclose the micro LED structure further comprising a second reflective mirror formed inside of the first semiconductor layer. As disclosed by Huang, the mirror provides internal reflection of emitted light, thereby enhancing light extraction efficiency and improving the optical performance of the micro-LED device.
Regarding claim 25, Lin teaches a micro display panel, comprising: a micro light emitting diode (LED) array, comprising (column 56, rows 9-12): a first micro LED structure. As noted in the obviousness rejection of claim 1, the combination of Lin, Park and Hu teaches a first micro LED structure according to claim 1 the first micro LED structure comprising a first mesa structure. The micro LED structure of the portion of the display shown in Fig.10-9 of Lin can be substituted by the micro LED structure of claim 1, with reasonable chances of success, in order to benefit from all the advantages of the LED structure of claim 1.
The combination of Lin, Park and Hu does not teach an integrated circuit (IC) back plane formed under the first micro LED structure, wherein the first micro LED structure is electrically coupled to IC back plane. Huang teaches a light emitting unit array (Fig.4i, element #200) formed by a plurality of micro LEDs disposed and connected to an integrated circuit (IC) back plane (Fig.4i, elements #236 are formed on element #242 which is configured with circuit elements to drive the LEDs, therefore is an integrated (IC) back plane, paragraph [0036], rows 1-9 and paragraph [0038], rows 1-10). Therefore, Huang teaches an integrated circuit (IC) back plane formed under the first micro LED structure, wherein the first micro LED structure is electrically coupled to IC back plane. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate the teaching of Huang in order to provide individually addressable micro-LED pixels for image display while utilizing an IC back plane for independent electrical control of each micro-LED, thereby improving display functionality and pixel driving capability.
Regarding claim 26, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection and the combination of Lin, Park, Hu and Huang teaches the micro LED structure according to claim 25 as set forth in the obviousness rejection. Lin further teaches the micro display panel according to claim 25, wherein the first micro LED structure further comprises: a connected hole, wherein a first side of the connected hole is connected to the bottom contact, and a second side of the connected hole is connected to a substrate (Fig.10-9 elements #309 connect the LEDs to the substrate, element #840). As noted in the obviousness rejection of claim 25, the substrate can be an IC back plane.
Claims 27-30 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Park, Hu, Huang and in view of Leatherdale.
Regarding claim 27, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection and the combination of Lin, Park, Hu and Huang teaches the micro LED structure according to claims 25 and 26 as set forth in the obviousness rejection. Lin further teaches the micro display panel according to claim 26, further comprising: a second micro LED structure, the second micro LED structure comprising a second mesa structure (Fig.10-9, shows two LED comprising mesa structures); and a layer, wherein the second mesa structure is located adjacent to the first mesa structure, and wherein the layer is not conductive and is formed between the first and second mesa structures (Fig.10-9, element #700, while Lin does not explicitly teaches the layer is not conductive, on can easily determine that the layer has this characteristic: in conductive, layer #700 will short the LEDs together, since it is in contact with the top electrodes of the LEDs). The combination of Lin, Park, Hu and Huang does not teach the layer is a dielectric layer. Leatherdale teaches a dielectric layer, wherein the dielectric layer is not conductive and is formed between the first and second mesa structures (Fig.5, element #580, is SiO2, paragraph [0110], rows 1-3, and paragraph [0111], rows 6-9). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate the teaching of Leatherdale and disclose a dielectric layer, wherein the dielectric layer is not conductive and is formed between the first and second mesa structures. As disclosed by Leatherdale, the dielectric layer electrically and optically isolates the adjacent micro LED (paragraph [0111], rows 1-6) and improves structural integrity of the display panel.
Regarding claim 28, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection and the combination of Lin, Park, Hu and Huang teaches the micro LED structure according to claims 25, 26 and 27 as set forth in the obviousness rejection. As noted in the obviousness rejection of claim 27, Leatherdale teaches wherein material of the dielectric layer is at least one of SiO2, Si3N4, A2O3, AIN, Hf02, TiO2, and ZrO2 (Fig.5, element #580, is SiO2, and paragraph [0111], rows 6-9).
Regarding claim 29, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection and the combination of Lin, Park, Hu and Huang teaches the micro LED structure according to claims 25, 26 and 27 as set forth in the obviousness rejection. The combination of Lin, Park, Hu and Huang does not teach the micro display panel according to claim 27, further comprising a reflective structure formed in the dielectric layer and between the first and second mesa structures. Leatherdale teaches wherein the micro LEDs includes a sidewall reflective layer extending along its sidewalls (Fig.9I, element #955). As the micro LEDs are coupled by the dielectric layer as shown in Fig.5, the reflective layer is formed at the surface of the dielectric layer between the mesa structures. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate the teaching of Leatherdale and disclose the micro display panel further comprising a reflective structure formed in the dielectric layer and between the first and second mesa structures. The reflective layer provides a reflective structure that improves optical confinement and enhances light extraction efficiency.
Regarding claim 30, the combination of Lin, Park and Hu teaches the micro LED structure according to claim 1 as set forth in the obviousness rejection and the combination of Lin, Park, Hu and Huang teaches the micro LED structure according to claims 25, 26 and 27 as set forth in the obviousness rejection. The combination of Lin, Park, Hu and Huang does not teach the micro display panel according to claim 27, wherein the sidewall reflective layers of the first and second mesa structures are connected to one another at top surfaces of the first and second mesa structures. Leatherdale teaches. Leatherdale teaches wherein the micro LEDs included sidewall reflective layer are connected to one another at top surfaces of the first and second mesa structures (Fig.9I, element #955). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate the teaching of Leatherdale and disclose wherein the sidewall reflective layers of the first and second mesa structures are connected to one another at top surfaces of the first and second mesa structures. The reflective layer provides a reflective structure that improves optical confinement and enhances light extraction efficiency.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CRISTIAN A TIVARUS whose telephone number is (703)756-4688. The examiner can normally be reached Monday- Friday 8:00 AM -5:00 PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at (571)270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CRISTIAN A TIVARUS/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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