DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment/Restriction
Applicant's election with traverse of Species II, Subspecies B, and Claims 1-3, 5-10, and 14-19 in the reply filed on June 09, 2026 is acknowledged. The traversal is on the ground(s) that “the Office Action does not sufficiently establish that the identified Species I-V and Subspecies A and B are patentably distinct from one another…examination of the claims together would impose a serious search and/or examination burden.” This is not found persuasive because as set forth in the Election of Species Requirement, the distinct features of T and C on the same side or opposite side, distinct features of the via, and different circuits of a connector and a semiconductor chip, that require different search queries, and prior art applicable to one species would not likely be applicable to another species, clearly support the Election of Species Requirement. Further, the elected Species II of Fig. 3B reads on the T on the bottom surface of the flexible substrate such that Claim 2 is further withdrawn from further consideration.
The requirement is still deemed proper and is therefore made FINAL.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the recited “first/second conductive wire” in claim 19 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 19 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. As to claim 19, the limitation “first conductive wire” and “second conductive wire” is not sufficiently described in the Specification and Drawings such that the claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 3, 5-10, and 14-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. As to claim 1, the limitation “another barrier layer in contact with a top surface of the another conductive layer facing away from the flexible substrate” fails to specify how “a top surface of the another conductive layer” is defined. Specifically, the top surface 10A of the flexible substrate 10 is defined at the top of FIG. 3B. The recited top surface of the another conductive layer 20 is actually in contact with the bottom surface 10B of the flexible substrate 10. The another barrier layer 30 actually covers and in contact with a bottom surface of the another conductive layer 20 and the flexible substrate 10 as seen in FIG. 3B. It is not clear how the orientations of the recited elements are relatively defined in the claimed limitation. It is not clear whether the limitation should read “a bottom surface”. Thus, the limitation renders the claims indefinite and clarification is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1, 3, 5-10, 14-16, and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2020/0176699 A1 to Lee et al. (“Lee”) in view of U.S. Patent Application Publication No. 2014/0217382 A1 to Kwon et al. (“Kwon”) and U.S. Patent Application Publication No. 2014/0042539 A1 to Hwang et al. (“Hwang”). As to claim 1, although Lee discloses a light-emitting device, comprising: a flexible substrate (PLN, ILD2) having a via (PH), a top surface (top), and a bottom surface (bottom); a light-emitting unit (ED) comprising a first electrode (AE with topmost layer) and a second electrode (CE), and disposed on the top surface (top) of the flexible substrate (PLN, ILD2); a thin film transistor (DA, DG) electrically connected to the light-emitting unit (ED); a circuit (300) disposed on the bottom surface (bottom) of the flexible substrate (PLN, ILD2) and transmitting a signal for driving the light-emitting unit (ED) through the via (PH); a conductive layer (AE with bottommost layer) disposed in the via (PH); a barrier layer (AE with middle covering layer) covering the conductive layer (AE with bottommost layer); another conductive layer (DD) electrically connected to and in contact with the conductive layer (AE with bottommost layer) and disposed outside the via (PH), wherein the conductive layer (AE with bottommost layer) and the another conductive layer (DD) are disposed on opposite sides of the flexible substrate (PLN, ILD2); and wherein the circuit (300) is electrically connected to the first electrode (AE with topmost layer) through the via (PH) and electrically connected to the first electrode (AE with topmost layer) through the thin film transistor (DA, DG) (See Fig. 1, Fig. 2, Fig. 3, Fig. 4, ¶ 0005, ¶ 0009, ¶ 0010, ¶ 0039, ¶ 0040, ¶ 0043, ¶ 0044, ¶ 0049, ¶ 0050, ¶ 0051, ¶ 0052, ¶ 0053, ¶ 0054, ¶ 0055, ¶ 0056, ¶ 0058, ¶ 0061, ¶ 0064, ¶ 0065, ¶ 0072, ¶ 0074, ¶ 0076, ¶ 0078, ¶ 0082, ¶ 0088, ¶ 0090, ¶ 0091, ¶ 0092, ¶ 0096, ¶ 0097, ¶ 0098, ¶ 0099, ¶ 0100, ¶ 0101, ¶ 0107, ¶ 0108, ¶ 0112, ¶ 0113, ¶ 0114, ¶ 0015) (Notes: the limitation “on the bottom surface of the flexible substrate” is interpreted as adjacent to the bottom surface of the flexible substrate relative to the top surface of the flexible substrate as seen in FIG. 3B of the Drawings. Furthermore, the recited “conductive layer” and “barrier layer” are not specified with any materials and further met by the materials recited in Claims 7 and 8), Lee does not further disclose another barrier layer in contact with a top surface of the another conductive layer facing away from the flexible substrate. Further, Lee specifically discloses wherein the circuit (300) is mounted in parallel to a lower edge which is not to be folded or rolled (See Fig. 1, ¶ 0043, ¶ 0065) and Kwon discloses a circuit (562) disposed on the bottom surface (bottom) of the flexible substrate (510) and transmitting a signal for driving (See Fig. 5B, ¶ 0049, ¶ 0079, ¶ 0080, ¶ 0081). Furthermore, Hwang does disclose another barrier layer (230/240) in contact with a top surface of the another conductive layer (240, 282, 284/230) and is buried (See Fig. 2, ¶ 0007, ¶ 0008, ¶ 0027, ¶ 0029, ¶ 0030, ¶ 0031, ¶ 0032, ¶ 0033, ¶ 0034) (Notes: the materials of the layers are not specified). In view of the teachings of Lee, Kwon, and Hwang, it would have been obvious to one of ordinary skill in the art to have the circuit disposed on the bottom surface of the flexible substrate and another barrier layer in contact with a top surface of the another conductive layer facing away from the flexible substrate because the circuit can be accurately secured with a reduced overall size of the device (See Kwon ¶ 0081). Further, the another barrier layer in combination with the another conductive layer provide a control diffusion to prevent short channel effect, a malfunction of the device, and the damage of the active layer (See Hwang ¶ 0033, ¶ 0034). As to claim 3, Lee further discloses wherein the thin film transistor (DA, DG) is disposed on the bottom surface (bottom) of the flexible substrate (PLN, ILD2) (See Fig. 3). As to claim 5, Lee further discloses wherein the circuit (300) comprises a semiconductor chip (300) (See Fig. 1, ¶ 0065). As to claim 6, Lee in view of Kwon discloses further comprising: a supporting layer (FS/550B); and a connecting layer (GI) disposed between the flexible substrate (PLN, ILD2) and the supporting layer (FS/550B), wherein a thickness of the semiconductor chip (300/562) is less than a sum of the thicknesses of the supporting layer (FS/550B) and the connecting layer (GI) in a normal direction of the flexible substrate (PLN, ILD2) (See Lee Fig. 3, ¶ 0040, ¶ 0043, ¶ 0065, ¶ 0088 and Kwon Fig. 5B, ¶ 0081) (Notes: the supporting layer supports the flexible substrate with the connecting layer bonded between thereof). As to claim 7, Lee further discloses wherein the conductive layer (AE with bottommost layer) comprises a material selected from a group consisting of Cu, Ag, Al, Mo, Ti, and a combination thereof (See ¶ 0101). As to claim 8, Lee further discloses wherein the barrier layer (AE with middle covering layer of APC including Ag) comprises a material selected from a group consisting of Ni, Pt, Ag, and a combination thereof (See ¶ 0101) (Notes: Lee et al. (US 2020/0043949 A1) discloses APC (Ag/Pd/Cu) in ¶ 0091). As to claim 9, Lee further discloses wherein a thickness of the conductive layer (AE with bottommost layer) is less than a thickness of the flexible substrate (PLN, ILD2) (See Fig. 3). As to claim 10, Lee discloses further comprising a protective layer (BN) covering the barrier layer (AE with middle covering layer), wherein a portion of the protective layer (BN) is disposed in the via (PH) (See Fig. 3, ¶ 0099) (Notes: the layers are conformally disposed to be in the via). As to claim 14, Lee further discloses wherein the via (PH) is filled with a conductive material (thermally conductive materials such as electrode and bank materials) (See Fig. 3, ¶ 0101). As to claim 15, Lee further discloses wherein the circuit (300) is electrically connected to the thin film transistor (DA, DG) and transmits the signal to the thin film transistor (DA, DG) (See Fig. 1, ¶ 0061, ¶ 0064). As to claim 16, Lee discloses further comprising: another light-emitting unit (ED of another pixel P); and a package structure (encapsulation layer), wherein the light-emitting unit (ED) and the another light-emitting unit (ED of another pixel P) are packaged in the package structure (encapsulation layer) (See Fig. 1, Fig. 2, Fig. 4, ¶ 0039, ¶ 0044, ¶ 0051, ¶ 0058, ¶ 0107) (Notes: the package structure is a layer encapsulating/covering the light-emitting units). As to claim 18, Lee further discloses wherein the circuit (300) is electrically connected to the first electrode (AE with topmost layer) through the conductive layer (AE with bottommost layer) and the another conductive layer (DD) (See Fig. 3). As to claim 19, Lee further discloses wherein the circuit (300) is electrically connected to the thin film transistor (DA, DG) through a first conductive wire (SL, PL), and the circuit (300) is electrically connected to the second electrode (CE) through a second conductive wire (CPL) (See Fig. 1, ¶ 0010, ¶ 0039, ¶ 0055, ¶ 0074).
Claim(s) 17 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2020/0176699 A1 to Lee et al. (“Lee”), U.S. Patent Application Publication No. 2014/0217382 A1 to Kwon et al. (“Kwon”), and U.S. Patent Application Publication No. 2014/0042539 A1 to Hwang et al. (“Hwang”) as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2014/0367661 A1 to Akagawa et al. (“Akagawa”). The teachings of Lee, Kwon, and Hwang have been discussed above. As to claim 17, although Lee discloses further comprising: a supporting layer (GI) of silicon oxide/silicon nitride; and a connecting layer (ILD1) disposed between the flexible substrate (PLN, ILD2) of epoxy resin and the supporting layer (GI) (See Fig. 3, ¶ 0078, ¶ 0088, ¶ 0090, ¶ 0097) (Notes: the supporting layer supports the flexible substrate with the connecting layer bonded between thereof), Lee, Kwon, and Hwang do not specifically disclose wherein a hardness of the supporting layer is greater than a hardness of the flexible substrate. However, Akagawa does disclose wherein a hardness of the supporting layer (34a) of silicon oxide/silicon nitride is greater than a hardness of the flexible substrate (34b) of epoxy resin (See ¶ 0035, ¶ 0036, ¶ 0037, ¶ 0112, ¶ 0118, ¶ 0120). In view of the teachings of Lee and Akagawa, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that Lee suggests wherein a hardness of the supporting layer is greater than a hardness of the flexible substrate because the supporting layer of silicon oxide/silicon nitride is known to have a hardness greater than a hardness of the flexible substrate of epoxy resin (See Lee ¶ 0088, ¶ 0090, ¶ 0097 and Akagawa ¶ 0118, ¶ 0120). Further regarding the recited limitations above, the claim limitations “transmitting a signal for driving the light-emitting unit and transmits the signal to the thin film transistor” specify an intended use or field of use, and is met by the prior art since it has been held that in device claims, intended use must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex Parte Masham, 2 USPQ 2d 1647 (Bd. Pat. App. & Inter. 1987).
Claim(s) 1, 3, 5-6, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2021/0057572 A1 to Chen et al. (“Chen”). As to claim 1, Chen discloses a light-emitting device, comprising: a flexible substrate (110) having a via (below 125), a top surface (111), and a bottom surface (112); a light-emitting unit (140) comprising a first electrode (cathode/anode) and a second electrode (anode/cathode), and disposed on the top surface (111) of the flexible substrate (110); a thin film transistor (120) electrically connected to the light-emitting unit (140); a circuit (200) disposed on the bottom surface (112) of the flexible substrate (110) and transmitting a signal for driving the light-emitting unit (140) through the via (below 125); a conductive layer (in contact with 125) disposed in the via (below 125); a barrier layer (150) covering the conductive layer (in contact with 125); another conductive layer (22) electrically connected to and in contact with the conductive layer (in contact with 125) and disposed outside the via (below 125), wherein the conductive layer (in contact with 125) and the another conductive layer (22) are disposed on opposite sides of the flexible substrate (110); and another barrier layer (210v) in contact with a top surface of the another conductive layer (22) facing away from the flexible substrate (110), wherein the circuit (200) is electrically connected to the first electrode (cathode/anode) through the via (below 125) and electrically connected to the first electrode (cathode/anode) through the thin film transistor (120) (See Fig. 1, Fig. 2, ¶ 0020, ¶ 0021, ¶ 0022, ¶ 0024, ¶ 0026, ¶ 0027, ¶ 0031, ¶ 0040, ¶ 0041) (Notes: the first and second electrodes or cathode and anode electrodes of the light-emitting unit are known in the art to control the light-emitting unit. Further, limitation “on the bottom surface of the flexible substrate” is interpreted as adjacent to the bottom surface of the flexible substrate relative to the top surface of the flexible substrate as seen in FIG. 3B of the Drawings. Furthermore, the recited “conductive layer” and “barrier layer” are not specified with any materials. Lastly, the conductive layer as interconnect to transmit signals is commonly practiced in the art). As to claim 3, Chen further discloses wherein the thin film transistor (120) is disposed on the bottom surface (112) of the flexible substrate (110) (See Fig. 2). As to claim 5, Chen further discloses wherein the circuit (200) comprises a semiconductor chip (200) (See Fig. 2, ¶ 0027). As to claim 6, Chen discloses further comprising: a supporting layer (230); and a connecting layer (210) disposed between the flexible substrate (110) and the supporting layer (230), wherein a thickness of the semiconductor chip (200) is less than a sum of the thicknesses of the supporting layering (230) and the connecting layer (210) in a normal direction of the flexible substrate (110) (See Fig. 2). As to claim 15, Chen further discloses wherein the circuit (200) is electrically connected to the thin film transistor (120) and transmits the signal to the thin film transistor (120) (See Fig. 2, ¶ 0027).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID CHEN whose telephone number is (571)270-7438. The examiner can normally be reached M-F 12-6.
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/DAVID CHEN/Primary Examiner, Art Unit 2815
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