DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 17, & 19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 13-14 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 13 recites the limitation "the first transistor" in line 4. There is insufficient antecedent basis for this limitation in the claim. For examination purposes, examiner has interpreted “the first transistor” to read “the transistor”.
By virtue of its dependency on claim 13, claim 14 is also rejected.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 7-10, 15, & 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Washburn (US 2005/0231270 A1) in view of Kanoun (US 11,099,594 B1), and further in view of Deng (US 10,222,817 B1).
Regarding claim 1, Washburn discloses, in figure 2 & 6A, a bandgap reference circuit comprising:
a first (48) current source to provide a first current (Para [0032], “PTAT current I.sub.PTAT is applied by current mirroring MOSFET 48 to resistor 66 and a voltage is developed across resistor 66”), the first current source to provide a proportional to absolute temperature (PTAT) voltage via a resistor (Para [0032], “PTAT current I.sub.PTAT is applied by current mirroring MOSFET 48 to resistor 66 and a voltage is developed across resistor 66”);
a second (46) current source to provide a second current (Para [0029], “MOSFET 46…provide substantially equal flows of current…I.sub.2”), the second current source to provide a complementary to the absolute temperature (CTAT) voltage via a transistor (Para [0034], “current generating means 100…is equivalent to a CTAT voltage source V.sub.CTAT”…via transistor 54 coupled to MOSFET 46);
an output node (V.sub.OUT) to provide a bandgap voltage that is a weighted sum of the PTAT voltage and the CTAT voltage (Para [0003], “bandgap voltage reference circuit generates…the two voltages [i.e., PTAT and CTAT voltages]…and summed to produce the temperature-stable reference voltage”), but fails to disclose wherein the weighted sum is determined according to (i) a first variable resistor coupled to the output node and the first current source, and (ii) a second variable resistor coupled to the output node and the second current source, wherein the first variable resistor is configured to resistor-divide the PTAT voltage and the second variable resistor is configured to resistor-divide the CTAT voltage.
However, Deng discloses, in figure 2, resistor-dividing the PTAT voltage and the CTAT voltage (Col. 7, Lines 21-39, “CTAT current 212 may be derived by dividing the voltage V1 278 by a resistance value of the resistor R3 260 of the CTAT stage 210…PTAT current 208 may be derived from the difference between the voltage V3 282 and the voltage V4 284, that is, b*T, and by dividing the difference by a resistance value of the resistor R1 240 of the PTAT stage 206”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the resistor-division of Deng in the bandgap reference circuit of Washburn, since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions (deriving the CTAT and PTAT currents from the applied voltages utilizing a resistor), and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415‐421, 82 USPQ2d 1385).
In combination, Washburn and Deng fail to disclose a first variable resistor and a second variable resistor, wherein the weighted sum is determined according to (i) a first variable resistor coupled to the output node and the first current source, and (ii) a second variable resistor coupled to the output node and the second current source, and variable resistors for the resistor-dividing.
However, Kanoun discloses, in figure 5, wherein the weighted sum (Col. 8 & 9, Lines 67 & 1, “combined CTAT and PTAT current components into a reference voltage, V.sub.REF”) is determined according to a (i) first variable resistor coupled to the output node and the first current source (RSD4 coupled to output node 540 and first current source 510) and (ii) a second variable resistor coupled to the output node and the second (R3 is coupled to the output node 540 and second current source 520 via R2) current source, and variable resistors for the resistor-dividing (Col. 11, Lines 24-27, “bandgap reference circuit 500 includes a plurality of variable resistors (e.g., R2, R3, RSD4, RSD5, RSD6, and RSD7) that can be adjusted (i.e., trimmed) to change (i) a value of the reference voltage [V.sub.REF] or reference current”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the variable resistors of Kanoun in the bandgap reference circuit of Washburn and Deng, to achieve the benefit of adjusting the bandgap voltage at a particular temperature and/or a rate of change of the bandgap voltage over a range of temperatures (Kanoun, Col. 11, Lines 26-30).
Regarding claim 2, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 1, and Kanoun continues to disclose, in figure 5, wherein the first variable resistor is coupled between the output node and a first node (variable resistor RSD4 coupled between output node V.sub.REF and a first node), and the second variable resistor is coupled between the output node and a second node (variable resistor R3 coupled between V.sub.REF and a second node).
Regarding claim 3, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 1, and Washburn continues to disclose, in figure 2 & 6A, wherein the transistor comprises a bipolar junction transistor (BJT) device (Para [0026], “transistor 54…configured as PNP transistor”).
Regarding claim 4, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 3, and Kanoun continues to disclose, in figure 5, a switch coupled to an amplifier and the first current source (switch MNG coupled to amplifier A1 and to the first current source 410 producing the PTAT current).
Regarding claim 5, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 4, and Kanoun continues to disclose, in figure 5, wherein the switch is coupled to a third current mirror (switch MNG is coupled to the third current output mirror 550 via R2).
Regarding claim 7, the combination of Washburn, Deng, and Kanoun discloses the bandgap reference circuit of claim 1, and Washburn continues to disclose, in figure 5, wherein the bandgap voltage is less than 750 millivolts (the bandgap voltage V.sub.OUT is plotted in figure 5 with varying V.sub.DD voltage levels, but does not exceed roughly 637 millivolts).
Regarding claim 8, the combination of Washburn, Deng, and Kanoun discloses the bandgap reference circuit of claim 1, and Washburn continues to disclose, in figure 2, wherein the bandgap voltage has a temperature coefficient less than 1000 parts-per-million per degree Celsius (Para [0035], “determines the net temperature coefficient at node N7 [i.e., indicative of the output bandgap voltage]…with a desired value…such as, for example, zero…is obtained”).
Regarding claim 9, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 1, and Washburn continues to disclose, in figure 2 & 6A, wherein the transistor comprises a bipolar junction transistor (BJT) device having a base terminal and a collector terminal coupled to ground to form a diode connection (Para [0026], “transistor 54…configured as PNP transistor”…with a base terminal and collector terminal coupled to GND).
Regarding claim 10, the combination of Washburn, Deng, and Kanoun discloses the bandgap reference circuit of claim 1, and Washburn continues to disclose, in figure 2, an amplifier (42) coupled to the first current source and the second current source to provide a bias voltage to the first current source (Para [0024], “op-amp 42 is normally biased”…and thus provides a bias voltage to MOSFET 48 and MOSFET 46 via node N3);
Regarding claim 15, the combination of Washburn, Deng, and Kanoun discloses the bandgap reference circuit of claim 1, and Washburn continues to disclose, in figure 2, wherein the first current source and the second current source each comprise at least one metal oxide semiconductor field effect transistor (MOSFET) device (Para [0025], “Metal oxide semiconductor transistors (MOSFETs) 44, 46 and 48”).
Regarding claim 17, Washburn discloses, in figure 2 & 6A, a bandgap reference circuit comprising:
an amplifier to provide a bias voltage (Para [0024], “op-amp 42 is normally biased”…and thus provides a bias voltage to MOSFET 48 and MOSFET 46 via node N3);
a first current source (48) coupled to the amplifier to receive the bias voltage (Para [0024], “op-amp 42 is normally biased”…and thus provides a bias voltage to MOSFET 48 via node N3) and provide a first current (Para [0032], “PTAT current I.sub.PTAT is applied by current mirroring MOSFET 48 to resistor 66 and a voltage is developed across resistor 66”);
a second current source (46) coupled to the amplifier to receive the bias voltage (Para [0024], “op-amp 42 is normally biased”…and thus provides a bias voltage to MOSFET 46 via node N3) and provide a second current (Para [0029], “MOSFET 46…provide substantially equal flows of current…I.sub.2”); and
a pair of resistors coupled in between the first current source and the second current source (resistor 66 and 64 coupled in between each first and second current source, respectively), but fails to disclose the pair of resistors comprising:
a first variable resistor coupled to the first current source;
a second variable resistor coupled to the second current source; and
an output node coupled to (i) the first variable resistor and (ii) the second variable resistor to provide a bandgap voltage that is a weighted sum of a proportional to absolute temperature (PTAT) voltage and a complementary to the absolute temperature (CTAT) voltage, wherein the first variable resistor is configured to resistor-divide the PTAT voltage and the second variable resistor is configured to resistor-divide the CTAT voltage.
However, Deng discloses, in figure 2, resistor-dividing the PTAT voltage and the CTAT voltage (Col. 7, Lines 21-39, “CTAT current 212 may be derived by dividing the voltage V1 278 by a resistance value of the resistor R3 260 of the CTAT stage 210…PTAT current 208 may be derived from the difference between the voltage V3 282 and the voltage V4 284, that is, b*T, and by dividing the difference by a resistance value of the resistor R1 240 of the PTAT stage 206”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the resistor-division of Deng in the bandgap reference circuit of Washburn, since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions (deriving the CTAT and PTAT currents from the applied voltages utilizing a resistor), and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415‐421, 82 USPQ2d 1385).
In combination, Washburn and Deng fail to disclose the pair of resistors comprising:
a first variable resistor coupled to the first current source;
a second variable resistor coupled to the second current source; and
an output node coupled to (i) the first variable resistor and (ii) the second variable resistor to provide a bandgap voltage that is a weighted sum of a proportional to absolute temperature (PTAT) voltage and a complementary to the absolute temperature (CTAT) voltage
However, Kanoun discloses, in figure 2, the pair of resistors (Col. 11, Lines 24-27, “bandgap reference circuit 500 includes a plurality of variable resistors (e.g., R2, R3, RSD4, RSD5, RSD6, and RSD7) that can be adjusted (i.e., trimmed) to change (i) a value of the reference voltage [V.sub.REF] or reference current”) comprising:
a first variable resistor (RSD4) coupled to the first current source (RSD4 coupled to the first current source 510 generating PTAT current);
a second variable resistor (R3) coupled to the second current source (R3 coupled to the second current source generating CTAT current via R2); and
an output node coupled to (i) the first variable resistor and (ii) the second variable resistor (V.sub.REF coupled to resistor RSD4 and R3) to provide a bandgap voltage that is a weighted sum of a proportional to absolute temperature (PTAT) voltage and a complementary to the absolute temperature (CTAT) voltage (Col. 8 & 9, Lines 67 & 1, “combined CTAT and PTAT current components into a reference voltage, V.sub.REF”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the variable resistors of Kanoun in the bandgap reference circuit of Washburn and Deng, to achieve the benefit of adjusting the bandgap voltage at a particular temperature and/or a rate of change of the bandgap voltage over a range of temperatures (Kanoun, Col. 11, Lines 26-30).
Regarding claim 18, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 17, and Washburn continues to disclose, in figure 2, wherein the first current source comprises:
a first p-type metal-oxide-semiconductor (PMOS) device coupled to the amplifier (Para [0025], “48…configured as p-channel MOSFETs”…and its gate coupled to the amplifier); and
a first resistor (66) coupled to the first PMOS device to receive the bias voltage and provide the PTAT voltage (Para [0032], “PTAT current I.sub.PTAT is applied by current mirroring MOSFET 48 to resistor 66 and a voltage is developed across resistor 66”);
Regarding claim 19, Washburn discloses, in figure 2 & 6A, a method to provide a bandgap reference, the method comprising:
generating a proportional to absolute temperature (PTAT) voltage based on a first current source (Para [0032], “PTAT current I.sub.PTAT is applied by current mirroring MOSFET 48 to resistor 66 and a voltage is developed across resistor 66”);
generating a complementary to the absolute temperature (CTAT) voltage based on a second current source (Para [0034], “current generating means 100…is equivalent to a CTAT voltage source V.sub.CTAT”…via transistor 54 coupled to MOSFET 46); and
providing a bandgap voltage (Para [0003], “bandgap voltage reference circuit”) according to a weighted sum of the PTAT voltage and the CTAT voltage (Para [0003], “CTAT voltage…PTAT voltage…the two voltages are voltage-divided as necessary and summed to produce the temperature-stable reference voltage”), but fails to disclose wherein the weighted sum is determined according to (i) a first variable resistor coupled to the output node and the first current source, and (ii) a second variable resistor coupled to the output node and the second current source, wherein the first variable resistor is configured to resistor-divide the PTAT voltage and the second variable resistor is configured to resistor-divide the CTAT voltage.
However, Deng discloses, in figure 2, resistor-dividing the PTAT voltage and the CTAT voltage (Col. 7, Lines 21-39, “CTAT current 212 may be derived by dividing the voltage V1 278 by a resistance value of the resistor R3 260 of the CTAT stage 210…PTAT current 208 may be derived from the difference between the voltage V3 282 and the voltage V4 284, that is, b*T, and by dividing the difference by a resistance value of the resistor R1 240 of the PTAT stage 206”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the resistor-division of Deng in the bandgap reference circuit of Washburn, since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions (deriving the CTAT and PTAT currents from the applied voltages utilizing a resistor), and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415‐421, 82 USPQ2d 1385).
In combination, Washburn and Deng fail to disclose wherein the weighted sum is determined according to (i) a first variable resistor coupled to the output node and the first current source, and (ii) a second variable resistor coupled to the output node and the second current source.
However, Kanoun discloses, in figure 5, wherein the weighted sum (Col. 8 & 9, Lines 67 & 1, “combined CTAT and PTAT current components into a reference voltage, V.sub.REF”) is determined according to a (i) first variable resistor coupled to the output node and the first current source (RSD4 coupled to output node 540 and first current source 510) and (ii) a second variable resistor coupled to the output node and the second (R3 is coupled to the output node 540 and second current source 520 via R2) current source (Col. 11, Lines 24-27, “bandgap reference circuit 500 includes a plurality of variable resistors (e.g., R2, R3, RSD4, RSD5, RSD6, and RSD7) that can be adjusted (i.e., trimmed) to change (i) a value of the reference voltage [V.sub.REF] or reference current”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the variable resistors of Kanoun in the bandgap reference circuit of Washburn and Deng, to achieve the benefit of adjusting the bandgap voltage at a particular temperature and/or a rate of change of the bandgap voltage over a range of temperatures (Kanoun, Col. 11, Lines 26-30).
Regarding claim 20, the combination of Washburn, Deng, and Kanoun discloses the method of claim 19, and Washburn continues to disclose, in figure 5, wherein the bandgap voltage is less than 750 millivolts (the bandgap voltage V.sub.OUT is plotted in figure 5 with varying V.sub.DD voltage levels, but does not exceed roughly 637 millivolts).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over the combination of Washburn, Deng, and Kanoun as applied to claims 1-5, 7-10, 15, & 17-20 above, and further in view of Chen (US 2008/0157746 A1).
Regarding claim 6, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 4, but fail to disclose wherein the switch comprises a control port coupled to a comparator configured to receive a supply voltage and a reference voltage.
However, Chen discloses, in figure 7, wherein the switch (MN0) comprises a control port coupled to a comparator configured to receive a supply voltage and a reference voltage (switch MN0 with a gate coupled to comparator CP receiving voltage VA and reference voltage Vr).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the comparator of Chen in the switch control of Washburn, Deng, and Kanoun, since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions (i.e., controlling the switching function of a switch), and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415‐421, 82 USPQ2d 1385).
Claim 11 & 16 are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Washburn, Deng, and Kanoun as applied to claims 1-5, 7-10, 15, & 17-20 above, and further in view of Georgescu et al. (US 2007/0152740 A1), hereinafter Georgescu.
Regarding claim 11, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 10, but fail to disclose wherein the amplifier is a two-stage operational amplifier.
However, Georgescu discloses, in figure 6, wherein the amplifier is a two-stage operational amplifier (Para [0057], “op amp 440 may be referred to as a 2-stage OTA”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the operational amplifier of Georgescu in the bandgap reference circuit of Washburn, Deng, and Kanoun, since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions (i.e., utilizing a well-known element), and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415‐421, 82 USPQ2d 1385).
Regarding claim 16, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 1, and Kanoun continues to disclose, in figure 5, wherein the first resistor and second resistor are variable resistors (Col. 11, Lines 24-27, “bandgap reference circuit 500 includes a plurality of variable resistors (e.g., R2, R3, RSD4, RSD5, RSD6, and RSD7) that can be adjusted (i.e., trimmed) to change (i) a value of the reference voltage [V.sub.REF] or reference current”), but fails to disclose wherein a ratio of a resistance of the second resistor and a resistance of the first resistor is greater than ten.
However, Georgescu discloses, in figure 6, wherein a ratio of a resistance of the second resistor (Z3) and a resistance of the first resistor (Z5) is greater than ten (Para [0057], “impedance blocks Z1-Z7 may be configured such that: Z1=12R, Z2=48R, Z3=112R, Z4=80R, Z5=7R, Z6=6R, Z7=36R when R=816.3265 .OMEGA.”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the resistance ratio of Georgescu in the bandgap reference circuit of Washburn, Deng, and Kanoun, to achieve the benefit of compensating for voltage offsets in the current mirror portion of the bandgap circuit (Georgescu, Para [0043]).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over the combination of Washburn, Deng, and Kanoun as applied to claims 1-5, 7-10, 15, & 17-20 above, and further in view of Tachibana et al. (US 2008/0001661 A1), hereinafter Tachibana.
Regarding claim 12, the combination of Washburn, Deng, and Kanoun disclose the bandgap reference circuit of claim 10, but fail to disclose wherein the amplifier is a three-stage amplifier.
However, Tachibana discloses, in figure 2, wherein the amplifier is a three-stage amplifier (Para [0017], “three amplification stages”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the operational amplifier of Tachibana in the bandgap reference circuit of Washburn, Deng, and Kanoun, to achieve the benefit of a high speed response and increased stability within the circuit (Tachibana, Para [0020]).
Claims 13-14 is rejected under 35 U.S.C. 103 as being unpatentable over the combination of Washburn, Deng, and Kanoun, as applied to claims 1-5, 7-10, 15, & 17-20 above, and further in view of Harris (US 6,362,612 B1).
Regarding claim 13, as best understood based on the 35 U.S.C. 112(b) rejection made above, the combination of Washburn, Deng, and Kanoun discloses the bandgap reference circuit of claim 10, and Washburn continues to disclose, in figure 2, the bandgap reference circuit further comprising:
a second resistor (62) coupled to a first input of the amplifier (resistor 62 is coupled to the non-inverting input of the operational amplifier 42); and
a third transistor (Para [0026], “transistor 52…configured as PNP transistor”) coupled to a second input of the amplifier (transistor 52 is coupled to the inverting input of the operational amplifier 42), but fails to disclose a second transistor coupled to the transistor.
However, Harris discloses, in figure 2, a second transistor (Q.sub.2) coupled to the transistor (Q.sub.2 is coupled to the transistor Q.sub.3).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the BJT of Harris in the bandgap reference circuit of Washburn, Deng, and Kanoun, to achieve the benefit of a temperature-stabilized output of the bandgap circuit (Harris, Col. 6, Lines 44-45).
Regarding claim 14, the combination of Washburn, Deng, Kanoun, and Harris discloses the bandgap reference circuit of claim 13, and Washburn continues to disclose, in figure 2, wherein the transistor and the second transistor each comprise a bipolar junction transistor (BJT) (Para [0026], “transistor 54…configured as PNP transistor”), but fail to disclose wherein an emitter area of the second transistor is at least two times as large as an emitter area of the transistor device.
However, Harris discloses, in figure 2, wherein an emitter area of the second transistor is at least two times as large as an emitter area of the transistor (Col. 6, Lines 57-58, “Q.sub.2 has eight times the emitter area of Q.sub.3”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the larger emitter area of Harris in the second transistor of Washburn, Deng, and Kanoun, since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions [i.e., employing a transistor in the current mirror with increased current handling capability], and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415‐421, 82 USPQ2d 1385).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Eberlein (US 11,029,718 B2) [Figure 4A. Discloses a first supply node; a second supply node; a first transistor coupled to the first supply node, the first transistor is to provide a first current which is complementary to absolute temperature (CTAT); a second transistor coupled to the first supply node, the second transistor is to provide a second current which is proportional to absolute temperature (PTAT); a resistive device coupled in series at a node with the first and second transistors, and coupled to the second supply node, wherein the node is to sum the CTAT and the PTAT currents.]
Eberlein (US 2014/0266139 A1) [Figure 3. Discloses A circuit for generating a temperature-stabilized reference voltage on a semiconductor chip includes a differential amplifier having a first input, a second input and an output. The circuit further includes a CTAT circuit configured to generate a CTAT voltage at an output thereof. A first resistor is coupled between the output of the differential amplifier and the output of the CTAT circuit. Further, the first resistor is connected between the first input and the second input of the differential amplifier.]
Mouret et al. (US 2020/0192414 A1) [Figure 1. Discloses a sub-bandgap reference source circuit, which comprises a current mirror source, a first branch comprising a first BJT and a second branch comprising a second BJT, the first BJT having an emitter current density lower than an emitter current density of the second BJT, the first branch and the second branch being connected at a first node coupled to ground; a first voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between a base terminal of the first BJT and a second node, the second resistor being coupled to ground; a second voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between the second node and a base terminal of the second BJT, the second resistance being coupled to the first node; and an output terminal coupled to the second node.]
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/TYLER J PERENY/Examiner, Art Unit 2836
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