Prosecution Insights
Last updated: October 01, 2026
Application No. 18/787,862

RF MEASUREMENT FROM A TRANSMISSION LINE SENSOR

Non-Final OA §DP
Filed
Jul 29, 2024
Priority
May 05, 2022 — continuation of 12/061,215
Examiner
ALEJNIKOV JR, ROBERT P
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Applied Materials Inc.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
327 granted / 381 resolved
+17.8% vs TC avg
Strong +18% interview lift
Without
With
+17.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
14 currently pending
Career history
393
Total Applications
across all art units

Statute-Specific Performance

§101
5.3%
-34.7% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
22.2%
-17.8% vs TC avg
§112
23.1%
-16.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 381 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group I (claims 10-12) in the reply filed on 7/8/2026 is acknowledged. Information Disclosure Statement The information disclosure statements (IDSs) submitted are in compliance with the provisions of 37 CFR 1.97. Accordingly, the IDSs are being considered by the examiner. Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 731 & 761. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-12 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1- of U.S. Patent No. 12061215. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application are broader than the claims of the patent. Please see below a chart of patent claims corresponding to the claims of the instant application. Instant Application US Patent No. 12061215 A sensor, comprising: a board, wherein an aperture is formed through the board; a current loop winding through the board around the aperture; a voltage ring around the aperture and within an inner perimeter of the current loop; a guard ring around the current loop; and one or more baluns in corresponding cutouts in the guard ring. A sensor, comprising: a board, wherein an aperture is formed through the board; a current loop winding through the board around the aperture; a voltage ring around the aperture and within an inner perimeter of the current loop, wherein the voltage ring comprises: an interior ring; an insulator ring around the interior ring; and an exterior ring around the insulator ring; a guard ring around the current loop; and one or more baluns in corresponding cutouts in the guard ring. The sensor of claim 1, wherein the current loop comprises a first winding and a second winding. 2. The sensor of claim 1, wherein the current loop comprises a first winding and a second winding. The sensor of claim 1, wherein the current loop comprises sixteen or more vias through the board. 3. The sensor of claim 1, wherein the current loop comprises sixteen or more vias through the board. The sensor of claim 1, further comprising: a total of four baluns in corresponding cutouts in the guard ring along the current loop. 4. The sensor of claim 1, further comprising: a total of four baluns in corresponding cutouts in the guard ring along the current loop. The sensor of claim 1, wherein a set of pickup circuitry for the current loop is electrically isolated from a set of pickup circuitry for the voltage ring. 5. The sensor of claim 1, wherein a set of pickup circuitry for the current loop is electrically isolated from a set of pickup circuitry for the voltage ring. The sensor of claim 5, wherein an isolation feature between the current loop and the voltage ring is a grounded via through the board. 6. The sensor of claim 5, wherein an isolation feature between the current loop and the voltage ring is a grounded via through the board. The sensor of claim 1, further comprising: a second aperture through the board; a second current loop around the second aperture; and a second voltage ring within a perimeter of the current loop. 8. The sensor of claim 1, further comprising: a second aperture through the board; a second current loop around the second aperture; and a second voltage ring within a perimeter of the current loop. The sensor of claim 7, further comprising: the guard ring around the current loop; and a second guard ring around the second current loop. 9. The sensor of claim 8, further comprising: the guard ring around the current loop; and a second guard ring around the second current loop. The sensor of claim 8, wherein the position of second vias of the second guard ring are rotated relative to the position of first vias of the first guard ring. 10. The sensor of claim 9, wherein the position of second vias of the second guard ring are rotated relative to the position of first vias of the first guard ring. A sensor, comprising: a board, wherein an aperture is provided through the board; a current loop around the aperture, wherein the current loop comprises: an inner set of vias; an outer set of vias; and a plurality of conductive traces, wherein each conductive trace couples a via of the inner set of vias to a via of the outer set of vias, and wherein the plurality of conductive traces alternate from being on a top surface of the board and on a bottom surface of the board; a voltage ring within an inner perimeter of the current loop; a guard ring around the current loop; and one or more baluns in corresponding cutouts in the guard ring. 11. A sensor, comprising: a board, wherein an aperture is provided through the board; a current loop around the aperture, wherein the current loop comprises: an inner set of vias; an outer set of vias; and a plurality of conductive traces, wherein each conductive trace couples a via of the inner set of vias to a via of the outer set of vias, and wherein the plurality of conductive traces alternate from being on a top surface of the board and on a bottom surface of the board; a voltage ring within an inner perimeter of the current loop, wherein the voltage ring comprises: an interior ring; an insulator ring around the interior ring; and an exterior ring around the insulator ring; a guard ring around the current loop; and one or more baluns in corresponding cutouts in the guard ring. The sensor of claim 10, wherein a number of the inner set of vias is equal to a number of the outer set of vias. 12. The sensor of claim 11, wherein a number of the inner set of vias is equal to a number of the outer set of vias. The sensor of claim 10, wherein a set of pickup circuitry for the current loop is electrically isolated from a set of pickup circuitry for the voltage ring. 13. The sensor of claim 11, wherein a set of pickup circuitry for the current loop is electrically isolated from a set of pickup circuitry for the voltage ring. Allowable Subject Matter If the double patenting rejections and objections above are resolved, claims 1-12 would be allowed. The following is a statement of reasons for the indication of allowable subject matter. The examiner incorporates by reference the Notice of Allowance in related case 17/737682, and further notes that the closest references found based on the examiner's search are: United States Patent App. Pub. No. 2018/0191326 to Lin et al., which discloses a planar balun and multi-layer circuit board; Chinese Patent Document No. CN108227839A to Ding et al., which discloses a portable electronic device and antenna thereof; and Japanese Patent Document No. JP2004518384A to ベルンハルト キース, which discloses a balanced/unbalanced transformer. However, the references taken individually or in combination neither disclose nor fairly suggest the following limitations of the allowed claims: in claim 1, “A sensor, comprising . . . a guard ring around the current loop; and one or more baluns in corresponding cutouts in the guard ring,” and in claim 10, “A sensor, comprising . . . a guard ring around the current loop; and one or more baluns in corresponding cutouts in the guard ring,” in combination with all other limitations. Claims 2-9 and 11-12 are allowed as being dependent on claims 1 and 10, respectively. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Robert P Alejnikov whose telephone number is (571)270-5164. The examiner can normally be reached 10:00a-6:00p M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arleen Vazquez can be reached at 571.272.2619. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBERT P ALEJNIKOV JR/Examiner, Art Unit 2857 /ARLEEN M VAZQUEZ/Supervisory Patent Examiner, Art Unit 2857
Read full office action

Prosecution Timeline

Jul 29, 2024
Application Filed
Aug 24, 2026
Non-Final Rejection mailed — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12730163
HALL SENSOR SYSTEM BIASED IN CURRENT
2y 9m to grant Granted Sep 08, 2026
Patent 12730091
Method and Systems for Analyzing Ions Using Differential Mobility Spectrometry and Ion Guide Comprising Additional Auxiliary Electrodes
2y 2m to grant Granted Sep 08, 2026
Patent 12724077
STATE OF CHARGE CALIBRATION FOR BATTERY CELLS
2y 4m to grant Granted Sep 01, 2026
Patent 12716930
METHODS AND SYSTEMS FOR DETECTION, LOCATION AND CHARACTERIZATION OF SIGNAL SOURCES IN ELECTRICAL INFRASTRUCTURE USING DISTRIBUTED SENSORS
2y 1m to grant Granted Aug 25, 2026
Patent 12710840
MEASURING PHASORS OF PHASE QUADRATURE SIGNALS FOR CAPACITIVE SENSING
1y 11m to grant Granted Aug 18, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+17.6%)
2y 5m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 381 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month