Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claim 12 is rejected under 35 U.S.C. 112(a) because the specification, as originally filed, does not reasonably convey to one of ordinary skill in the art that the inventor had possession of the claimed invention.
Specifically, claim 12 recites:
"the thickness of a first concentration doped region ranges from 100 nm to 200 nm and the thickness of a second concentration doped region ranges from 100 nm to 150 nm."
However, the specification fails to disclose or describe a "first concentration doped region" or a "second concentration doped region." Instead, the specification describes a first semiconductor layer, a light emitting layer, and a second semiconductor layer, together with their respective thicknesses. The specification contains no description identifying concentration-doped regions or their corresponding thicknesses.
Accordingly, the originally filed disclosure does not reasonably convey possession of the subject matter presently recited in claim 12.
Applicant may overcome this rejection by:
• amending claim 12 to correspond to the originally disclosed first semiconductor layer and second semiconductor layer; or
• identifying explicit support in the originally filed specification for the claimed first and second concentration doped regions, if such support exists.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 12 is rejected under 35 U.S.C. §112(b) as being indefinite because the claim fails to particularly point out and distinctly claim the subject matter which the inventor regards as the invention.
Specifically, claim 12 recites "the thickness of a first concentration doped region ranges from 100 nm to 200 nm" and "the thickness of a second concentration doped region..."
However, claim 1, from which claim 12 depends, does not introduce a first concentration doped region or a second concentration doped region, but instead recites a first semiconductor layer and a second semiconductor layer.
For purposes of examination, the Examiner reasonably interprets "the first concentration doped region" as referring to the first semiconductor layer, and "the second concentration doped region" as referring to the second semiconductor layer, because those are the only corresponding doped semiconductor structures recited in the parent claim.
However, under this interpretation, claim 12 is internally inconsistent with claim 11. Specifically, claim 11 requires that the thickness of the first semiconductor layer ranges from 700 nm to 2 μm, whereas claim 12 recites that the thickness of the first concentration doped region ranges from 100 nm to 200 nm. Because the range recited in claim 12 falls entirely outside the range required by claim 11, claim 12 does not further limit claim 11 but instead recites a mutually exclusive limitation. Consequently, the scope of claim 12 cannot be determined with reasonable certainty.
Applicant is required to amend the claim to clearly identify the intended structure corresponding to the first concentration doped region and second concentration doped region, and to resolve the inconsistency between the claimed thickness ranges.
Claim 17 is rejected under 35 U.S.C. §112(b) as being indefinite because the claim fails to particularly point out and distinctly claim the subject matter which the inventor or joint inventor regards as the invention.
Specifically, claim 17 recites "a top conductive layer formed on the second conductive layer and the top contact." However, neither claim 1 nor claim 17 introduces or defines "the second conductive layer." Instead, claim 1 recites only a second semiconductor layer. Therefore, it is unclear whether Applicant intended "the second conductive layer" to refer to the second semiconductor layer or to another conductive structure not otherwise recited. Accordingly, the scope of claim 17 cannot be determined with reasonable certainty.
For purposes of examination, the Examiner reasonably interprets "the second conductive layer" as "the second semiconductor layer", because claim 17 depends from claim 1, which recites a second semiconductor layer but does not recite a second conductive layer. Under this interpretation, the Examiner understands claim 17 to recite a top contact formed on the top surface of the second semiconductor layer, and a top conductive layer formed on both the second semiconductor layer and the top contact. This interpretation is adopted solely for purposes of examination and does not cure the indefiniteness of the claim language.
Claim 19 is rejected under 35 U.S.C. 112(b) because the term
"connected hole" is indefinite.
The specification does not establish whether a "connected hole" refers to a via, through-hole, conductive plug, contact opening, or another specific structure. Consequently, the scope of the claimed "connected hole" cannot be determined with reasonable certainty.
Applicant may replace "connected hole" with terminology recognized in the art, such as:
• conductive via,
• via hole,
• contact via,
• conductive plug,
or explicitly define the structure in the claim.
Applicant is required to amend the claim to clearly identify the intended structure.
Claim 22 is rejected under 35 U.S.C. §112(b) as being indefinite because the claim fails to particularly point out and distinctly claim the subject matter which the inventor or joint inventor regards as the invention.
Specifically, claim 22 recites "the sidewall reflective layers of the first and second mesa structures are connected at top surfaces of the first and second mesa structures."
However, claim 1 recites only "a sidewall reflective layer" in the singular and does not identify separate sidewall reflective layers corresponding to the first and second mesa structures recited in claim 20. Accordingly, it is unclear whether the recited "sidewall reflective layers" refers to one sidewall reflective layer associated with each mesa structure or to another set of reflective layers.
Furthermore, it is unclear what is meant by "connected at top surfaces of the first and second mesa structures." The claim does not specify whether the sidewall reflective layers are connected to each other at the top surfaces, connected to the respective top surfaces of the mesa structures, or connected by another intervening structure. Consequently, the nature and location of the claimed connection cannot be determined with reasonable certainty.
Therefore, the metes and bounds of claim 22 cannot be determined with reasonable certainty.
For purposes of examination, the Examiner interprets "the sidewall reflective layers of the first and second mesa structures" as referring to the respective sidewall reflective layer of each of the first and second micro-LED structures recited in claims 1 and 20.
The Examiner further interprets "are connected at top surfaces of the first and second mesa structures" to mean that the respective sidewall reflective layers are connected to one another at the top surfaces of the first and second mesa structures.
These interpretations are adopted solely for purposes of examination and do not cure the indefiniteness of the claim language.
Claim 23 is rejected under 35 U.S.C. 112(b) because the limitation
"top surfaces of the first and second mesa structures are connected"
is indefinite.
The claim fails to explain:
• what structure provides the connection,
• whether the connection is electrical, mechanical, or continuous semiconductor material,
• how the mesa structures remain separate while their top surfaces are connected.
Therefore, the metes and bounds of the claimed invention cannot be determined with reasonable certainty.
Applicant may amend the claim to specify the connecting structure, for example:
"...wherein the top surfaces of the first and second mesa structures are interconnected by a continuous top conductive layer."
Regarding claims 23-25, because of their dependency on claim 22, these claims are also objected for the reasons set forth above with respect to claim 22.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4, 14 and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sugawara et al. (US 20210320226).
Regarding claim 1. Sugawara discloses a micro light-emitting diode (micro-LED) structure (¶[0043]) comprising a mesa (laminate 310) including a first semiconductor layer (303), a light-emitting layer (302) formed on the first semiconductor layer, and a second semiconductor layer (301) formed on the light-emitting layer. Sugawara further discloses an insulating layer (305) formed on the side surfaces of the laminate, corresponding to the claimed sidewall protective layer, and side wiring (306) formed on the surface of the insulating layer, wherein the side wiring functions as a light reflector, corresponding to the claimed sidewall reflective layer (¶¶[0056]-[0058]).
Further, Sugawara discloses that the laminate has inclined side surfaces forming a gradually tapered mesa structure, as illustrated by element 300 of Fig. 4 and described in paragraphs [0069]-[0074]. Because the mesa gradually tapers from the upper surface toward the lower surface, the top surface area of the second semiconductor layer (301) is inherently greater than the bottom surface area of the first semiconductor layer (303), the top surface area of the first semiconductor layer (303), and the bottom surface area of the second semiconductor layer (301), thereby meeting the claimed dimensional relationship. The disclosed relationship between H1 and H2 further evidences the tapered geometry and the corresponding surface-area relationship.
Additionally, Sugawara discloses that the micro-LED may be used as a display pixel in an electronic display apparatus (¶[0105]), corresponding to the claimed micro display application.
Regarding claim 2. Sugawara discloses The micro LED structure according to claim 1, Sugawara further discloses that the side surfaces (110a/310a) of the laminate are flat and inclined, as shown in Figs. 3 and 4 and described in paragraphs [0050]-[0051]. Accordingly, Sugawara teaches the claimed limitation that "the sidewall is flat."
Regarding claim 4. Sugawara discloses The micro LED structure according to claim 1, Sugawara discloses a micro-LED structure including a sidewall protective layer (insulating layer 105) formed on the side surfaces of the semiconductor laminate. Sugawara further discloses that the insulating layer 105 comprises Al₂O₃ (¶[0056]). Sugawara also discloses that the first semiconductor layer 101 and the second semiconductor layer 103 each comprise AlGaInP (¶¶[0046] and [0048]). Accordingly, the sidewall protective layer comprises the same material, namely Al, as the first semiconductor layer and the second semiconductor layer. In addition, Sugawara expressly discloses that the insulating layer is non-conductive. Therefore, Sugawara teaches the limitation that "the sidewall protective layer comprises same material as the first semiconductor layer or the second semiconductor layer, and does not have conductive property."
Regarding claim 14. Sugawara discloses The micro LED structure according to claim 1, Sugawara discloses a micro-LED structure including a first semiconductor layer 301, a light-emitting layer 302, and a second semiconductor layer 303. Paragraph [0047] expressly teaches that the light-emitting layer 302 is a multiple quantum well (MQW) layer disposed between the first semiconductor layer 301 and the second semiconductor layer 303. Accordingly, Sugawara teaches "the light emitting layer is formed by a quantum well layer located between the first semiconductor layer and the second semiconductor layer," as recited in claim 14.
Regarding claim 17. Sugawara discloses The micro LED structure according to claim 1, (Note: See the Examiner's interpretation under the rejection of claim 17 pursuant to 35 U.S.C. §112(b). For purposes of examination, the Examiner interprets the recited "second conductive layer" as the recited "second semiconductor layer.")
Further, Sugawara discloses a top contact and a top conductive layer. Specifically, paragraph [0086] teaches that a high impurity region 101e may be formed on the light-emitting surface 101a of the first semiconductor layer 101, as shown in Fig. 12. The high impurity region 101e functions as the claimed top contact. Sugawara further discloses a first electrode 107 formed on the light-emitting surface 101a of the first semiconductor layer 101. As shown in Fig. 12, the first electrode 107 is formed on both the first semiconductor layer 101 and the high impurity region 101e. Under the Examiner's interpretation, the first semiconductor layer 101 corresponds to the claimed second semiconductor layer. Accordingly, the first electrode 107 teaches the claimed top conductive layer formed on the second semiconductor layer and the top contact, as recited.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Sugawara et al. (US 20210320226) in view of Lutgen et al. (US 20200357972).
Regarding claim 3. Sugawara discloses The micro LED structure according to claim 1, But Sugawara discloses flat inclined sidewalls and does not expressly teach that the sidewall is non-flat.
However, Lutgen discloses a micro-LED structure in which a second LED 1146 may have a parabolic mesa shape (¶[0136], Fig. 11A). A parabolic mesa necessarily includes a non-flat sidewall, thereby teaching the limitation of claim 3.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the mesa structure of Sugawara to have the parabolic, non-flat sidewall taught by Lutgen in order to improve light extraction efficiency and reduce optical loss by altering the mesa profile, as taught by Lutgen. The modification merely substitutes one known mesa profile for another to obtain the known benefits associated with the parabolic sidewall configuration.
Regarding claim 7. Sugawara discloses The micro LED structure according to claim 1, But Sugawara does not expressly disclose that the sidewall reflective layer further comprises Ag.
However, Lutgen discloses a metal layer 795 that may include one or more metallic materials, such as aluminum (Al), silver (Ag), gold (Au), platinum (Pt), titanium (Ti), copper (Cu), or any combination thereof (¶[0117]). Accordingly, Lutgen teaches a reflective metal layer comprising Au and Ag. Figure 7B further illustrates the metal layer 795 formed on the LED structure.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the Au reflective layer of Sugawara to further include Ag, as taught by Lutgen, because both Au and Ag are well-known highly reflective metals used in optoelectronic devices to enhance light reflection and light extraction efficiency. The modification merely involves the use of known reflective materials for their known purpose and would have yielded predictable results.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Sugawara et al. (US 20210320226) in view of Bour et al. (US 20160197232).
Regarding claim 5. Sugawara in view of Bour discloses The micro LED structure according to claim 4, Bour further discloses a micro-LED structure including an in-situ sidewall passivation layer 902 formed on the mesa sidewall. Bour teaches that the in-situ sidewall passivation layer 902 includes AlInP (¶[0096]). Bour further teaches that the second semiconductor layer 104 comprises AlInP (¶[0101]). As such, Bour teaches that the sidewall protective layer comprises the same material as the semiconductor layer. Figures 9F and 9G further illustrate the passivation layer 902 disposed on the mesa sidewall. Since AlInP is an InP-containing III-V semiconductor material, Bour teaches a sidewall protective layer comprising InP. Figures 9F and 9G further illustrate the sidewall passivation layer 902 disposed on the sidewall of the mesa.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the AlInP sidewall passivation layer taught by Bour into the micro-LED structure of Sugawara in order to reduce non-radiative sidewall recombination and improve the optical performance and efficiency of the micro-LED device, as taught by Bour.
Regarding claim 6. Sugawara discloses The micro LED structure according to claim 1, But Sugawara does not expressly disclose that the sidewall protective layer is bonded with the sidewall of the mesa structure via atomic bonds.
Bour discloses an in-situ sidewall passivation layer 902 grown on the sidewall of the mesa structure. Specifically, Bour teaches that the in-situ sidewall passivation layer 902 is grown in situ with growth of the mesa structures and may include AlInP (¶[0096]). Because the passivation layer is grown in situ on the mesa sidewall, the interface is inherently formed through atomic bonding between the passivation layer and the underlying semiconductor. Figures 9F and 9G further illustrate the in-situ passivation layer 902 directly contacting the mesa sidewall.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ the in-situ grown sidewall passivation layer taught by Bour in the micro-LED structure of Sugawara in order to improve interface quality, reduce sidewall defects and non-radiative recombination, and thereby improve the optical performance and reliability of the micro-LED device, as taught by Bour.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Sugawara et al. (US 20210320226) in view of Chang et al. (US 20170373228).
Regarding claim 8. Sugawara discloses The micro LED structure according to claim 1, But Sugawara does not expressly disclose a first reflective mirror formed on the bottom surface of the first semiconductor layer.
Chang discloses a micro-LED including a mesa structure 129 and a reflective metallization layer 130. As shown in Fig. 3A, the reflective metallization layer 130 includes a mirror layer 134 disposed on the bottom surface of the mesa structure 129. Paragraph [0043] further teaches that the reflective metallization layer includes the mirror layer 134, which may comprise aluminum or silver to reflect visible light. Accordingly, Chang teaches a first reflective mirror formed on the bottom surface of the first semiconductor layer, as recited.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the bottom reflective mirror taught by Chang into the micro-LED structure of Sugawara in order to reflect light emitted toward the substrate back toward the light-emitting surface, thereby increasing light extraction efficiency and improving the optical performance of the micro-LED device, as taught by Chang.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Sugawara et al. (US 20210320226) in view of Chang et al. (US 20170373228), and further in view of Huang et al. (US 20120050694).
Regarding claim 9. Sugawara in view of Chang discloses The micro LED structure according to claim 8, But Sugawara in view of Chang does not expressly disclose a second reflective mirror formed inside of the first semiconductor layer.
However, Huang discloses a micro-LED including a light collimation structure 224, which may be a distributed Bragg reflector (DBR) (¶[0031]). As shown in Figs. 4a–4i, semiconductor material is laterally regrown to form the first type doped semiconductor layer 222. Paragraph [0032] expressly teaches that the light collimation structures 224 are buried in the first type doped semiconductor layer 222. Since a DBR is a reflective mirror, Huang teaches a second reflective mirror formed inside of the first semiconductor layer, as recited.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the buried DBR taught by Huang into the micro-LED structure of Sugawara in view of Chang in order to provide internal reflection of emitted light, thereby enhancing light extraction efficiency and improving the optical performance of the micro-LED device, as taught by Huang.
Claims 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Sugawara et al. (US 20210320226) in view of Tomoda et al. (US 20080017873).
Regarding claim 10. Sugawara discloses The micro LED structure according to claim 1, But Sugawara does not expressly disclose that the thickness of the first semiconductor layer is greater than the thickness of the second semiconductor layer.
However, Tomoda discloses a GaN-based micro-LED 40 including an n-type semiconductor layer 41, an active layer 42, and a p-type semiconductor layer 43, as shown in Fig. 16. Paragraph [0126] teaches that the n-type semiconductor layer 41 has a thickness of 2600 nm, while the p-type semiconductor layer 43 has a thickness of 200 nm. Accordingly, Tomoda teaches a first semiconductor layer having a thickness greater than that of the second semiconductor layer, as recited.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ the semiconductor layer thickness relationship taught by Tomoda in the micro-LED structure of Sugawara because a relatively thicker first semiconductor layer provides improved current spreading, mechanical support, and device reliability while maintaining a relatively thinner second semiconductor layer, thereby yielding predictable improvements in device performance.
Regarding claim 11. Sugawara in view of Tomoda discloses The micro LED structure according to claim 10, Tomoda discloses a GaN-based micro-LED (Fig. 16) including an n-type semiconductor layer 41, an active layer 42, and a p-type semiconductor layer 43. Paragraph [0126] teaches that the n-type semiconductor layer 41 has a thickness of 2600 nm, while the p-type semiconductor layer 43 has a thickness of 200 nm. Thus, Tomoda teaches a first semiconductor layer that is substantially thicker than the second semiconductor layer.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the semiconductor layer thickness relationship taught by Tomoda in the micro-LED of Sugawara because a relatively thick n-type semiconductor layer provides mechanical support, facilitates current spreading, and improves device fabrication while maintaining a comparatively thin p-type semiconductor layer, as recognized in the art.
Regarding claim 12. Sugawara in view of Tomoda discloses The micro LED structure according to claim 11, (Note: See the Examiner's interpretation under the rejection of claim 12 pursuant to 35 U.S.C. §112(b). For purposes of examination, the Examiner interprets the recited "first concentration doped region" as the first semiconductor layer and the recited "second concentration doped region" as the second semiconductor layer.)
Under the Examiner's interpretation, the limitation requiring the thickness of the first concentration doped region to range from 100 nm to 200 nm is not amenable to prior art analysis because it is inconsistent with the dependency from claim 11. Specifically, claim 11 requires the thickness of the first semiconductor layer to range from 700 nm to 2 μm, whereas claim 12 recites 100 nm to 200 nm for the first concentration doped region. Accordingly, the Examiner is unable to meaningfully apply the prior art to this inconsistent limitation.
However, with respect to the limitation requiring the thickness of the second concentration doped region to range from 100 nm to 200 nm, Tomoda discloses a p-type semiconductor layer 43 having a thickness of 200 nm (¶[0126], Fig. 16), which falls within the claimed range.
Accordingly, although the Examiner has considered the prior art with respect to claim 12, no rejection under 35 U.S.C. §103 is made because the claim, as presently drafted, is not fully amenable to prior art examination due to the inconsistency discussed above.
Regarding claim 13. Sugawara discloses The micro LED structure according to claim 1, But Sugawara does not expressly disclose the additional limitation recited in claim 13.
However, Tomoda discloses a GaN-based micro-LED 40 including an n-type semiconductor layer 41, an active layer 42, and a p-type semiconductor layer 43, as shown in Fig. 16. Paragraph [0126] further teaches that the active layer 42 has a thickness of 200 nm and comprises a multiple quantum well (MQW) structure including an InGaN well layer and a GaN barrier layer. Accordingly, Tomoda teaches the claimed active (light-emitting) layer limitation.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ the active layer structure taught by Tomoda in the micro-LED structure of Sugawara because multiple quantum well active layers were well known for improving carrier confinement, radiative recombination efficiency, and light output in III-V semiconductor light-emitting devices.
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Sugawara et al. (US 20210320226) in view of Leatherdale et al. (US 20120119237).
Regarding claim 15. Sugawara discloses The micro LED structure according to claim 14, But Sugawara does not expressly disclose that the quantum well layer has a thickness less than or equal to 30 nm.
Leatherdale teaches that a quantum well generally has a thickness of about 100 nm or less, or about 10 nm or less (¶[0041]). Leatherdale further teaches that a quantum well has a thickness ranging from about 2 nm to about 35 nm (¶[0048]). Accordingly, Leatherdale teaches a quantum well thickness that encompasses the claimed thickness of less than or equal to 30 nm.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ the quantum well thickness taught by Leatherdale in the micro-LED structure of Sugawara because optimizing the thickness of a quantum well to improve carrier confinement, radiative recombination efficiency, and emission characteristics was well known in the art and would have yielded predictable results.
Regarding claim 16. Sugawara in view of Leatherdale discloses The micro LED structure according to claim 15, Sugawara, as modified by Leatherdale, teaches a micro-LED structure including a quantum well layer located between the first semiconductor layer and the second semiconductor layer and having a thickness less than or equal to 30 nm.
But Sugawara does not expressly disclose that the quantum well layer comprises three or less than three pairs of quantum wells.
However, Leatherdale teaches embodiments including a quantum well (singular). Specifically, paragraph [0052] teaches that "a quantum or potential well LCE" may include one or more light absorbing layers proximate the well. Likewise, paragraphs [0041] and [0048] consistently describe a quantum well and its corresponding thickness. Thus, Leatherdale teaches an embodiment employing a single quantum well, thereby teaching a quantum well structure having no more than three quantum well pairs, as recited.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ the number of quantum well pairs taught by Leatherdale in the micro-LED structure of Sugawara because the number of quantum well pairs is a result-effective variable that may be selected according to the desired emission wavelength, carrier confinement, light-emission efficiency, and other device performance characteristics. Selecting a single quantum well or another small number of quantum well pairs would have been an obvious matter of routine optimization yielding predictable results.
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Sugawara et al. (US 20210320226) in view of Huang et al. (US 20120050694).
Regarding claim 18. Sugawara discloses The micro LED structure according to claim 1, But Sugawara does not expressly disclose a micro display panel including a micro-LED array electrically coupled to an integrated circuit (IC) back plane.
However, Huang discloses a light emitting unit array 200 formed by a plurality of μ-LEDs 236 disposed on a substrate 242 (Fig. 4i). Paragraph [0038] teaches that each μ-LED 236 serves as a light emitting unit and that the substrate 242 is configured with circuit elements such that each μ-LED 236 can be independently driven. Accordingly, the light emitting unit array 200 serves as a display panel. Thus, any one of the plurality of μ-LEDs 236 corresponds to the claimed first micro LED structure of the micro LED array.
As further shown in Fig. 4i, each μ-LED 236 comprises a mesa structure, and the substrate 242 serves as an integrated circuit (IC) back plane (¶[0036]). Each μ-LED 236 is electrically coupled to the IC back plane 242 through conductive structures 240 and 244, thereby enabling independent operation of each μ-LED.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the micro-display panel architecture taught by Huang into the micro-LED structure of Sugawara in order to provide individually addressable micro-LED pixels for image display while utilizing an IC back plane for independent electrical control of each micro-LED, thereby improving display functionality and pixel driving capability.
Regarding claim 19. Sugawara in view of Huang discloses The micro LED structure according to claim 18, Sugawara teaches a micro-LED structure including a bottom contact, a top contact, and a top conductive layer.
But Sugawara does not expressly disclose a connected hole having a top side connected with the bottom contact and a bottom side bonded with an integrated circuit (IC) back plane.
However, Huang discloses a micro display panel including a plurality of μ-LEDs 494 electrically coupled to an IC back plane 470 having circuit elements 472 (Figs. 8a-8e; ¶¶[0046]-[0048]). Specifically, Huang discloses a second electrode 450 extending through the display structure between the contact layer 428 and the IC back plane 470, thereby corresponding to the claimed connected hole. As shown in Fig. 8e, an upper portion of the second electrode 450 is electrically connected to the contact layer 428, corresponding to the claimed bottom contact, while a lower portion of the second electrode 450 is bonded to the IC back plane 470.
Huang further teaches that a transparent conductive layer 490 is formed on the display panel (¶[0048]). The transparent conductive layer 490 is electrically coupled to the contact layer 428 through the first-type semiconductor layer 422 of the μ-LED 494, thereby teaching a top conductive layer formed on the display panel and electrically coupled to the top contact, as recited.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the electrical interconnection structure taught by Huang into the micro-LED structure of Sugawara in order to electrically couple each micro-LED to an IC back plane for independent pixel driving while maintaining electrical communication between the top conductive layer and the top contact, thereby providing a micro display panel having independently addressable micro-LED pixels.
Regarding claim 20. Sugawara in view of Huang discloses The micro LED structure according to claim 18, Sugawara, as modified by Huang, teaches a micro display panel comprising a micro light emitting diode (LED) array including a first micro LED structure electrically coupled to an integrated circuit (IC) back plane.
But Sugawara does not expressly disclose that the micro LED array further comprises a second micro LED structure comprising a second mesa structure located adjacent to the first mesa structure, and a dielectric layer formed between the first and second mesa structures.
However, Huang discloses a light emitting unit array 500 including a plurality of μ-LEDs M, wherein each μ-LED M functions as an independently driven pixel (¶[0053]). Accordingly, one μ-LED M corresponds to the claimed first micro LED structure, while an adjacent μ-LED M corresponds to the claimed second micro LED structure. As shown in Fig. 9g, adjacent μ-LEDs M comprise respective mesa structures positioned adjacent to one another.
Paragraph [0053] further teaches that the gap between adjacent μ-LEDs M is filled with a filling layer 586. The filling layer 586 is disposed between adjacent mesa structures and is electrically insulating, thereby corresponding to the claimed dielectric layer, which is not conductive and is formed between the first and second mesa structures.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the adjacent micro-LED arrangement and electrically insulating filling layer taught by Huang into the micro display panel of Sugawara in order to electrically isolate adjacent micro-LED pixels, improve structural integrity, and enhance the reliability and performance of the display panel.
Claims 21-25 are rejected under 35 U.S.C. 103 as being unpatentable over Sugawara et al. (US 20210320226) in view of Huang et al. (US 20120050694), and further in view of Leatherdale et al. (US 20120119237).
Regarding claim 21. Sugawara in view of Huang discloses The micro LED structure according to claim 20, But Sugawara and Huang do not expressly disclose that the dielectric layer is formed of at least one of SiO₂, Si₃N₄, Al₂O₃, AlN, HfO₂, TiO₂, and ZrO₂, as recited.
However, Leatherdale discloses an isolating material 580, 582, and 584 disposed between neighboring luminescent elements to provide optical isolation while preventing an electrically conductive path between adjacent elements (Fig. 5; ¶[0111]). Leatherdale further teaches that the isolating material may comprise a low refractive index dielectric material, such as a polymer or silicon dioxide (SiO₂). Accordingly, Leatherdale teaches a dielectric isolation layer comprising SiO₂, which is one of the dielectric materials expressly recited in claim 21.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ the dielectric isolation material taught by Leatherdale in the micro display panel of Sugawara, as modified by Huang, because silicon dioxide is a well-known electrically insulating dielectric material suitable for electrically isolating adjacent micro-LED structures while maintaining optical isolation and improving device reliability.
Regarding claim 22. Sugawara in view of Huang and Leatherdale discloses The micro LED structure according to claim 21, (Note: See the Examiner's interpretation under the rejection of claim 22 pursuant to 35 U.S.C. §112(b). For purposes of examination, the Examiner interprets "the sidewall reflective layers of the first and second mesa structures are connected at top surfaces of the first and second mesa structures" to mean that the respective sidewall reflective layers of the first and second mesa structures are connected to one another at the junction of the top surfaces of the adjacent mesa structures.)
As discussed above with respect to claim 21, Sugawara, as modified by Huang and Leatherdale, teaches a micro display panel including adjacent micro-LED mesa structures separated by a dielectric layer.
Leatherdale discloses adjacent luminescent elements separated by an isolating material 956, wherein each luminescent element includes a sidewall reflective layer 955 extending along its sidewalls (Fig. 9I). As shown in Fig. 9I, the sidewall reflective layers 955 of adjacent luminescent elements extend to the junction between the top surfaces of the adjacent luminescent elements, where they form a continuous contact point. Accordingly, Leatherdale teaches the sidewall reflective layers of adjacent mesa structures connected at the top surfaces of the first and second mesa structures, as interpreted by the Examiner.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the connected sidewall reflective layer arrangement taught by Leatherdale in the micro display panel of Sugawara, as modified by Huang, in order to provide a substantially continuous reflective structure that improves optical confinement, enhances light extraction efficiency, and simplifies fabrication of the reflective layer.
Regarding claim 23. Sugawara in view of Huang and Leatherdale discloses The micro LED structure according to claim 22, (Note: See the Examiner's interpretation under the rejection of claim 22 pursuant to 35 U.S.C. §112(b).)
As discussed above with respect to claim 22, Sugawara, as modified by Huang and Leatherdale, teaches a micro display panel including adjacent mesa structures having connected top surfaces and separated by a dielectric layer.
Leatherdale teaches that the isolating material 580, 582, and 584 disposed between neighboring luminescent elements may comprise multiple layers (¶[0111]). Specifically, Leatherdale teaches that a first layer adjacent the sidewall portions may comprise a low-index dielectric material, such as silicon dioxide, while a second layer may comprise a reflective material, such as aluminum or silver. Accordingly, Leatherdale teaches a reflective structure disposed within the dielectric layer between adjacent mesa structures, as recited.
As shown in Fig. 5, the reflective second layer is disposed within the dielectric isolation region between adjacent luminescent elements, with its upper surface positioned below the connected top surfaces of the adjacent luminescent elements, thereby teaching a top surface of the reflective structure under the connected top surfaces of the first and second mesa structures, as recited.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the multilayer dielectric/reflective isolation structure taught by Leatherdale into the micro display panel of Sugawara, as modified by Huang, in order to improve optical isolation, enhance light extraction efficiency, and reduce optical crosstalk between adjacent micro-LED pixels.
Regarding claim 24. Sugawara in view of Huang and Leatherdale discloses The micro LED structure according to claim 22, Leatherdale discloses a reflective structure 580 disposed within the isolating material between adjacent luminescent elements. As shown in Fig. 5, the reflective structure 580 has a triangular cross-sectional profile, thereby teaching a reflective structure that is triangle in shape, as recited.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ the triangular reflective structure taught by Leatherdale in the micro display panel of Sugawara, as modified by Huang, because the triangular geometry facilitates reflection of light toward the emission surface, reduces optical crosstalk between adjacent micro-LED pixels, and improves overall light extraction efficiency.
Regarding claim 25. Sugawara in view of Huang and Leatherdale discloses The micro LED structure according to claim 24, Leatherdale discloses a reflective structure 580 disposed between adjacent luminescent elements (Fig. 5). As shown in Fig. 5, the reflective structure 580 includes first and second inclined sidewalls, each extending substantially parallel to the corresponding sidewall reflective layer 582 of the adjacent luminescent element. Accordingly, Leatherdale teaches a reflective structure comprising a first sidewall parallel to the sidewall reflective layer of the first mesa structure and a second sidewall parallel to the sidewall reflective layer of the second mesa structure, as recited.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ the sidewall configuration taught by Leatherdale in the micro display panel of Sugawara, as modified by Huang, because providing sidewalls substantially parallel to the adjacent sidewall reflective layers promotes efficient reflection of light toward the emission surface, reduces optical crosstalk between adjacent micro-LED pixels, and improves overall optical performance.
Conclusion
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/Changhyun Yi/Primary Examiner, Art Unit 2812