Prosecution Insights
Last updated: August 17, 2026
Application No. 18/788,142

SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME

Non-Final OA §DP
Filed
Jul 30, 2024
Priority
Jul 29, 2019 — continuation of 11/009,663 +3 more
Examiner
BLEVINS, JERRY M
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
1090 granted / 1246 resolved
+27.5% vs TC avg
Minimal +5% lift
Without
With
+4.9%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
23 currently pending
Career history
1264
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
60.2%
+20.2% vs TC avg
§102
28.9%
-11.1% vs TC avg
§112
7.2%
-32.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1246 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 1, 6, 3-5, 7-13, 13-15, 20, 17, 13, and 16, respectively, of U.S. Patent No. 12,140,798. Although the claims at issue are not identical, they are not patentably distinct from each other because the present claims appear to set forth generic terminology relative to the more specific terminology found in the patented claims, such that the patented claims anticipated the present claims. Allowable Subject Matter Claims 1-20 would be allowable if rewritten or amended to overcome the double patenting rejection set forth in this Office action. The following is a statement of reasons for the indication of allowable subject matter: Regarding claims 1-7, the prior art of record, including the prior art set forth below in the “Conclusion” section and further including the prior art set forth in the parent applications 16/524,167; 17/230,991; 17/841,694; and 18/358,965, whether taken individually or in combination, when considered in light of the claimed subject matter as a whole as interpreted in light of the Specification as originally filed, fails to disclose or render obvious the steps of performing a cyclic oxidizing and etching process at least one time to a sidewall of the semiconductor pattern and forming a nitrided oxide layer on the semiconductor pattern. Regarding claims 8-12, the prior art of record, including the prior art set forth below in the “Conclusion” section and further including the prior art set forth in the parent applications 16/524,167; 17/230,991; 17/841,694; and 18/358,965, whether taken individually or in combination, when considered in light of the claimed subject matter as a whole as interpreted in light of the Specification as originally filed, fails to disclose or render obvious the step of performing a smoothing process to the semiconductor pattern until a surface roughness Rz of a sidewall of the first portion is substantially equal to a surface roughness Rz of a top surface of the second portion. Regarding claims 13-20, the prior art of record, including the prior art set forth below in the “Conclusion” section and further including the prior art set forth in the parent applications 16/524,167; 17/230,991; 17/841,694; and 18/358,965, whether taken individually or in combination, when considered in light of the claimed subject matter as a whole as interpreted in light of the Specification as originally filed, fails to disclose or render obvious that a surface roughness Rz of the sidewall of the first portion is substantially equal to a surface roughness Rz of a top surface of the second portion. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2008/0266638 (“SHINODA”); and US 2019/0064439 (“FESHALI”). Any inquiry concerning this communication or earlier communications from the examiner should be directed to JERRY M BLEVINS whose telephone number is (571)272-8581. The examiner can normally be reached Monday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached at 571-272-8581. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JERRY M BLEVINS/ Primary Examiner, Art Unit 2874
Read full office action

Prosecution Timeline

Jul 30, 2024
Application Filed
Jul 14, 2026
Non-Final Rejection mailed — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12704676
SEMICONDUCTOR PACKAGE, OPTICAL DEVICE AND METHOD OF FABRICATING THE SAME
3y 3m to grant Granted Aug 11, 2026
Patent 12704679
HIGH-BRIGHTNESS COMBINER WITH SHAPED CAPILLARY
2y 8m to grant Granted Aug 11, 2026
Patent 12706429
Optical Module
2y 3m to grant Granted Aug 11, 2026
Patent 12699231
MULTIPORTS AND OTHER DEVICES HAVING CONNECTION PORTS WITH SECURING FEATURES AND METHODS OF MAKING THE SAME
3y 3m to grant Granted Aug 04, 2026
Patent 12699244
STORAGE UNIT AND WOUND BODY
2y 7m to grant Granted Aug 04, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
92%
With Interview (+4.9%)
2y 2m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1246 resolved cases by this examiner. Grant probability derived from career allowance rate.

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