Prosecution Insights
Last updated: May 29, 2026
Application No. 18/788,961

SENSE AMP BALANCING COMPONENT

Non-Final OA §102
Filed
Jul 30, 2024
Examiner
TRAN, ANTHAN
Art Unit
2825
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micron Technology, Inc.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
633 granted / 764 resolved
+14.9% vs TC avg
Minimal +2% lift
Without
With
+2.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
22 currently pending
Career history
791
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
75.6%
+35.6% vs TC avg
§102
18.2%
-21.8% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 764 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Previous restriction is withdrawn due to applicant’s response to the restriction. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 10-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US Pub. 2011/0044121). Regarding claim 10, Fig. 1 and Fig. 5 of Kim discloses an apparatus, comprising: a sense amp [11] connected to a first digit line [BL_L] and a second digit line [BL_R]; a first isolation device [IST_L] connected to the first digit line [BL_L] and configured to, in association with a sensing operation, receive a first activation signal [IOS_L] at a first voltage [at starting of sensing operation, Va (VISO1) is at VPP level, Fig. 5]; and a second isolation device [IST_R] connected to the second digit line [BL_R] and configured to, in association with the sensing operation, receive a second activation signal [IOS_R] at a second voltage [at starting of sensing operation, Vb is at VSS level, Fig. 5]; wherein the first voltage [VPP] is greater than the second voltage [VSS] to provide a balancing [paragraphs 0017, 0020, and 0021] effect for the sense amplifier by increasing a voltage on the first digit line [BL_L] as compared to the second digit line [BL_R]. Regarding claim 11, Fig. 4 of Kim discloses wherein the threshold voltage difference is to compensate for a word line and a memory cell connected to the second digit line [as discloses in paragraph 0111, the voltage difference on the digit line is compensated by controlling the voltages apply to both IOS lines]. Regarding claim 12, Fig. 1 of Kim discloses wherein the first isolation device [IST_L] is connected to a first gate of a first transistor [gate of P12] and the second isolation device [IST_R] is connected to a second gate of a second transistor [gate of N11]. Regarding claim 13, Fig. 1 of Kim discloses wherein a first drain of the first transistor [P12] is connected to the first digit line [BL_L] and a second drain of the second transistor [N11] is connected to the second digit line [BL_R]. Regarding claim 14, Fig. 1 of Kim discloses herein the first digit line [BL_L] is a reference digit line and the second digit line [BL_R] is an active digit line. Regarding claim 15, Fig. 1 of Kim discloses a controller [column decoder] configured to send a first activation signal [signal to activate bit line BL_L] to the first digit line at a first time [BL_L] during a compensation window when the first isolation device and the second isolation device are deactivated. Allowable Subject Matter Claims 1-9 and 17-20 allowed. The following is an examiner’s statement of reasons for allowance: Regarding claims 1-9 and 17-20, the prior art does not teach or suggest either alone or in combination an apparatus and method comprising: apply a second activation signal to the second digit line at a second time during the compensation window, wherein the first time and the second time have a time difference that corresponds to a threshold voltage difference between the first digit line and the second digit line. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Claim 16 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 16, the prior art does not teach or suggest either alone or in combination the controller is configured to send a second activation signal to the second digit line at a second time during the compensation window, wherein the first time and the second time have a time difference that corresponds to a voltage threshold difference between the first digit line and the second digit line. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHAN T TRAN whose telephone number is (571)272-8709. The examiner can normally be reached MON-FRI, 9AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached at 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANTHAN TRAN/Primary Examiner, Art Unit 2825
Read full office action

Prosecution Timeline

Jul 30, 2024
Application Filed
May 19, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
85%
With Interview (+2.3%)
2y 3m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 764 resolved cases by this examiner. Grant probability derived from career allowance rate.

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