DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Oath/Declaration
2. The oath/declaration filed on 07/30/2024 is acceptable.
Priority
3. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
4. The office acknowledges receipt of the following items from the applicant:
Information Disclosure Statement (IDS) filed on 07/30/2024 and 02/24/2025.
Specification
5. The specification is objected to for the following reason: The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed (see MPEP 606.01).
Claim Objections
6. Claims 1-15 are objected to because of the following reasons:
In claim 1, line 3 and in claim 13, line 9, “,” at the end should replace by -- ; --
Claims 2-12 ad 14-15 are depend on the independent claims 1 and 13, then, they are also objected.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
7. Claims 1 and 13-14 are rejected under 35 U.S.C. 103(a) as being unpatentable over TAN et al., hereafter “TAN” (U.S. Publication No. 2023/0187591 A1) in view of Wang et al., hereafter “Wang” (U.S. Publication No. 2009/0268770 A1).
Regarding claim 1, TAN discloses a micro-LED comprising:
a bonding layer (Ti-metal 1318);
an N type semiconductor layer (1304) formed on the bonding layer (Ti-metal 1318),
a light emitting layer (MQW 1306) formed on the N type semiconductor layer (1304); and
a P type semiconductor layer (1308) formed on the light emitting layer (MQW 1306) (Fig. 13E and [0154]-[0156]).
TAN discloses the features of the claimed invention as discussed above, but does not disclose wherein a resonance cavity structure is formed by the N type semiconductor layer and the P type semiconductor layer.
Wang, however, discloses the resonant cavity (101) may include one or more p-type semiconductor layers and one or more n-type semiconductor layers (Fig. 1 and para [0021]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of TAN to provide wherein a resonance cavity structure is formed by the N type semiconductor layer and the P type semiconductor layer as taught by Wang for a purpose of improving the brightness of the micro-LED.
Regarding claim 13, TAN discloses a micro- LED display panel comprising:
an integrated circuit (IC) backplane (1321, para [0155]) comprising a bottom pad array (1322, para [0155]), the bottom pad array (1322) comprising a plurality of conductive bottom pads (1322); and
a micro-LED array (1300, para [0151]) formed on the IC backplane (1321) (see a micro-LED array (1200) formed on the IC backplane (1215 in Fig. 12), the micro-LED array comprising a plurality of micro-LEDs
wherein one micro-LED of the plurality of micro-LEDs is electrically connected with one bottom pad (1322) of the plurality of conductive bottom pads; and the micro-LED comprises:
a bonding layer (1318/1325);
an N type semiconductor layer (1304) formed on the bonding layer (1318/1325),
a light emitting layer (MQW) formed on the N type semiconductor layer (1304); and
a P type semiconductor layer (1308) formed on the light emitting layer (MQW 1306) (Fig. 13E and [0154]-[0156]).
TAN discloses the features of the claimed invention as discussed above, but does not disclose wherein a resonance cavity structure is formed by the N type semiconductor layer and the P type semiconductor layer.
Wang, however, discloses the resonant cavity (101) may include one or more p-type semiconductor layers and one or more n-type semiconductor layers (Fig. 1 and para [0021]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of TAN to provide wherein a resonance cavity structure is formed by the N type semiconductor layer and the P type semiconductor layer as taught by Wang for a purpose of improving the brightness of the micro-LED.
Regarding claim 14, TAN and Wang (citations to TAN unless otherwise noted) discloses wherein respective top conductive layers (760) of the plurality of micro-LEDs (700) are interconnected (Fig. 7A and para [0109]).
8. Claim 12 is rejected under 35 U.S.C. 103(a) as being unpatentable over TAN and Wang in view of AKIMOTO H (JP-2022051428-A).
Regarding claim 12, TAN and Wang disclose the features of the claimed invention as discussed above, but does not disclose wherein an inclined angle of a sidewall of the P type semiconductor layer, the light emitting layer, and the N type semiconductor layer is greater than 85 degrees.
AKIMOTO H, however, discloses wherein an inclined angle of a sidewall of the P type semiconductor layer (253), the light emitting layer (252), and the N type semiconductor layer (251) (angle formed by the light emitting surface and the side surface of the light emitting element) is smaller than 90 ⁰ (Fig. 12 and English Text).
However, the selection of the claimed device parameters would have been obvious to one having ordinary skill in the art before the effective filing date was made to provide an inclined angle of a sidewall of the P type semiconductor layer, the light emitting layer, and the N type semiconductor layer is within claimed range, since it is well settles that when the general conditions of a claim are discloses in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Allowable Subject Matter
9. The following is a statement of reason for the indication of allowable subject matter:
Claims 2-11 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Cited Prior Arts
10. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
LI W (CN-115425127-A) discloses a Micro-LED chip comprising a green light core layer 30 comprises a green light N-type semiconductor 31, green active light emitting layer 32, green P-type semiconductor 33, green light current extension layer 34, a green P-type electrode 35 and a green N-type electrode 36, the green active light emitting layer 32. the green light P-type semiconductor 33 and the green light current expansion layer 34 layer sequentially one side of the upper surface of the green N-type semiconductor 31, the green N-type electrode 36 set on the other side of the upper surface of the green N-type semiconductor 31, the green P-type electrode 35 is set on the upper surface of the green light current expansion layer 34, in this embodiment, the green N-type semiconductor 31 is set on the first transparent bonding layer 12 (Fig. 3 and English Txt).
Conclusion
11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc T. Dang whose telephone number is 571-272-1776. The examiner can normally be reached on 8:00 am-5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PHUC T DANG/Primary Examiner, Art Unit 2897
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