Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
In response to the Communications dated July 31, 2024, claims 1-20 are active in
this application.
Specification
If there are cross-reference to related applications, please include the
respective patent numbers, if known.
Information Disclosure Statement
The information disclosure statements filed July 31, 2024 and January 8, 2025 have been
considered.
Claim Objections
Claims 3-7, 19 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections- 35 U.S.C. § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2, 8 and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Madan [US Patent Application # 20110035644].
With respect to claim 1, Madan discloses a memory device [figs. 1-3 and 7], comprising: a local sense line [within 20a1 – fig. 3; or, LI/0’s – fig. 2 – it is noted these line perform related function in the read path]; a bleeder device [transistor coupled to ground in 20a1 – fig. 3] coupled to the local sense line and a bleeder supply [ground within 20a1]; a sense line multiplexor [15a – fig. 1] coupled to the local sense line [via 21a0] and a global sense line [GI0 – fig. 1 - – it is noted these line perform related function in the read path]; a sense amplifier [20a1 or 21a1 – fig. 2] coupled to the global sense line and configured to sense and latch a voltage of the global sense line in response to the memory device receiving a command [all steps in fig. 7]; a plurality of access devices [ within 26a’s – fig. 3] coupled to the local sense line; a plurality of capacitors [capacitors in 23’s of fig. 3] coupled to the plurality of access devices [via access transistors of 23’s]; and a plate voltage supply [via PL’s], separate from the bleeder supply, coupled to the plurality of capacitors.
With respect to claim 2, Madan discloses a voltage of the global sense line is different than the voltage of the local sense line when the sense line multiplexor is deactivated. See figs. 1-3. It is noted that it is expected that the voltage of a global sense line (or I/O line) will differ from a local sense line when the sense line multiplexor (or column switch) is deactivated. The multiplexor's job is to connect a specific local bit-line pair (LIO) to the main global data line (GIO) only during an active read/write cycle. When deactivated, the lines are physically disconnected from each other. Global lines are typically precharged to a specific voltage (often Vdd or Vdd/2) to prepare for the next read, while local lines may be at a different voltage state depending on the last accessed cell.
With respect to claim 8, Madan discloses a bleeder supply voltage supply is different from a voltage of the plate voltage supply. See fig. 3. Additionally, Madan indicates “To read FeRAM cell 23.sub.j, for example, word line WL.sub.j and PL.sub.j are then driven to the desired read levels (e.g., with plate line PL.sub.j pulsed above a ferroelectric transition voltage)” – par. 0041.
With respect to claim 9, Madan discloses the bleeder supply is connected to an edge of an array of memory cells. It’s located at the edge of an array – fig. 3.
Claim(s) 17 and 18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Madan [US Patent Application # 20110035644].
With respect to claim 17, Madan discloses a system [figs. 1-3 and 7], comprising: a host device configured to send a command [“Many mobile devices, including implantable medical devices, now rely on solid-state memory not only for data storage during operation…power consumption of integrated circuit functions is an important concern in the design and manufacture of mobile electronic devices and systems….The miniaturization of these integrated circuit functions is also an important design goal….one approach to reducing chip area in solid-state memory, particularly non-volatile memory such as FeRAM, is to time-multiplex the communication of data words along internal buses. As known in the art, "page mode" access involves the accessing of a row of memory cells, from which successive data elements (e.g., bytes) can be rapidly retrieved or written…power consumption by the memory is also of great concern in these solid-state memories, particularly if implemented in mobile or implantable devices and systems. In the context of the time-multiplexed internal bus, the chip area savings comes at a cost of increased switching rates on the internal bus” – pars. 0005-0008]; and a memory device [figs. 1-3], comprising: a local sense line [within 20a1 – fig. 3; or, LI/0’s – fig. 2 – it is noted these line perform related function in the read path]; a bleeder device [transistor coupled to ground in 20a1 – fig. 3] coupled to the local sense line and a bleeder supply [ground within 20a1]; a sense line multiplexor [15a – fig. 1] coupled to the local sense line [via 21a0] and a global sense line [GI0 – fig. 1 - – it is noted these line perform related function in the read path]; a sense amplifier [20a1 or 21a1 – fig. 2] coupled to the global sense line and configured to sense and latch a voltage of the global sense line in response to the memory device receiving the command from the host device [pars. 0003-0008; and all steps in fig. 7]; a plurality of access devices [ within 26a’s – fig. 3] coupled to the local sense line; a plurality of capacitors [capacitors in 23’s of fig. 3] coupled to the plurality of access devices; and a bias voltage supply [coupled to PL’s of fig. 3], separate from the bleeder supply, coupled to the plurality of capacitors. In view of paragraphs 0003-0008, it is noted that it's inherent: any functional memory device, especially portable ones like USB drives or SD cards, must receive commands from a host (like a computer) because they are passive storage units; the host's operating system controls data flow, reading, writing, and organization, defining the memory's purpose and interaction through specific interfaces (USB, SATA), making host-device communication essential for any data storage or transfer.
With respect to claim 18, Madan discloses a connection to the bleeder supply is disposed at an edge of an array of the memory device. It’s located at the edge of an array – fig. 3.
Allowable Subject Matter
Claims 10-16 are allowable over the prior art of record.
The following is an Examiner's statement of reasons for the indication of
allowable subject matter: the prior art of records does not show (in addition to the other
elements in the claim) the following:
-with respect to claim 3: The memory device of claim 1, wherein the bleeder device is configured to operate at a bleeder supply voltage, wherein the bleeder supply voltage is a voltage that reduces leakage current in an access transistor when the local sense line is in an idle state.
-with respect to claim 10, latching, by the sense amplifier, the voltage of the global sense line, wherein latching the voltage of the global sense line changes the voltage of the global sense line to either 0 volts (V) or 1 V; and deactivating the sense line multiplexor, wherein deactivating the sense line multiplexor lowers the voltage of the local sense line.
-with respect to claim 19: The system of claim 17, wherein the bleeder device is a multiplexor coupling the local sense line to the bleeder supply.
-with respect to claim 20: The system of claim 17, wherein: a voltage of the local sense line is less than a voltage of the plate voltage supply when memory cells coupled to the local sense line are not being accessed; and the voltage of the local sense line is greater than or equal to the voltage of the plate voltage supply when at least one of the memory cells coupled to the local sense line is being accessed.
Conclusion
For applicant’s benefit portions of the cited reference(s) have been cited to aid in
the review of the rejection(s). While every attempt has been made to be thorough and consistent within the rejection it is noted that the PRIOR ART MUST BE CONSIDERED IN ITS ENTIRETY, INCLUDING DISCLOSURES THAT TEACH AWAY FROM THE CLAIMS. See MPEP 2141.02 VI.
When responding to the Office action, Applicants are advised to provide
the Examiner with line and page numbers of the application and/or references cited to assist the Examiner in the prosecution of this case.
Any inquiry concerning this communication or earlier communications
from the Examiner should be directed to Michael T. Tran whose telephone number is (571) 272-1795. Interview agendas may be emailed to Michael.tran@uspto.gov. The Examiner can normally be reached on Monday-Thursday from 6:00AM-4:30 P.M.
Any inquiry of a general nature or relating to the status of this application.
should be directed to the Group receptionist whose telephone number is (571) 272-1650.
/MICHAEL T TRAN/Primary Examiner, Art Unit 2827 January 9, 2026