Prosecution Insights
Last updated: October 02, 2026
Application No. 18/790,389

CIRCUIT MODULE

Final Rejection §103
Filed
Jul 31, 2024
Priority
Feb 16, 2022 — JP 2022-021968 +1 more
Examiner
SHARMA, ADITYA
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
6m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
31 granted / 39 resolved
+11.5% vs TC avg
Strong +28% interview lift
Without
With
+28.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
25 currently pending
Career history
60
Total Applications
across all art units

Statute-Specific Performance

§103
71.6%
+31.6% vs TC avg
§102
21.6%
-18.4% vs TC avg
§112
6.8%
-33.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 39 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on July 6, 2026, is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Response to Arguments Applicant’s arguments filed July 17, 2026, with respect to the rejection of claim 1 have been fully considered and are persuasive. However, upon further consideration, a new ground of rejection is made. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) and in further view of Nomiya (US 11239821 B2) and Nishimura et al. (US 6781241 B2) Regarding Claim 1 – Ueda teaches a circuit module comprising: a first circuit board including a first positive main surface and a first negative main surface arranged in a Z-axis direction (Fig 5; 101a; Ueda [0018] states “two or more wiring boards”, [0035] states the wiring boards are “sequentially stacked in the vertical direction”, and [0046] teaches the lower side main surface of the wiring board 101a), the first positive main surface being located in a positive direction of a Z-axis with respect to the first negative main surface (Fig 5; 101a; Ueda [0035, 0046]); a second circuit board including a second positive main surface and a second negative main surface arranged in the Z-axis direction (Fig 5; 101b; Ueda [0033, 0046]), the second circuit board being located in a negative direction of the Z-axis with respect to the first circuit board and overlapping the first circuit board when viewed in the Z-axis direction (Fig 5; 101b below 101a; Ueda [0018, 0035]), the second positive main surface being located in the positive direction of the Z-axis with respect to the second negative main surface (Fig 5; 101b; Ueda [0033, 0035, 0046]); a first electronic component mounted on the second positive main surface (Fig 5; 104a on 101b; Ueda [0046] states “the semiconductor element 104a is mounted on the main surface located on the upper side of the wiring board 101b”), the first electronic component including a third positive main surface and a third negative main surface arranged in the Z-axis direction (Fig 5; 104a; opposed major surfaces shown in cross section), the third positive main surface being located in the positive direction of the Z-axis with respect to the third negative main surface (Fig 5; 104a; upper/lower major surface relationship shown in cross section); and one or more first solder balls each having an ellipsoidal shape, the one or more first solder balls being located in an inter-board region between the first circuit board and the second circuit board and electrically connecting the first circuit board and the second circuit board (Fig 5; 103a, 103b between 101a and 101b; Ueda [0018] states a current-carrying member is “between the wiring boards and connects the wiring boards to each other”, and Ueda [0050-0052] teaches “the solder balls 103a and 103b are brought into contact with each other”). Ueda fails to disclose wherein the circuit module has a structure of (A) or (B): (A) the third positive main surface of the first electronic component is in contact with the first negative main surface of the first circuit board, (B) the circuit module further comprising a second electronic component mounted on the first negative main surface, the second electronic component including a fourth positive main surface and a fourth negative main surface arranged in the Z-axis direction, the fourth positive main surface being located in the positive direction of the Z-axis with respect to the fourth negative main surface, wherein the third positive main surface of the first electronic component is in contact with the fourth negative main surface of the second electronic component , and wherein a dimension of each of the one or more first solder balls in the Z-axis direction is equal to or greater than a sum of a dimension of the first electronic component in the Z-axis direction and a dimension of the second electronic component in the Z-axis direction. Nomiya teaches (B) the circuit module further comprising a second electronic component mounted on the first negative main surface (Fig 1B; 22; Nomiya states “The second electronic component… is disposed on the second mount board” in an electronic component device having first and second mounting boards facing each other), the second electronic component including a fourth positive main surface and a fourth negative main surface arranged in the Z-axis direction (Fig 1B; 22; Nomiya states “The second electronic component includes a third major surface and a fourth major surface” that “face away from each other”), the fourth positive main surface being located in the positive direction of the Z-axis with respect to the fourth negative main surface (Fig 1B; 22; Nomiya states “The third major surface is positioned closer to the second mount board than the fourth major surface”), wherein the third positive main surface of the first electronic component is in contact with the fourth negative main surface of the second electronic component (Fig 1B; 21, 22; Nomiya states “The second major surface directly contacts the fourth and sixth major surfaces”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda with the circuit module has a structure of (B) the circuit module further comprising a second electronic component mounted on the first negative main surface, the second electronic component including a fourth positive main surface and a fourth negative main surface arranged in the Z-axis direction, the fourth positive main surface being located in the positive direction of the Z-axis with respect to the fourth negative main surface, wherein the third positive main surface of the first electronic component is in contact with the fourth negative main surface of the second electronic component as taught by Nomiya because Nomiya teaches to “make the opposing electronic components contact or bond with each other” to improve heat dissipation, thereby providing an additional heat dissipation path through the contacting electronic component and the opposite mount board. Nishimura teaches a dimension of each of the one or more first solder balls in the Z-axis direction is equal to or greater than a sum of a dimension of the first electronic component in the Z-axis direction and a dimension of the second electronic component in the Z-axis direction (Fig 2; 1a, 1b, 3a, 3b, 7, 17; Nishimura teaches that the solder balls 7 electrically connect interposers 1a and 1b and that “the height of the solder balls 7 is almost equal to… the heights of the semiconductor chip 3a and.. 3b”, Nishimura further teaches that the interposer spacing corresponds to the combined heights of semiconductor chips 3a and 3b and the thickness of adhesive 12). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda with a dimension of each of the one or more first solder balls in the Z-axis direction is equal to or greater than a sum of a dimension of the first electronic component in the Z-axis direction and a dimension of the second electronic component in the Z-axis direction as taught by Nishimura to accommodate the opposed electronic components while reducing overall module thickness as Nishimura states “the thickness of the semiconductor device… can be smaller than the thickness of the conventional semiconductor device”. Claim(s) 2, 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2) and Nishimura et al. (US 6781241 B2) and in further view of Raedt et al. (US 20060012037 A1) Regarding Claim 2 – Ueda in view of Nomiya and Nishimura teaches the circuit module according to claim 1, but does not explicitly disclose further comprising a first sealing resin provided in the inter-board region so as to be in contact with the first negative main surface and the second positive main surface and cover surfaces of the one or more first solder balls. Raedt teaches a first sealing resin provided in the inter-board region so as to be in contact with the first negative main surface and the second positive main surface and cover surfaces of the one or more first solder balls (Figs 3a and 6; layer 5; Raedt [0009] states “the solder balls of a first substrate are encapsulated in a polymer resin”, [0034] states “a layer of underfill/overmold material in between the first main surfaces of the elements”, and [0073] states “encapsulating all structures by a layer 5, see FIG. 3a and FIG. 6”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with a first sealing resin provided in the inter-board region so as to be in contact with the first negative main surface and the second positive main surface and cover surfaces of the one or more first solder balls as taught by Raedt to get the benefit of improved mechanical stability and insulation reliability because Raedt [0010] teaches that encapsulating the solder balls in a polymer resin allows the second solder ball to be mounted on the first ball “without the risk of collapse of the solder column or shorting between neighboring solder connections”. Regarding Claim 11 – Ueda in view of Nomiya and Nishimura teaches the circuit module according to claim 1, wherein the circuit module further includes one or more third solder balls each having an ellipsoidal shape, located in the inter-board region between the first circuit board and the second circuit board, and electrically connecting the first circuit board and the second circuit board (Ueda Fig 5; 103b between 101a and 101b; Ueda [0032] teaches solder balls 103b on the lower side main surface of 101a; [0035] teaches solder balls 103a and 103b joined in vertically stacked boards; see also Ueda claim 8 where current carrying member is spherical), wherein the one or more first solder balls are in contact with a mounting electrode of the second circuit board (Ueda Fig 5; 103a, 102 on 101b; Ueda [0033, 0048]), wherein the one or more third solder balls are in contact with a mounting electrode of the first circuit board (Ueda Fig 5; 103b, 102 on 101a; Ueda [0032, 0047]), wherein the one or more first solder balls and the one or more third solder balls are arranged in the Z-axis direction and are in contact with each other (Ueda Fig 5; 103a, 103b; Ueda [0035, 0050-0051] teaches 103a and 103b are brought into contact with each other in the vertically stacked boards). Ueda in view of Nomiya and Nishimura does not explicitly disclose wherein a contact portion where the one or more first solder balls and the one or more third solder balls are in contact with each other is surrounded by an outer edge of the one or more first solder balls and an outer edge of the one or more third solder balls when viewed in the Z-axis direction. Raedt teaches disclose wherein a contact portion where the one or more first solder balls and the one or more third solder balls are in contact with each other is surrounded by an outer edge of the one or more first solder balls and an outer edge of the one or more third solder balls when viewed in the Z-axis direction (Figs 2, 3a-3b; Raedt [0030] states “a solder structure which is essentially a stack of a lower and an upper solder ball, which are forming a single structure”, and [0031] states “the solder structure is essentially figure 8-shaped… Each of the two loops of this 8-shape then corresponds to a solder ball”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with a contact portion where the one or more first solder balls and the one or more third solder balls are in contact with each other is surrounded by an outer edge of the one or more first solder balls and an outer edge of the one or more third solder balls when viewed in the Z-axis direction as taught by Raedt because Raedt teaches bonding two elements by contacting opposed solder balls and reflowing them to form a joined solder ball structure (8-shaped) and further teaches using that method repetitively for stacking more than two elements. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2) and Nishimura et al. (US 6781241 B2) and in further view of Kitazume (US 12177990 B2) Regarding Claim 6 – Ueda in view of Nomiya and Nishimura teaches the circuit module according to claim 1, but does not explicitly disclose wherein the circuit module further includes: one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board; and a third sealing resin covering the second negative main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”); and a third sealing resin covering the second negative main surface (Figs 3C-3D; insulating resin layer 62; Kitazume states “an insulating resin is applied to the entire second main surface 202 of the substrate 20… to form an insulating resin layer 62… The insulating resin layer 62 covers the entire second main surface 202 of the substrate 20”), wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction (Figs 3D, 5; solder ball 500 after grinding), and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin (Figs 3D, 5; insulating resin layer 62 / exposed end of solder ball 500). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board; and a third sealing resin covering the second negative main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), and Raedt et al. (US 20060012037 A1) in further view of Okada et al. (US 20200058599 A1) Regarding Claim 3 – Ueda in view of Nomiya, Nishimura and Raedt teaches the circuit module according to claim 2, but does not explicitly disclose wherein the circuit module further includes: a second sealing resin covering the first positive main surface; and a shield conductor covering a positive main surface of the second sealing resin, a side surface of the second sealing resin located in a direction orthogonal to the Z-axis direction, a side surface of the first circuit board located in the direction orthogonal to the Z-axis direction, a side surface of the first sealing resin located in the direction orthogonal to the Z-axis direction, and a side surface of the second circuit board located in the direction orthogonal to the Z-axis direction. Okada teaches a second sealing resin covering the first positive main surface (Fig 1; sealing resin 4; Okada [0029]); and a shield conductor covering a positive main surface of the second sealing resin (Fig 1; conductive film 6 on outer surface of 4; Okada [0029]), a side surface of the second sealing resin located in a direction orthogonal to the Z-axis direction (Figs 1; side surface 11 of sealing resin 4, recess 7, conductive film 6; Okada [0029]), a side surface of the first circuit board located in the direction orthogonal to the Z-axis direction (Figs 1-3; 1, 6, 7; Okada [0034]), a side surface of the first sealing resin located in the direction orthogonal to the Z-axis direction (Fig 1; 6, 4, 7; Okada [0029, 0032, 0035]; see also Raedt [0009, 0034, 0073]), and a side surface of the second circuit board located in the direction orthogonal to the Z-axis direction (Figs 1-3; 1, 6; Okada [0032, 0034]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, and Raedt with a second sealing resin covering the first positive main surface; and a shield conductor covering a positive main surface of the second sealing resin, a side surface of the second sealing resin located in a direction orthogonal to the Z-axis direction, a side surface of the first circuit board located in the direction orthogonal to the Z-axis direction, a side surface of the first sealing resin located in the direction orthogonal to the Z-axis direction, and a side surface of the second circuit board located in the direction orthogonal to the Z-axis direction as taught by Okada because Okada [0034] states “the electrically conductive film 6 is formed along the shape of the recess 7… the electrically conductive film 6 itself tends to increase at this portion, with the result that the electrically conductive film 6 is hard to peel off” thereby providing a more reliable shield structure around the resin covered module. Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), and Raedt et al. (US 20060012037 A1) in further view of Funakawa et al. (US 20190181068 A1) and Okada et al. (US 20200058599 A1) Regarding Claim 7 – Ueda in view of Nomiya, Nishimura, and Raedt teaches the circuit module according to claim 2, but does not explicitly disclose wherein the circuit module further includes: a second sealing resin covering the second negative main surface; and a shield conductor covering a negative main surface of the second sealing resin, a side surface of the second sealing resin located in a direction orthogonal to the Z-axis direction, a side surface of the first circuit board located in the direction orthogonal to the Z-axis direction, a side surface of the first sealing resin located in the direction orthogonal to the Z-axis direction, and a side surface of the second circuit board located in the direction orthogonal to the Z-axis direction. Funakawa teaches a second sealing resin covering the second negative main surface (Figs 4C-4D; second sealing member 40 on the opposite side; Funakawa [0115-0117, 0128-0129]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, and Raedt with a second sealing resin covering the second negative main surface as taught by Funakawa because Funakawa [0016-0017] teaches “the second electronic components 18… are sealed by the second sealing member 40” and that “precursor 40p… is put on the other main surface 10S of the flat substrate 10… cured… into the second sealing member 40” thereby teaching sealing components mounted on the opposite main surface of the substrate with a sealing member. Okada teaches a shield conductor covering a negative main surface of the second sealing resin (Fig 1; conductive film 6 on outer main surface of 4; Okada [0029], which would have been applied to the second sealing member 40 on the other main surface taught by Funakawa [0115-0117, 0128-0129] above), a side surface of the second sealing resin located in a direction orthogonal to the Z-axis direction (Figs 1; side surface 11 of sealing resin 4, recess 7, conductive film 6; Okada [0029]), a side surface of the first circuit board located in the direction orthogonal to the Z-axis direction (Figs 1-3; 1, 6, 7; Okada [0034]), a side surface of the first sealing resin located in the direction orthogonal to the Z-axis direction (Fig 1; 6, 4, 7; Okada [0029, 0032, 0035]; see also Raedt [0009, 0034, 0073]), and a side surface of the second circuit board located in the direction orthogonal to the Z-axis direction (Figs 1-3; 1, 6; Okada [0032, 0034]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, and Raedt with a shield conductor covering a negative main surface of the second sealing resin, a side surface of the second sealing resin located in a direction orthogonal to the Z-axis direction, a side surface of the first circuit board located in the direction orthogonal to the Z-axis direction, a side surface of the first sealing resin located in the direction orthogonal to the Z-axis direction, and a side surface of the second circuit board located in the direction orthogonal to the Z-axis direction as taught by Okada because Okada [0034] states “the electrically conductive film 6 is formed along the shape of the recess 7… the electrically conductive film 6 itself tends to increase at this portion, with the result that the electrically conductive film 6 is hard to peel off” thereby providing a more reliable shield structure around the resin covered module. Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), and Raedt et al. (US 20060012037 A1) in further view of Kitazume (US 12177990 B2) Regarding Claim 15 – Ueda in view of Nomiya, Nishimura, and Raedt teaches the circuit module according to claim 2, but does not explicitly disclose wherein the circuit module further includes: one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board; and a third sealing resin covering the second negative main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”); and a third sealing resin covering the second negative main surface (Figs 3C-3D; insulating resin layer 62; Kitazume states “an insulating resin is applied to the entire second main surface 202 of the substrate 20… to form an insulating resin layer 62… The insulating resin layer 62 covers the entire second main surface 202 of the substrate 20”), wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction (Figs 3D, 5; solder ball 500 after grinding), and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin (Figs 3D, 5; insulating resin layer 62 / exposed end of solder ball 500). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, and Raedt with one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board; and a third sealing resin covering the second negative main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), Raedt et al. (US 20060012037 A1) and Okada et al. (US 20200058599 A1) in further view of Kitazume (US 12177990 B2) Regarding Claim 16 – Ueda in view of Nomiya, Nishimura, Raedt, and Okada teaches the circuit module according to claim 3, but does not explicitly disclose wherein the circuit module further includes: one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board; and a third sealing resin covering the second negative main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”); and a third sealing resin covering the second negative main surface (Figs 3C-3D; insulating resin layer 62; Kitazume states “an insulating resin is applied to the entire second main surface 202 of the substrate 20… to form an insulating resin layer 62… The insulating resin layer 62 covers the entire second main surface 202 of the substrate 20”), wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction (Figs 3D, 5; solder ball 500 after grinding), and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin (Figs 3D, 5; insulating resin layer 62 / exposed end of solder ball 500). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, and Okada with one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board; and a third sealing resin covering the second negative main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), Raedt et al. (US 20060012037 A1) and Okada et al. (US 20200058599 A1) in further view of Gehman et. al (US 20040195591 A1) Regarding Claim 4 – Ueda in view of Nomiya, Nishimura, Raedt, and Okada teaches the circuit module according to claim 3, but does not explicitly disclose wherein at least one of the one or more first solder balls is in contact with the shield conductor. Gehman teaches wherein at least one of the one or more first solder balls is in contact with the shield conductor (Fig 4; shield 121, solder balls 163, 165; Gehman [0021] states “Shield 121 is flat and supported by solder balls 163 and 165 and that “many more are around the perimeter of shield 121”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, and Okada with at least one of the one or more first solder balls is in contact with the shield conductor as taught by Gehman because Gehman teaches using solder balls to support conductive shield and teaches that with plurality of such solder balls surrounding the die “there is substantial shielding” and teaches that solder balls are convenient to form “because balls 163 and 165 can be reflowed at the same time as bumps 122 and 124”. Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), Raedt et al. (US 20060012037 A1), Funakawa et al. (US 20190181068 A1), and Okada et al. (US 20200058599 A1) in further view of Gehman et. al (US 20040195591 A1) Regarding Claim 8 – Ueda in view of Nomiya, Nishimura, Raedt, Funakawa, and Okada teaches the circuit module according to claim 7, but does not explicitly disclose wherein at least one of the one or more first solder balls is in contact with the shield conductor. Gehman teaches wherein at least one of the one or more first solder balls is in contact with the shield conductor (Fig 4; shield 121, solder balls 163, 165; Gehman [0021] states “Shield 121 is flat and supported by solder balls 163 and 165 and that “many more are around the perimeter of shield 121”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, Funakawa, and Okada with at least one of the one or more first solder balls is in contact with the shield conductor as taught by Gehman because Gehman teaches using solder balls to support conductive shield and teaches that with plurality of such solder balls surrounding the die “there is substantial shielding” and teaches that solder balls are convenient to form “because balls 163 and 165 can be reflowed at the same time as bumps 122 and 124”. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), Raedt et al. (US 20060012037 A1), Okada et al. (US 20200058599 A1), and Gehman et. al (US 20040195591 A1) in further view of Kitazume (US 12177990 B2) Regarding Claim 17 – Ueda in view of Nomiya, Nishimura, Raedt, Okada, and Gehman teaches the circuit module according to claim 4, but does not explicitly disclose wherein the circuit module further includes: one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board; and a third sealing resin covering the second negative main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”); and a third sealing resin covering the second negative main surface (Figs 3C-3D; insulating resin layer 62; Kitazume states “an insulating resin is applied to the entire second main surface 202 of the substrate 20… to form an insulating resin layer 62… The insulating resin layer 62 covers the entire second main surface 202 of the substrate 20”), wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction (Figs 3D, 5; solder ball 500 after grinding), and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin (Figs 3D, 5; insulating resin layer 62 / exposed end of solder ball 500). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, Okada, and Gehman with one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board; and a third sealing resin covering the second negative main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Claim(s) 5, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2) and Nishimura et al. (US 6781241 B2) and in further view of Kitazume (US 12177990 B2) and Jang et al. (KR 20150124251 A) Regarding Claim 5 – Ueda in view of Nomiya and Nishimura teaches the circuit module according to claim 1, but does not explicitly disclose wherein the circuit module further includes one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Jang teaches a size of the one or more first solder balls is larger than a size of the one or more second solder balls (Fig 2; 111/112/113; Jang [0013] states “The plurality of solder balls may include a first solder ball, a second solder ball, and a third solder ball, wherein the first solder ball may be larger than the second solder ball and the second solder ball may be larger than the third solder ball.”, see also Jang [0034, 0056]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with a size of the one or more first solder balls is larger than a size of the one or more second solder balls with a size of the one or more first solder balls is larger than a size of the one or more second solder balls as taught by Jang because Jang [0024-0026] states “the surface mount component can be stably installed on the substrate” and that “the quality of the soldering may be improved” and “such as cold solder or cracks, and the mounting defect of the surface mount component can be prevented”. Regarding Claim 18 - Ueda in view of Nomiya, Nishimura, Kitazume, and Jang teaches the circuit module according to claim 5, wherein the circuit module further includes: one or more second solder balls each having an ellipsoidal shape (Kitazume Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Kitazume Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”); and a third sealing resin covering the second negative main surface (Figs 3C-3D; insulating resin layer 62; Kitazume states “an insulating resin is applied to the entire second main surface 202 of the substrate 20… to form an insulating resin layer 62… The insulating resin layer 62 covers the entire second main surface 202 of the substrate 20”), wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction (Kitazume Figs 3D, 5; solder ball 500 after grinding), and wherein the bottom surface of the one or more second solder balls is included in one plane together with a negative main surface of the third sealing resin (Kitazume Figs 3D, 5; insulating resin layer 62 / exposed end of solder ball 500). Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), and Raedt et al. (US 20060012037 A1) in further view of Kitazume (US 12177990 B2) and Jang et al. (KR 20150124251 A) Regarding Claim 12 – Ueda in view of Nomiya, Nishimura, and Raedt teaches the circuit module according to claim 2, but does not explicitly disclose wherein the circuit module further includes one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, and Raedt with one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Jang teaches a size of the one or more first solder balls is larger than a size of the one or more second solder balls (Fig 2; 111/112/113; Jang [0013] states “The plurality of solder balls may include a first solder ball, a second solder ball, and a third solder ball, wherein the first solder ball may be larger than the second solder ball and the second solder ball may be larger than the third solder ball.”, see also Jang [0034, 0056]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, and Raedt with a size of the one or more first solder balls is larger than a size of the one or more second solder balls with a size of the one or more first solder balls is larger than a size of the one or more second solder balls as taught by Jang because Jang [0024-0026] states “the surface mount component can be stably installed on the substrate” and that “the quality of the soldering may be improved” and “such as cold solder or cracks, and the mounting defect of the surface mount component can be prevented”. Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), Raedt et al. (US 20060012037 A1), and Okada et al. (US 20200058599 A1) in further view Kitazume (US 12177990 B2) and Jang et al. (KR 20150124251 A) Regarding Claim 13 – Ueda in view of Nomiya, Nishimura, Raedt, and Okada teaches the circuit module according to claim 3, but does not explicitly disclose wherein the circuit module further includes one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, and Okada with one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Jang teaches a size of the one or more first solder balls is larger than a size of the one or more second solder balls (Fig 2; 111/112/113; Jang [0013] states “The plurality of solder balls may include a first solder ball, a second solder ball, and a third solder ball, wherein the first solder ball may be larger than the second solder ball and the second solder ball may be larger than the third solder ball.”, see also Jang [0034, 0056]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, and Okada with a size of the one or more first solder balls is larger than a size of the one or more second solder balls with a size of the one or more first solder balls is larger than a size of the one or more second solder balls as taught by Jang because Jang [0024-0026] states “the surface mount component can be stably installed on the substrate” and that “the quality of the soldering may be improved” and “such as cold solder or cracks, and the mounting defect of the surface mount component can be prevented”. Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), Raedt et al. (US 20060012037 A1), Okada et al. (US 20200058599 A1) and Gehman et. al (US 20040195591 A1) in further view of Kitazume (US 12177990 B2) and Jang et al. (KR 20150124251 A) Regarding Claim 14 – Ueda in view of Nomiya, Nishimura, Raedt, Okada, and Gehman teaches the circuit module according to claim 4, but does not explicitly disclose wherein the circuit module further includes one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500), the one or more second solder balls being provided on the second negative main surface of the second circuit board (Figs 1, 3A-3D; second main surface 202; Kitazume states “a solder ball 500 is formed on the land conductor 230 on the second main surface 202 of the substrate 20”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, Okada, and Gehman with one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the second negative main surface of the second circuit board as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Jang teaches a size of the one or more first solder balls is larger than a size of the one or more second solder balls (Fig 2; 111/112/113; Jang [0013] states “The plurality of solder balls may include a first solder ball, a second solder ball, and a third solder ball, wherein the first solder ball may be larger than the second solder ball and the second solder ball may be larger than the third solder ball.”, see also Jang [0034, 0056]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, Okada, and Gehman with a size of the one or more first solder balls is larger than a size of the one or more second solder balls with a size of the one or more first solder balls is larger than a size of the one or more second solder balls as taught by Jang because Jang [0024-0026] states “the surface mount component can be stably installed on the substrate” and that “the quality of the soldering may be improved” and “such as cold solder or cracks, and the mounting defect of the surface mount component can be prevented”. Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2) and Nishimura et al. (US 6781241 B2), and in further view of Raedt et al. (US 20060012037 A1) and Jang et al. (KR 20150124251 A) Regarding Claim 9 – Ueda in view of Nomiya and Nishimura teaches the circuit module according to claim 1, but does not explicitly disclose wherein the circuit module further includes one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the first positive main surface of the first circuit board, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls. Raedt teaches one or more second solder balls being provided on the first positive main surface of the first circuit board (Fig 1; Raedt [Abstract] states “producing on a first main surface of a first element a first solder ball, producing on a first main surface of a second element a second solder ball, providing contact between the first solder ball and the second solder ball” and [0022] states “Also the second solder ball can be laterally embedded in a non-conductive material… up to an embedding level parallel to the first main surface”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with one or more second solder balls being provided on the first positive main surface of the first circuit board as taught by Raedt because Raedt teaches a method for bonding two elements in a “3D-stack or multilayer stack” and teaches that “The solder ball of the second substrate can then be mounted on the first ball, without the risk of collapse of the solder column or shorting between neighboring solder connections” (Raedt [0008, 0010]), thereby teaching main surface solder ball interconnection in a multilayer structure with improved connection reliability. Jang teaches one or more second solder balls each having an ellipsoidal shape, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls (Fig 2; 111/112/113; Jang [0013] states “The plurality of solder balls may include a first solder ball, a second solder ball, and a third solder ball, wherein the first solder ball may be larger than the second solder ball and the second solder ball may be larger than the third solder ball.”, see also Jang [0034, 0056]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with one or more second solder balls each having an ellipsoidal shape, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls with a size of the one or more first solder balls is larger than a size of the one or more second solder balls as taught by Jang because Jang [0024-0026] states “the surface mount component can be stably installed on the substrate” and that “the quality of the soldering may be improved” and “such as cold solder or cracks, and the mounting defect of the surface mount component can be prevented”. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), and Raedt et al. (US 20060012037 A1) in further view of Jang et al. (KR 20150124251 A) Regarding Claim 19 – Ueda in view of Nomiya, Nishimura, and Raedt teaches the circuit module according to claim 2, wherein the circuit module further includes one or more second solder balls being provided on the first positive main surface of the first circuit board (Fig 1; Raedt [Abstract, 0022] quoted above) but does not explicitly disclose one or more second solder balls each having an ellipsoidal shape, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls. Jang teaches one or more second solder balls each having an ellipsoidal shape, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls (Fig 2; 111/112/113; Jang [0013] states “The plurality of solder balls may include a first solder ball, a second solder ball, and a third solder ball, wherein the first solder ball may be larger than the second solder ball and the second solder ball may be larger than the third solder ball.”, see also Jang [0034, 0056]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, and Raedt with one or more second solder balls each having an ellipsoidal shape, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls with a size of the one or more first solder balls is larger than a size of the one or more second solder balls as taught by Jang because Jang [0024-0026] states “the surface mount component can be stably installed on the substrate” and that “the quality of the soldering may be improved” and “such as cold solder or cracks, and the mounting defect of the surface mount component can be prevented”. Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2), Nishimura et al. (US 6781241 B2), Raedt et al. (US 20060012037 A1), Funakawa et al. (US 20190181068 A1), and Okada et al. (US 20200058599 A1) in further view of Jang et al. (KR 20150124251 A) Regarding Claim 20 – Ueda in view of Nomiya, Nishimura, Raedt, Funakawa, and Okada teaches the circuit module according to claim 7, wherein the circuit module further includes one or more second solder balls being provided on the first positive main surface of the first circuit board (Fig 1; Raedt [Abstract, 0022] quoted above) but does not explicitly disclose one or more second solder balls each having an ellipsoidal shape, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls. Jang teaches one or more second solder balls each having an ellipsoidal shape, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls (Fig 2; 111/112/113; Jang [0013] states “The plurality of solder balls may include a first solder ball, a second solder ball, and a third solder ball, wherein the first solder ball may be larger than the second solder ball and the second solder ball may be larger than the third solder ball.”, see also Jang [0034, 0056]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya, Nishimura, Raedt, Funakawa, and Okada with one or more second solder balls each having an ellipsoidal shape, and wherein a size of the one or more first solder balls is larger than a size of the one or more second solder balls with a size of the one or more first solder balls is larger than a size of the one or more second solder balls as taught by Jang because Jang [0024-0026] states “the surface mount component can be stably installed on the substrate” and that “the quality of the soldering may be improved” and “such as cold solder or cracks, and the mounting defect of the surface mount component can be prevented”. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ueda et al. (JP 2007173570 A) in view of Nomiya (US 11239821 B2) and Nishimura et al. (US 6781241 B2), and in further view of Raedt et al. (US 20060012037 A1) and Kitazume (US 12177990 B2) Regarding Claim 10 – Ueda in view of Nomiya and Nishimura teaches the circuit module according to claim 1, but does not explicitly disclose wherein the circuit module includes: one or more second solder balls each having an ellipsoidal shape, the one or more second solder balls being provided on the first positive main surface of the first circuit board; and a third sealing resin covering the first positive main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a positive main surface of the third sealing resin. Raedt teaches one or more second solder balls being provided on the first positive main surface of the first circuit board (Fig 1; Raedt [0013-0018, 0022]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with one or more second solder balls being provided on the first positive main surface of the first circuit board as taught by Raedt because Raedt teaches a method for bonding two elements in a “3D-stack or multilayer stack” and teaches that “The solder ball of the second substrate can then be mounted on the first ball, without the risk of collapse of the solder column or shorting between neighboring solder connections” (Raedt [0008, 0010]), thereby teaching main surface solder ball interconnection in a multilayer structure with improved connection reliability. Kitazume teaches one or more second solder balls each having an ellipsoidal shape (Figs 1, 3A-3D; solder ball 500); and a third sealing resin covering the first positive main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a positive main surface of the third sealing resin (Figs 3C-3D; insulating resin layer 62; Kitazume states “an insulating resin is applied to the entire second main surface 202 of the substrate 20… to form an insulating resin layer 62… The insulating resin layer 62 covers the entire second main surface 202 of the substrate 20”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Ueda in view of Nomiya and Nishimura with one or more second solder balls each having an ellipsoidal shape, and a third sealing resin covering the first positive main surface, wherein the one or more second solder balls each have a bottom surface being a plane orthogonal to the Z-axis direction, and wherein the bottom surface of the one or more second solder balls is included in one plane together with a positive main surface of the third sealing resin as taught by Kitazume because Kitazume states with this structure “deformation of the solder ball is significantly reduced or prevented” and “a reduction in the mountability and bondability to other circuit boards is able to be significantly reduced or prevented”. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADITYA SHARMA whose telephone number is (571)270-7246. The examiner can normally be reached Monday - Friday 8:30 - 5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ADITYA SHARMA/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Jul 31, 2024
Application Filed
Apr 22, 2026
Non-Final Rejection mailed — §103
Jul 06, 2026
Response Filed
Aug 11, 2026
Final Rejection mailed — §103 (current)

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3-4
Expected OA Rounds
80%
Grant Probability
99%
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2y 8m (~6m remaining)
Median Time to Grant
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