Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 5-10, 12-16, 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang, US 20160342494,, hereinafter Yang, in view of Mokhlesi et al., US 20090323412, hereinafter Mokhlesi.
As per claim 1, Yang teaches A method comprising:
sending a read disturb scan command (Fig.14, 1404, 1406,"NAND command sequence") to a memory device (Fig. 1B, 104 "NVM") of a memory subsystem (Fig. 1B, 100, [0037] the non-volatile memory system 100) causing the memory device to: (Fig.14, 1406, "Read dummy wordline with NAND command sequence")
execute a first read strobe at a
execute a second read strobe at a
(Fig.15, 1508, 1510, "Successively lower read bias until error bits is below threshold"; 1514, 1516 "Successively raise read bias until error bits is below threshold")
retrieving the charge loss value and the charge gain value from the memory device; (Fig.15, 1506, "Charge loss= increased 1s and 0s", 1510; 1512, "Charge gain = = increased 0s and 1s", 1516; [0067])
determining that a read disturb for the memory portion satisfies a read disturb threshold using the charge loss value and the charge gain value; and
(Fig.14, 1412, 1418; Fig. 15, 1510, "Charge loss= C*(-~ V)" 1516, "Charge gain= C*(+~V)", [0068]-[0069], The amount of read disturb of the block (i.e. RD of normal wordlines) may be determined using a ratio between the dummy wordline and the normal wordlines. As discussed above, the ratio of the width of the dummy wordline to a regular wordline may correspond to the ratio of charge loss between those wordlines)
flagging the memory portion for refresh in response to determining that the read disturb satisfies the read disturb threshold. ([0070] for disturbance. The data on the block may need to be refreshed or relocated based on the analysis.)
EXCEPT
Mokhlesi teaches
([0053], In other words, the data state of a storage element is the state which is between the highest read compare level at which the storage element is non-conductive and the lowest read compare level at which the storage element is conductive.)
It would have been obvious to one of ordinary skill in the art before the effective filling data of the claimed invention to have modified Yang to incorporate the teaching of the limitation from Mokhlesi as indicated above, in order to increase the flash memory system's endurance and performance (Yang, [0022]).
As per claim 15, Yang teaches A system comprising:
a plurality of memory devices (Fig. 1B, 104 "NVM"); and
a processing device (Fig. 1B, 102 "CONTROLLER") , operatively coupled with the plurality of memory devices, to:
send a read disturb scan command to a memory device of a memory subsystem (Fig. 1B, 100, [0037] the non-volatile memory system 100) causing the memory device to: (Fig.14, 1406, "Read dummy wordline with NAND command sequence")
execute a first read strobe
execute a second read strobe
(Fig.15, 1508, 1510, "Successively lower read bias until error bits is below threshold"; 1514, 1516 "Successively raise read bias until error bits is below threshold")
retrieve the charge loss value and the charge gain value from the memory device;
retrieve a threshold charge loss value and a threshold charge gain value for the memory portion;
(Fig.15, 1506, "Charge loss= increased 1s and 0s", 1510; 1512, "Charge gain = = increased 0s and 1s", 1516; [0067])
compare the charge loss value to the threshold charge loss value;
compare the charge gain value to the threshold charge gain value
(Fig.15, 1504; Fig.14, 1408, 1410,1412, 1418)
determine that a read disturb for the memory portion satisfies a read disturb threshold is response to the charge loss value being less than the threshold charge loss value or the charge gain value exceeding the threshold charge gain value; and (Fig.14, 1412, 1418; Fig. 15, 1510, "Charge loss= C*(-~ V)" 1516, "Charge gain= C*(+~V)", [0068]-[0069], The amount of read disturb of the block (i.e. RD of normal wordlines) may be determined using a ratio between the dummy wordline and the normal wordlines. As discussed above, the ratio of the width of the dummy wordline to a regular wordline may correspond to the ratio of charge loss between those wordlines)
flag the memory portion for refresh in response to determining that the read disturb satisfies the read disturb threshold. ([0070] for disturbance. The data on the block may need to be refreshed or relocated based on the analysis.)
EXCEPT
Mokhlesi teaches
([0053], In other words, the data state of a storage element is the state which is between the highest read compare level at which the storage element is non-conductive and the lowest read compare level at which the storage element is conductive.)
It would have been obvious to one of ordinary skill in the art before the effective filling data of the claimed invention to have modified Yang to incorporate the teaching of the limitation from Mokhlesi as indicated above, in order to increase the flash memory system's endurance and performance (Yang, [0022]).
As per claim 2, Yang-Mokhlesi teaches The method as applied above in claim 1, Yang further teaches wherein the charge gain value is a failed bit count for the lowest read level and the charge loss value is a failed bit count for the highest read level. (Fig.15, 1506; 1512; [0064])
As per claim 3, Yang-Mokhlesi teaches The method as applied above in claim 1, Yang further teaches further comprising:
retrieving a threshold charge loss value and a threshold charge gain value for the memory portion;
comparing the charge loss value to the threshold charge loss value; and
comparing the charge gain value to the threshold charge gain value,
(Fig.15, 1504; Fig.14, 1408, 1410,1412, 1418)
wherein
determining that the read disturb for the memory portion satisfies the read disturb threshold comprises:
determining that the read disturb for the memory portion satisfies the read disturb threshold is response to the charge loss value being less than the threshold charge loss value or the charge gain value exceeding the threshold charge gain value.
(Fig.14, 1412, 1418; Fig. 15, 1510, "Charge loss= C*(-~ V)" 1516, "Charge gain= C*(+~V)", [0068]-[0069], The amount of read disturb of the block (i.e. RD of normal wordlines) may be determined using a ratio between the dummy wordline and the normal wordlines. As discussed above, the ratio of the width of the dummy wordline to a regular wordline may correspond to the ratio of charge loss between those wordlines)
As per claim 5, Yang-Mokhlesi teaches The method as applied above in claim 1, Yang further teaches further comprising:
determining that a read count for the memory portion satisfies a read count threshold, wherein sending the read disturb scan command is in response to the read count satisfying the read count threshold. (Fig.15, 1502, "Count the 0s and 1s of dummy wordline")
As per claim 6, Yang-Mokhlesi teaches The method as applied above in claim 5, Yang further teaches updating the read count threshold using the charge loss value and the charge gain value. (Fig.14, 1422, "Adjust read parameters based on DR or RD"; Fig.15, 1508, 1514)
As per claim 7, Yang-Mokhlesi teaches The method as applied above in claim 1, Yang further teaches further comprising:
determining that the memory portion is flagged for refresh; and
performing a refresh operation on the memory portion in response to determining that the memory portion is flagged for refresh. ([0070] for disturbance. The data on the block may need to be refreshed or relocated based on the analysis.)
Claim(s) 4, 11, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang, US 20160342494,, hereinafter Yang, in view of Mokhlesi et al., US 20090323412, hereinafter Mokhlesi, in further view of Muchherla et al., US 20210035649, hereinafter Muchherla.
As per claim 4, Yang-Mokhlesi teaches The method as applied above in claim 3, EXCEPT wherein the read disturb scan command comprises a memory address for the memory portion and wherein retrieving the threshold charge loss value and the threshold charge gain value for the memory portion uses the memory address.
Muchherla teaches wherein the read disturb scan command comprises a memory address for the memory portion and wherein retrieving the threshold charge loss value and the threshold charge gain value for the memory portion uses the memory address. (Fig.1, LOCAL MEMORY 119; [0025]-[0026], In some embodiments, the local memory 119 can include memory registers storing memory pointers, fetched data, etc.)
It would have been obvious to one of ordinary skill in the art before the effective filling data of the claimed invention to have modified Yang-Mokhlesi to incorporate the teaching of the limitation from Muchherla as indicated above, in order to increase the flash memory system's endurance and performance (Yang, [0022]).
Claims 8-14 is the same non-transitory computer-readable storage medium claim as method claims 1-7 respectively, thus they are rejected under the same reason as claims 1-7 respectively.
Claims 16, 17-20 is the same system claim as method claims 2,4-7 respectively, thus they are rejected under the same reason as claims 2,4-7 respectively.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Muchherla et al., US 10553290, Read Disturb Scan Consolidation
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RONG TANG whose telephone number is (469)295-9106. The examiner can normally be reached Monday - Friday 7:30-5.
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/RONG TANG/Examiner, Art Unit 2111
/MARK D FEATHERSTONE/Supervisory Patent Examiner, Art Unit 2111
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