DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 8, 11, and 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shabbir et al. (US 20220229483 A1; hereinafter Shabbir).
Regarding claim 1, Shabbir discloses a memory system (FIG. 2: Information Handling System 200 with memory 210), comprising: a memory device comprising memory cells (FIG. 2: memory 210); and a memory controller (FIG. 2: Management Controller 220) coupled to the memory device and configured to: identify a current temperature of the memory system (para. [0040]: “Memory thermal controller 225 may include an interface in communication temperature sensor 235 that measures the current temperature of memory 210.”); determine a delay using fuzzy logic based on the current temperature (para. [0040]: “Memory thermal controller 225 may include a fuzzy logic processor subsystem based adaptive closed-loop thermal controller configured to prevent memory 210 from overheating”); and control the memory device to execute an operation after the delay (para. [0005]: “When the temperature of the storage device rises, the storage device may lower the temperature of the storage device by delaying (i.e., throttling) a background operation or an inputted command.”; para. [0040]: “Memory thermal controller 225 may prevent memory 210 from overheating by power capping or throttling of memory 210 to reduce heat generated by memory 210.”).
Regarding claim 8, memory operations are known in the art to comprise one of a read operation, a write operation, or an erase operation (Official Notice: see Kim et al. (US 20140098600 A1) at para. [0091]: “The memory controller 200 may be a CPU or an MPU, and may have such a function that the read and write operations are delayed or adjusted to be within allowed operation circumstances.” (emphasis added)).
Regarding claim 11, Shabbir discloses a memory controller (FIG. 2: Information Handling System 200 with memory 210), comprising: a temperature sampling circuit (FIG. 2: Temperature Sensor 235) configured to identify a current temperature of a memory system comprising a memory device and the memory controller (para. [0040]: “Memory thermal controller 225 may include an interface in communication temperature sensor 235 that measures the current temperature of memory 210.”); a first processor configured to determine a delay using fuzzy logic based on the current temperature (para. [0040]: “Memory thermal controller 225 may include a fuzzy logic processor subsystem based adaptive closed-loop thermal controller configured to prevent memory 210 from overheating”); and a second processor configured to control a memory device to execute an operation after the delay (FIG. 2: “Memory 210 may be communicatively coupled to processor 215 and may include any system, device, or apparatus operable to retain program instructions or data for a period of time”; para. [0040]: “Memory thermal controller 225 may prevent memory 210 from overheating by power capping or throttling of memory 210 to reduce heat generated by memory 210.”).
Regarding claim 17, Shabbir discloses a method of operating a memory system (FIG. 2: Information Handling System 200 with memory 210), comprising: identifying a current temperature of the memory system comprising a memory controller and a memory device (para. [0040]: “Memory thermal controller 225 may include an interface in communication temperature sensor 235 that measures the current temperature of memory 210.”); determining a delay using fuzzy logic based on the current temperature (para. [0040]: “Memory thermal controller 225 may include a fuzzy logic processor subsystem based adaptive closed-loop thermal controller configured to prevent memory 210 from overheating”); and controlling the memory device to execute an operation after the delay (para. [0040]: “Memory thermal controller 225 may prevent memory 210 from overheating by power capping or throttling of memory 210 to reduce heat generated by memory 210.”).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2-4 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shabbir et al. (US 20220229483 A1; hereinafter Shabbir) in view of Yun (US 20240143185 A1).
Regarding claims 2 and 12, Shabbir teaches the memory system and memory controller, as set forth in the anticipation rejections of claims 1 and 11 above, respectively.
However, Shabbir does not teach receiving a first temperature from a first sensor positioned in the memory device; receiving a second temperature from a second sensor positioned in the memory controller; and determining the current temperature of the memory system based on at least one of the first temperature or the second temperature.
Yun, in the same field of endeavor, discloses, “. . . each temperature sensors may be within corresponding memory die and the controller 120 may obtain temperature measurements of the plurality of memory dies DIE from respective temperature sensors within the plurality of memory dies DIE.” (see para. [0107]).
Therefore, it would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have modified the temperature sensors of Shabbir to be in a memory device (die, array, block, etc.) and the memory controller as taught by Yun. One of ordinary skill in the art would have been motivated to make this modification for the benefit of measuring temperatures of a plurality of memory dies (Yun at para. [0107]).
Regarding claim 3, Yun discloses, “. . . by determining the temperature of the storage device 100 based on a temperature of a predetermined one of those sensors, based on an average, a median or weighted average of temperatures of those sensors, or based on a maximum or minimum temperatures of those sensors.” (emphasis added) (see para. [0109]).
Regarding claim 4, Shabbir and Yun are silent on periodically collecting temperature data from temperature sensors—but this is a common practice in the art (Official Notice: see Oh et al. (US 20160306592 A1) at para. [0039]) and one having ordinary skill in the art may induce both Shabbir’s and Yun’s memory controllers receive temperature readings periodically.
Allowable Subject Matter
Claims 5-7, 9-10, 13-16, and 18-20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUSTIN BRYCE HEISTERKAMP whose telephone number is (703)756-1095. The examiner can normally be reached M-F 0800-1700.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JUSTIN BRYCE HEISTERKAMP/Examiner, Art Unit 2827
/AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827